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| author | Jeff Law <law@redhat.com> | 2000-02-26 01:48:35 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 2000-02-26 01:48:35 +0000 |
| commit | 28d33191ee02313e3877af7fcd6c061f9f9ae7c8 (patch) | |
| tree | fab7701c2ef9d02e157cb55d3a989728c882b66d /gas/doc | |
| parent | 36e89602d2543e9dce32189126c14c31a4853c24 (diff) | |
| download | gdb-28d33191ee02313e3877af7fcd6c061f9f9ae7c8.zip gdb-28d33191ee02313e3877af7fcd6c061f9f9ae7c8.tar.gz gdb-28d33191ee02313e3877af7fcd6c061f9f9ae7c8.tar.bz2 | |
* doc/c-mips.texi (MIPS Opts): Fix typo in last patch.
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-mips.texi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index 6234b0c..26940de 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -71,7 +71,7 @@ assembly; see @ref{MIPS ISA,, Directives to override the ISA level}. Assume that 32-bit general purpose registers are available. This affects synthetic instructions such as @code{move}, which will assemble to a 32-bit or a 64-bit instruction depending on this flag. On some -MIPS variants there is be a 32-bit mode flag; when this flag is set, +MIPS variants there is a 32-bit mode flag; when this flag is set, 64-bit instructions generate a trap. Also, some 32-bit OSes only save the 32-bit registers on a context switch, so it is essential never to use the 64-bit registers. |