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| author | Nick Clifton <nickc@redhat.com> | 2003-11-06 15:30:05 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2003-11-06 15:30:05 +0000 |
| commit | 0bbf2aa424421d471f9f3ba61206c4afb909d117 (patch) | |
| tree | c35b0acc8c49c4c68e8ea68c85ec76f7b200f8db /gas/doc | |
| parent | 9abc968f910ddf4cd06e17770c9053586d0a9258 (diff) | |
| download | gdb-0bbf2aa424421d471f9f3ba61206c4afb909d117.zip gdb-0bbf2aa424421d471f9f3ba61206c4afb909d117.tar.gz gdb-0bbf2aa424421d471f9f3ba61206c4afb909d117.tar.bz2 | |
* config/tc-arm.texi (struct reg_entry): Add new field 'builtin'.
(rn_table, iwmmxt_table, cp_table, cn_table, fn_table, sn_table,
dn_table, mav_mvf_table, mac_mvd_table, mav_mvfx_table,
mav_mvax_table, mav_dspc_table): Initialise new field.
(insert_reg_alias): Initialise new field.
(md_pseudo_table): Add "unreq" entry.
(s_unreq): New function: Undo the effects of a previous .req.
* doc/c-arm.texi: Document new pseudo op.
* NEWS: Mention new feature.
* testsuite/gas/arm/req.s: New test file. Check .req and .unreq psuedo ops.
* testsuite/gas/arm/req.l: Expected error output from req.s test.
* testsuite/gas/arm/copro.d: Set target architecture for objdump so that the
test will work on architectures which cannot encode higher arm architecture
types in their file headers.
* testsuite/gas/arm/arm.exp: Run new req.s test.
Skip thumb instruction test for PE targets which do not support
thumb relocations.
* testsuite/gas/elf/elf.exp: Skip special handling of section2 test for XScale
targets - it is no longer needed.
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-arm.texi | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi index dadd91c..1108014 100644 --- a/gas/doc/c-arm.texi +++ b/gas/doc/c-arm.texi @@ -1,4 +1,4 @@ -@c Copyright 1996, 1997, 1998, 1999, 2000, 2001 +@c Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2003 @c Free Software Foundation, Inc. @c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo. @@ -303,6 +303,20 @@ example: foo .req r0 @end smallexample +@cindex @code{unreq} directive, ARM +@item .unreq @var{alias-name} +This undefines a register alias which was previously defined using the +@code{req} directive. For example: + +@smallexample + foo .req r0 + .unreq foo +@end smallexample + +An error occurs if the name is undefined. Note - this pseudo op can +be used to delete builtin in register name aliases (eg 'r0'). This +should only be done if it is really necessary. + @cindex @code{code} directive, ARM @item .code @code{[16|32]} This directive selects the instruction set being generated. The value 16 |