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| author | H.J. Lu <hjl.tools@gmail.com> | 2020-10-14 05:02:13 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2020-10-14 05:02:31 -0700 |
| commit | 58bf9b6a7ff56d53f851f78e02c255440de9258a (patch) | |
| tree | 06c1757cf3fb5b11be78e993f1bf75af4814d19d /gas/doc | |
| parent | c1fa250ae1604d3337cf63279503a737c9377574 (diff) | |
| download | gdb-58bf9b6a7ff56d53f851f78e02c255440de9258a.zip gdb-58bf9b6a7ff56d53f851f78e02c255440de9258a.tar.gz gdb-58bf9b6a7ff56d53f851f78e02c255440de9258a.tar.bz2 | |
x86: Support Intel AVX VNNI
Intel AVX VNNI instructions are marked with CpuVEX_PREFIX. Without the
pseudo {vex} prefix, mnemonics of Intel VNNI instructions are encoded
with the EVEX prefix. The pseudo {vex} prefix can be used to encode
mnemonics of Intel VNNI instructions with the VEX prefix.
gas/
* NEWS: Add Intel AVX VNNI.
* config/tc-i386.c (cpu_arch): Add .avx_vnni and noavx_vnni.
(cpu_flags_match): Support CpuVEX_PREFIX.
* doc/c-i386.texi: Document .avx_vnni, noavx_vnni and how to
encode Intel VNNI instructions with VEX prefix.
* testsuite/gas/i386/avx-vnni.d: New file.
* testsuite/gas/i386/avx-vnni.s: Likewise.
* testsuite/gas/i386/x86-64-avx-vnni.d: Likewise.
* testsuite/gas/i386/x86-64-avx-vnni.s: Likewise.
* testsuite/gas/i386/i386.exp: Run AVX VNNI tests.
opcodes/
* i386-dis.c (PREFIX_VEX_0F3850): New.
(PREFIX_VEX_0F3851): Likewise.
(PREFIX_VEX_0F3852): Likewise.
(PREFIX_VEX_0F3853): Likewise.
(VEX_W_0F3850_P_2): Likewise.
(VEX_W_0F3851_P_2): Likewise.
(VEX_W_0F3852_P_2): Likewise.
(VEX_W_0F3853_P_2): Likewise.
(prefix_table): Add PREFIX_VEX_0F3850, PREFIX_VEX_0F3851,
PREFIX_VEX_0F3852 and PREFIX_VEX_0F3853.
(vex_table): Add VEX_W_0F3850_P_2, VEX_W_0F3851_P_2,
VEX_W_0F3852_P_2 and VEX_W_0F3853_P_2.
(putop): Add support for "XV" to print "{vex3}" pseudo prefix.
* i386-gen.c (cpu_flag_init): Clear the CpuAVX_VNNI bit in
CPU_UNKNOWN_FLAGS. Add CPU_AVX_VNNI_FLAGS and
CPU_ANY_AVX_VNNI_FLAGS.
(cpu_flags): Add CpuAVX_VNNI and CpuVEX_PREFIX.
* i386-opc.h (CpuAVX_VNNI): New.
(CpuVEX_PREFIX): Likewise.
(i386_cpu_flags): Add cpuavx_vnni and cpuvex_prefix.
* i386-opc.tbl: Add Intel AVX VNNI instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-i386.texi | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 6fd2f42..f9aae56 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -212,6 +212,7 @@ accept various extension mnemonics. For example, @code{avx512_vp2intersect}, @code{tdx}, @code{avx512_bf16}, +@code{avx_vnni}, @code{noavx512f}, @code{noavx512cd}, @code{noavx512er}, @@ -230,6 +231,7 @@ accept various extension mnemonics. For example, @code{noavx512_vp2intersect}, @code{notdx}, @code{noavx512_bf16}, +@code{noavx_vnni}, @code{noenqcmd}, @code{noserialize}, @code{notsxldtrk}, @@ -861,6 +863,10 @@ prefix which generates REX prefix unconditionally. @samp{@{nooptimize@}} -- disable instruction size optimization. @end itemize +Mnemonics of Intel VNNI instructions are encoded with the EVEX prefix +by default. The pseudo @samp{@{vex@}} prefix can be used to encode +mnemonics of Intel VNNI instructions with the VEX prefix. + @cindex conversion instructions, i386 @cindex i386 conversion instructions @cindex conversion instructions, x86-64 @@ -1509,7 +1515,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.avx512vbmi} @tab @samp{.avx512_4fmaps} @tab @samp{.avx512_4vnniw} @item @samp{.avx512_vpopcntdq} @tab @samp{.avx512_vbmi2} @tab @samp{.avx512_vnni} @item @samp{.avx512_bitalg} @tab @samp{.avx512_bf16} @tab @samp{.avx512_vp2intersect} -@item @samp{.tdx} +@item @samp{.tdx} @tab @samp{.avx_vnni} @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} |