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author | Andrew Senkevich <andrew.senkevich@intel.com> | 2016-01-29 15:46:50 +0300 |
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committer | Andrew Senkevich <andrew.senkevich@intel.com> | 2016-01-29 15:46:50 +0300 |
commit | e4e00185b58fd15c74913f19f4d5fb311b239e21 (patch) | |
tree | 92754b63964dbcf1598666118acc3876c61c1382 /gas/doc | |
parent | d64450d73aedfbd3521872e1ff7ec4f16ef0aae1 (diff) | |
download | gdb-e4e00185b58fd15c74913f19f4d5fb311b239e21.zip gdb-e4e00185b58fd15c74913f19f4d5fb311b239e21.tar.gz gdb-e4e00185b58fd15c74913f19f4d5fb311b239e21.tar.bz2 |
Add option -mfence-as-lock-add=[no|yes].
With -mfence-as-lock-add=yes lfence, mfence and sfence will be encoded
as lock addl $0x0, (%{r,e}sp).
gas/:
* config/tc-i386.c (avoid_fence): New.
(output_insn): Encode as lock addl $0x0, (%{r,e}sp) if avoid_fence
is true.
(OPTION_FENCE_AS_LOCK_ADD): New.
(md_longopts): Add -mfence-as-lock-add.
(md_parse_option): Handle -mfence-as-lock-add.
(md_show_usage): Add -mfence-as-lock-add=[no|yes].
* doc/c-i386.texi (-mfence-as-lock-add): Document.
gas/testsuite/:
* gas/i386/i386.exp: Run new tests.
* gas/i386/fence-as-lock-add.s: New.
* gas/i386/fence-as-lock-add-yes.d: Likewise.
* gas/i386/fence-as-lock-add-no.d: Likewise.
* gas/i386/x86-64-fence-as-lock-add-yes.d: Likewise.
* gas/i386/x86-64-fence-as-lock-add-no.d: Likewise.
Diffstat (limited to 'gas/doc')
-rw-r--r-- | gas/doc/c-i386.texi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 2f6485d..357851a 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -327,6 +327,18 @@ single-thread computers @option{-momit-lock-prefix=@var{no}} will encode lock prefix as usual, which is the default. +@cindex @samp{-mfence-as-lock-add=} option, i386 +@cindex @samp{-mfence-as-lock-add=} option, x86-64 +@item -mfence-as-lock-add=@var{no} +@itemx -mfence-as-lock-add=@var{yes} +These options control how the assembler should encode lfence, mfence and +sfence. +@option{-mfence-as-lock-add=@var{yes}} will encode lfence, mfence and +sfence as @samp{lock addl $0x0, (%rsp)} in 64-bit mode and +@samp{lock addl $0x0, (%esp)} in 32-bit mode. +@option{-mfence-as-lock-add=@var{no}} will encode lfence, mfence and +sfence as usual, which is the default. + @cindex @samp{-mevexrcig=} option, i386 @cindex @samp{-mevexrcig=} option, x86-64 @item -mevexrcig=@var{rne} |