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author | Nick Clifton <nickc@redhat.com> | 2012-05-15 12:55:51 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2012-05-15 12:55:51 +0000 |
commit | 6927f98292aaa6f7fcb3152d5d902758538e626c (patch) | |
tree | b459b91d4d7f001cc57214f7c4a554b7ab3cb192 /gas/doc | |
parent | 9cc815f56d3c2f1fc8f033b869693975bceb9633 (diff) | |
download | gdb-6927f98292aaa6f7fcb3152d5d902758538e626c.zip gdb-6927f98292aaa6f7fcb3152d5d902758538e626c.tar.gz gdb-6927f98292aaa6f7fcb3152d5d902758538e626c.tar.bz2 |
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space.
Tweak target flags to match other tools. (i.e. -m m68hc11).
* doc/as.texinfo: Mention new options.
* doc/c-m68hc11.texi: Document new options.
* NEWS: Mention new support.
* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
* config.bfd: Likewise.
* cpu-m9s12x.c: New.
* cpu-m9s12xg.c: New.
* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space.
Fix carry bug in IMM16 (IMM8 low/high) relocate.
* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
(ALL_MACHINES_CFILES): Likewise.
* reloc.c: Add S12X relocs.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* gas/m68hc11/insns9s12x.s: New
* gas/m68hc11/insns9s12x.d: New
* gas/m68hc11/hexprefix.s: New
* gas/m68hc11/hexprefix.d: New
* gas/m68hc11/9s12x-exg-sex-tfr.s: New
* gas/m68hc11/9s12x-exg-sex-tfr.d: New
* gas/m68hc11/insns9s12xg.s: New
* gas/m68hc11/insns9s12xg.d: New
* gas/m68hc11/9s12x-mov.s: New
* gas/m68hc11/9s12x-mov.d: New
* gas/m68hc11/m68hc11.exp: Updated
* gas/m68hc11/*.d: Brought in line with changed objdump output.
* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
* gas/elf/dwarf2-2.d: Likewise.
* ld-m68hc11/xgate-link.s: New.
* ld-m68hc11/xgate-link.d: New.
* ld-m68hc11/xgate-offset.s: New.
* ld-m68hc11/xgate-offset.d: New.
* ld-m68hc11/xgate1.s: New.
* ld-m68hc11/xgate1.d: New.
* ld-m68hc11/xgate2.s: New.
* ld-m68hc11/m68hc11.exp: Updated.
* ld-m68hc11/*.d: Brought in line with changed objdump output.
* ld-gc/gc.exp: Update CFLAGS for m68hc11.
* ld-plugin/plugin.exp: Likewise.
* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.
* configure.in: Add S12X and XGATE co-processor support to m68hc11
target.
* disassemble.c: Likewise.
* configure: Regenerate.
* m68hc11-dis.c: Make objdump output more consistent, use hex
instead of decimal and use 0x prefix for hex.
* m68hc11-opc.c: Add S12X and XGATE opcodes.
* dis-asm.h (print_insn_m9s12x): Prototype.
(print_insn_m9s12xg): Prototype.
* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
(E_M68HC11_XGATE_RAMOFFSET): Define.
* m68hc11.h: Add XGate definitions.
(struct m68hc11_opcode): Add xg_mask field.
Diffstat (limited to 'gas/doc')
-rw-r--r-- | gas/doc/as.texinfo | 12 | ||||
-rw-r--r-- | gas/doc/c-m68hc11.texi | 24 |
2 files changed, 28 insertions, 8 deletions
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index 034cc92..694c806 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -369,7 +369,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. @ifset M68HC11 @emph{Target M68HC11 options:} - [@b{-m68hc11}|@b{-m68hc12}|@b{-m68hcs12}] + [@b{-m68hc11}|@b{-m68hc12}|@b{-m68hcs12}|@b{-mm9s12x}|@b{-mm9s12xg}] [@b{-mshort}|@b{-mlong}] [@b{-mshort-double}|@b{-mlong-double}] [@b{--force-long-branches}] [@b{--short-branches}] @@ -1050,10 +1050,14 @@ Motorola 68HC11 or 68HC12 series. @table @gcctabopt -@item -m68hc11 | -m68hc12 | -m68hcs12 +@item -m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg Specify what processor is the target. The default is defined by the configuration option when building the assembler. +@item --xgate-ramoffset +Instruct the linker to offset RAM addresses from S12X address space into +XGATE address space. + @item -mshort Specify to use the 16-bit integer ABI. @@ -1083,10 +1087,10 @@ when the instruction does not support direct addressing mode. Print the syntax of instruction in case of error. @item --print-opcodes -print the list of instructions with syntax and then exit. +Print the list of instructions with syntax and then exit. @item --generate-example -print an example of instruction for each possible instruction and then exit. +Print an example of instruction for each possible instruction and then exit. This option is only useful for testing @command{@value{AS}}. @end table diff --git a/gas/doc/c-m68hc11.texi b/gas/doc/c-m68hc11.texi index bebc53e..3d69396 100644 --- a/gas/doc/c-m68hc11.texi +++ b/gas/doc/c-m68hc11.texi @@ -1,5 +1,5 @@ @c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000, 2003, -@c 2006, 2011 +@c 2006, 2011, 2012 @c Free Software Foundation, Inc. @c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo. @@ -35,24 +35,40 @@ dependent options. @cindex @samp{-m68hc11} @item -m68hc11 -This option switches the assembler in the M68HC11 mode. In this mode, +This option switches the assembler into the M68HC11 mode. In this mode, the assembler only accepts 68HC11 operands and mnemonics. It produces code for the 68HC11. @cindex @samp{-m68hc12} @item -m68hc12 -This option switches the assembler in the M68HC12 mode. In this mode, +This option switches the assembler into the M68HC12 mode. In this mode, the assembler also accepts 68HC12 operands and mnemonics. It produces code for the 68HC12. A few 68HC11 instructions are replaced by some 68HC12 instructions as recommended by Motorola specifications. @cindex @samp{-m68hcs12} @item -m68hcs12 -This option switches the assembler in the M68HCS12 mode. This mode is +This option switches the assembler into the M68HCS12 mode. This mode is similar to @samp{-m68hc12} but specifies to assemble for the 68HCS12 series. The only difference is on the assembling of the @samp{movb} and @samp{movw} instruction when a PC-relative operand is used. +@cindex @samp{-mm9s12x} +@item -mm9s12x +This option switches the assembler into the M9S12X mode. This mode is +similar to @samp{-m68hc12} but specifies to assemble for the S12X +series which is a superset of the HCS12. + +@cindex @samp{-mm9s12xg} +@item -mm9s12xg +This option switches the assembler into the XGATE mode for the RISC +co-processor featured on some S12X-family chips. + +@cindex @samp{--xgate-ramoffset} +@item --xgate-ramoffset +This option instructs the linker to offset RAM addresses from S12X address +space into XGATE address space. + @cindex @samp{-mshort} @item -mshort This option controls the ABI and indicates to use a 16-bit integer ABI. |