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| author | Hongyu Wang <hongyu.wang@intel.com> | 2022-11-01 10:49:29 +0800 |
|---|---|---|
| committer | Cui,Lili <lili.cui@intel.com> | 2022-11-02 09:19:20 +0800 |
| commit | 4321af3e4d269851aed31e94b3e115a6884b21b4 (patch) | |
| tree | 76494bf481a3f6dee85a231dceb01577c40ccbbf /gas/doc | |
| parent | e8572cd6aaff78d5afdb415416db7da5a3b1ca1c (diff) | |
| download | gdb-4321af3e4d269851aed31e94b3e115a6884b21b4.zip gdb-4321af3e4d269851aed31e94b3e115a6884b21b4.tar.gz gdb-4321af3e4d269851aed31e94b3e115a6884b21b4.tar.bz2 | |
Support Intel AVX-IFMA
x86: Support Intel AVX-IFMA
Intel AVX IFMA instructions are marked with CpuVEX_PREFIX, which is
cleared by default. Without {vex} pseudo prefix, Intel IFMA instructions
are encoded with EVEX prefix. {vex} pseudo prefix will turn on VEX
encoding for Intel IFMA instructions.
gas/
* NEWS: Support Intel AVX-IFMA.
* config/tc-i386.c (cpu_arch): Add avx_ifma.
* doc/c-i386.texi: Document .avx_ifma.
* testsuite/gas/i386/avx-ifma.d: New file.
* testsuite/gas/i386/avx-ifma-intel.d: Likewise.
* testsuite/gas/i386/avx-ifma.s: Likewise.
* testsuite/gas/i386/x86-64-avx-ifma.d: Likewise.
* testsuite/gas/i386/x86-64-avx-ifma-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx-ifma.s: Likewise.
* testsuite/gas/i386/i386.exp: Run AVX IFMA tests.
opcodes/
* i386-dis.c (PREFIX_VEX_0F38B4): New.
(PREFIX_VEX_0F38B5): Likewise.
(VEX_W_0F38B4_P_2): Likewise.
(VEX_W_0F38B5_P_2): Likewise.
(prefix_table): Add PREFIX_VEX_0F38B4 and PREFIX_VEX_0F38B5.
(vex_table): Add VEX_W_0F38B4_P_2 and VEX_W_0F38B5_P_2.
* i386-dis-evex.h: Fold AVX512IFMA entries to AVX-IFMA.
* i386-gen.c (cpu_flag_init): Clear the CpuAVX_IFMA bit in
CPU_UNKNOWN_FLAGS. Add CPU_AVX_IFMA_FLGAS and
CPU_ANY_AVX_IFMA_FLAGS. Add CpuAVX_IFMA to CPU_AVX2_FLAGS.
(cpu_flags): Add CpuAVX_IFMA.
* i386-opc.h (CpuAVX_IFMA): New.
(i386_cpu_flags): Add cpuavx_ifma.
* i386-opc.tbl: Add Intel AVX IFMA instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Co-authored-by: Haochen Jiang <haochen.jiang@intel.com>
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-i386.texi | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 55a587b..7bdbd26 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -195,6 +195,7 @@ accept various extension mnemonics. For example, @code{avx_vnni}, @code{avx512_fp16}, @code{prefetchi}, +@code{avx_ifma}, @code{amx_int8}, @code{amx_bf16}, @code{amx_fp16}, @@ -828,9 +829,9 @@ prefix which generates REX prefix unconditionally. @samp{@{nooptimize@}} -- disable instruction size optimization. @end itemize -Mnemonics of Intel VNNI instructions are encoded with the EVEX prefix +Mnemonics of Intel VNNI/IFMA instructions are encoded with the EVEX prefix by default. The pseudo @samp{@{vex@}} prefix can be used to encode -mnemonics of Intel VNNI instructions with the VEX prefix. +mnemonics of Intel VNNI/IFMA instructions with the VEX prefix. @cindex conversion instructions, i386 @cindex i386 conversion instructions @@ -1488,7 +1489,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.avx512_bitalg} @tab @samp{.avx512_bf16} @tab @samp{.avx512_vp2intersect} @item @samp{.tdx} @tab @samp{.avx_vnni} @tab @samp{.avx512_fp16} @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt} -@item @samp{.prefetchi} +@item @samp{.prefetchi} @tab @samp{.avx_ifma} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} |