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authorAndreas Schwab <schwab@linux-m68k.org>2022-03-20 11:23:05 +0100
committerAndreas Schwab <schwab@linux-m68k.org>2022-03-20 19:04:05 +0100
commit062cda5a37967a4a2ab4f8b04032a6688018ee6b (patch)
tree92bc11978f947b1c7894e5582278de02ab1d081b /gas/doc
parentbdcd45685beb9d4b865c68152e47601c7e3d170c (diff)
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RISC-V: Fix misplaced @end table
Move the csr-check and arch items inside the table for the .option directive.
Diffstat (limited to 'gas/doc')
-rw-r--r--gas/doc/c-riscv.texi2
1 files changed, 1 insertions, 1 deletions
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index be9c114..21d867e 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -206,7 +206,6 @@ know what you're doing, this should only be at the top of a file.
Enables or disables relaxation. The RISC-V assembler and linker
opportunistically relax some code sequences, but sometimes this behavior is not
desirable.
-@end table
@item csr-check
@itemx no-csr-check
@@ -224,6 +223,7 @@ sometimes. Besides, @samp{.option arch, -i} is illegal, since we cannot
remove the base i extension anytime. If you want to reset the whole ISA
string, you can also use @samp{.option arch, =rv32imac} to overwrite the
previous settings.
+@end table
@cindex INSN directives
@item .insn @var{type}, @var{operand} [,...,@var{operand_n}]