Fix spelling typos

18 files changed, 56 insertions, 56 deletions

diff --git a/gas/doc/all.texi b/gas/doc/all.texi
index 3334cbc..ddabb68 100644
--- a/gas/doc/all.texi
+++ b/gas/doc/all.texi
@@ -64,7 +64,7 @@
 @set Z80
 @set Z8000
 
-@c Does this version of the assembler use the difference-table kluge?
+@c Does this version of the assembler use the difference-table kludge?
 @set DIFF-TBL-KLUGE
 
 @c Do all machines described use IEEE floating point?
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index a86119e..494381f 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -130,7 +130,7 @@ notice identical to this one except for the removal of this paragraph
 @subtitle Version @value{VERSION}
 @sp 1
 @sp 13
-The Free Software Foundation Inc.  thanks The Nice Computer
+The Free Software Foundation Inc.@: thanks The Nice Computer
 Company of Australia for loaning Dean Elsner to write the
 first (Vax) version of @command{as} for Project @sc{gnu}.
 The proprietors, management and staff of TNCCA thank FSF for
@@ -1181,13 +1181,13 @@ Assemble all undocumented Z80 instructions without warning.
 Issue a warning for undocumented Z80 instructions that also work on R800.
 @item  -warn-unportable-instructions 
 @itemx -Wup
-Issue a warning for undocumented Z80 instructions that do notwork on R800.  
+Issue a warning for undocumented Z80 instructions that do not work on R800.  
 @item  -forbid-undocumented-instructions 
 @itemx -Fud
 Treat all undocumented instructions as errors.
 @item  -forbid-unportable-instructions 
 @itemx -Fup
-Treat undocumented Z80 intructions that do notwork on R800 as errors.
+Treat undocumented Z80 instructions that do not work on R800 as errors.
 @end table
 @end ifset
 
@@ -2678,7 +2678,7 @@ independently of any floating point hardware in the computer running
 @cindex bit fields
 @cindex constants, bit field
 You can also define numeric constants as @dfn{bit fields}.
-specify two numbers separated by a colon---
+Specify two numbers separated by a colon---
 @example
 @var{mask}:@var{value}
 @end example
@@ -3276,7 +3276,7 @@ of the same name.  The character has ASCII value of @samp{\002} (control-B).
 This is a serial number to keep the labels distinct.  The first definition of
 @samp{0:} gets the number @samp{1}.  The 15th definition of @samp{0:} gets the 
 number @samp{15}, and so on.  Likewise the first definition of @samp{1:} gets
-the number @samp{1} and its 15th defintion gets @samp{15} as well.
+the number @samp{1} and its 15th definition gets @samp{15} as well.
 @end table
 
 So for example, the first @code{1:} is named @code{L1@kbd{C-B}1}, the 44th
@@ -3298,7 +3298,7 @@ dollar sign.  eg @samp{@b{55$}}.
 
 They can also be distinguished from ordinary local labels by their transformed
 name which uses ASCII character @samp{\001} (control-A) as the magic character
-to distinguish them from ordinary labels.  Thus the 5th defintion of @samp{6$}
+to distinguish them from ordinary labels.  Thus the 5th definition of @samp{6$}
 is named @samp{L6@kbd{C-A}5}.
 
 @node Dot
@@ -4078,7 +4078,7 @@ Don't forget to close the function by
 @cindex @code{cfi_endproc} directive
 @code{.cfi_endproc} is used at the end of a function where it closes its
 unwind entry previously opened by
-@code{.cfi_startproc}. and emits it to @code{.eh_frame}.
+@code{.cfi_startproc}, and emits it to @code{.eh_frame}.
 
 @section @code{.cfi_def_cfa @var{register}, @var{offset}}
 @code{.cfi_def_cfa} defines a rule for computing CFA as: @i{take 
@@ -4129,9 +4129,9 @@ to the @code{.debug_line} file name table.  The @var{fileno} operand should
 be a unique positive integer to use as the index of the entry in the table.
 The @var{filename} operand is a C string literal.
 
-The detail of filename indicies is exposed to the user because the filename
+The detail of filename indices is exposed to the user because the filename
 table is shared with the @code{.debug_info} section of the dwarf2 debugging
-information, and thus the user must know the exact indicies that table
+information, and thus the user must know the exact indices that table
 entries will have.
 
 @section @code{.loc @var{fileno} @var{lineno} [@var{column}] [@var{options}]}
@@ -5079,7 +5079,7 @@ You can write strings delimited in these other ways besides
 
 @table @code
 @item '@var{string}'
-You can delimit strings with single-quote charaters.
+You can delimit strings with single-quote characters.
 
 @item <@var{string}>
 You can delimit strings with matching angle brackets.
@@ -6051,7 +6051,7 @@ This directive finds or creates a symbol @code{table} and creates a
 This directive finds the symbol @code{child} and finds or creates the symbol
 @code{parent} and then creates a @code{VTABLE_INHERIT} relocation for the
 parent whose addend is the value of the child symbol.  As a special case the
-parent name of @code{0} is treated as refering the @code{*ABS*} section.
+parent name of @code{0} is treated as referring the @code{*ABS*} section.
 @end ifset
 
 @node Warning
@@ -6607,7 +6607,7 @@ make a mistake.
 
 Even if the problem you experience is a fatal signal, you should still say so
 explicitly.  Suppose something strange is going on, such as, your copy of
-@command{@value{AS}} is out of synch, or you have encountered a bug in the C
+@command{@value{AS}} is out of sync, or you have encountered a bug in the C
 library on your system.  (This has happened!)  Your copy might crash and ours
 would not.  If you told us to expect a crash, then when ours fails to crash, we
 would know that the bug was not happening for us.  If you had not told us to
@@ -6760,7 +6760,7 @@ Timothy Wall, Michael Hayes, and Greg Smart contributed to the various tic*
 flavors.
 
 David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from Tensilica,
-Inc. added support for Xtensa processors.
+Inc.@: added support for Xtensa processors.
 
 Several engineers at Cygnus Support have also provided many small bug fixes and
 configuration enhancements.
diff --git a/gas/doc/c-arc.texi b/gas/doc/c-arc.texi
index 04544d1..7f8ed6e 100644
--- a/gas/doc/c-arc.texi
+++ b/gas/doc/c-arc.texi
@@ -230,7 +230,7 @@ Determines the kinds of suffixes to be allowed.  Valid values are
 @code{SUFFIX_FLAG} which indicates the absence or presence of
 conditional suffixes and flag setting by the extension instruction.
 It is also possible to specify that an instruction sets the flags and
-is conditional by using @code{SUFFIX_CODE} | @code{SUFFIX_FLAG}.
+is condtional by using @code{SUFFIX_CODE} | @code{SUFFIX_FLAG}.
 
 @item @var{syntaxclass}
 Determines the syntax class for the instruction.  It can have the
@@ -251,7 +251,7 @@ Syntax Class Modifiers are:
 
 @item @code{OP1_MUST_BE_IMM}:
 Modifies syntax class SYNTAX_3OP,  specifying that the first operand
-of a three-operand instruction must be an immediate (i.e. the result
+of a three-operand instruction must be an immediate (i.e., the result
 is discarded).  OP1_MUST_BE_IMM is used by bitwise ORing it with
 SYNTAX_3OP as given in the example below.  This could usually be used
 to set the flags using specific instructions and not retain results. 
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index b5b9374..d9b7b26 100644
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -254,7 +254,7 @@ and
 @item -meabi=@var{ver}
 This option specifies which EABI version the produced object files should
 conform to.
-The following values are recognised:
+The following values are recognized:
 @code{gnu},
 @code{4}
 and
@@ -358,7 +358,7 @@ For compatibility with older toolchains the assembler also accepts
 @cindex MOVW and MOVT relocations, ARM
 Relocations for @samp{MOVW} and @samp{MOVT} instructions can be generated
 by prefixing the value with @samp{#:lower16:} and @samp{#:upper16}
-respectively.  For example to load the 32-bit addresss of foo into r0:
+respectively.  For example to load the 32-bit address of foo into r0:
 
 @smallexample
         MOVW r0, #:lower16:foo
diff --git a/gas/doc/c-avr.texi b/gas/doc/c-avr.texi
index 515d2c6..9371bf2 100644
--- a/gas/doc/c-avr.texi
+++ b/gas/doc/c-avr.texi
@@ -109,7 +109,7 @@ statements.
 @cindex AVR register names
 @cindex register names, AVR
 
-The AVR has 32 x 8-bit general purpouse working registers @samp{r0},
+The AVR has 32 x 8-bit general purpose working registers @samp{r0},
 @samp{r1}, ... @samp{r31}.
 Six of the 32 registers can be used as three 16-bit indirect address
 register pointers for Data Space addressing. One of the these address
diff --git a/gas/doc/c-bfin.texi b/gas/doc/c-bfin.texi
index dcf649a..0b8ae1d 100644
--- a/gas/doc/c-bfin.texi
+++ b/gas/doc/c-bfin.texi
@@ -97,9 +97,9 @@ The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7) that
 normally contain data for manipulation.  These are abbreviated as 
 D-register or Dreg.  Data registers can be accessed as 32-bit registers
 or as two independent 16-bit registers.  The least significant 16 bits
-of each register is called the "low" half and is desginated with ".L"
+of each register is called the "low" half and is designated with ".L"
 following the register name.  The most significant 16 bits are called
-the "high" half and is designated with ".H". following the name.
+the "high" half and is designated with ".H" following the name.
 
 @smallexample
    R7.L, r2.h, r4.L, R0.H
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 52f3110..665f42f 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -647,7 +647,7 @@ then stores the result in the 4 byte location @samp{mem})
 @code{@value{AS}} supports Intel's MMX instruction set (SIMD
 instructions for integer data), available on Intel's Pentium MMX
 processors and Pentium II processors, AMD's K6 and K6-2 processors,
-Cyrix' M2 processor, and probably others.  It also supports AMD's 3DNow!
+Cyrix' M2 processor, and probably others.  It also supports AMD's 3DNow!@:
 instruction set (SIMD instructions for 32-bit floating point data)
 available on AMD's K6-2 processor and possibly others in the future.
 
@@ -710,7 +710,7 @@ value @samp{4} onto the stack, decrementing @samp{%esp} by 2.
 @end smallexample
 
 The same code in a 16-bit code section would generate the machine
-opcode bytes @samp{6a 04} (ie. without the operand size prefix), which
+opcode bytes @samp{6a 04} (i.e., without the operand size prefix), which
 is correct since the processor default operand size is assumed to be 16
 bits in a 16-bit code section.
 
diff --git a/gas/doc/c-i960.texi b/gas/doc/c-i960.texi
index 5dca1cf..4d75bdf 100644
--- a/gas/doc/c-i960.texi
+++ b/gas/doc/c-i960.texi
@@ -69,7 +69,7 @@ Label:  @var{BR}
 @end smallexample
 
 The counter following a branch records the number of times that branch
-was @emph{not} taken; the differenc between the two counters is the
+was @emph{not} taken; the difference between the two counters is the
 number of times the branch @emph{was} taken.
 
 @cindex @code{gbr960}, i960 postprocessor
diff --git a/gas/doc/c-m32r.texi b/gas/doc/c-m32r.texi
index 30cd355..218ed25 100644
--- a/gas/doc/c-m32r.texi
+++ b/gas/doc/c-m32r.texi
@@ -65,7 +65,7 @@ configured.
 
 @item -EL
 @cindex @code{-EL} option, M32R
-This is a synonum for @emph{-little}.
+This is a synonym for @emph{-little}.
 
 @item -big
 @cindex @code{-big} option, M32R
@@ -110,7 +110,7 @@ implies @emph{-parallel}.
 Instructs @code{@value{AS}} to produce warning messages when
 questionable parallel instructions are encountered.  This option is
 enabled by default, but @code{@value{GCC}} disables it when it invokes
-@code{@value{AS}} directly.  Questionable instructions are those whoes
+@code{@value{AS}} directly.  Questionable instructions are those whose
 behaviour would be different if they were executed sequentially.  For
 example the code fragment @samp{mv r1, r2 || mv r3, r1} produces a
 different result from @samp{mv r1, r2 \n mv r3, r1} since the former
@@ -135,7 +135,7 @@ option.
 @item -ignore-parallel-conflicts
 @cindex @samp{-ignore-parallel-conflicts} option, M32RX
 This option tells the assembler's to stop checking parallel
-instructions for contraint violations.  This ability is provided for
+instructions for constraint violations.  This ability is provided for
 hardware vendors testing chip designs and should not be used under
 normal circumstances.
 
@@ -157,8 +157,8 @@ option.
 @item -warn-unmatched-high
 @cindex @samp{-warn-unmatched-high} option, M32R
 This option tells the assembler to produce a warning message if a
-@code{.high} pseudo op is encountered without a mathcing @code{.low}
-pseudo op.  The presence of such an unmatches pseudo op usually
+@code{.high} pseudo op is encountered without a matching @code{.low}
+pseudo op.  The presence of such an unmatched pseudo op usually
 indicates a programming error.
 
 @item -no-warn-unmatched-high
@@ -280,14 +280,14 @@ instructions in the M32R2 ISA as well as the ordinary M32R ISA.
 The directive performs a similar thing as the @emph{-little} command
 line option.  It tells the assembler to start producing little-endian
 code and data.  This option should be used with care as producing
-mixed-endian binary files is frought with danger.
+mixed-endian binary files is fraught with danger.
 
 @cindex @code{.big} directive, M32RX
 @item .big
 The directive performs a similar thing as the @emph{-big} command
 line option.  It tells the assembler to start producing big-endian
 code and data.  This option should be used with care as producing
-mixed-endian binary files is frought with danger.
+mixed-endian binary files is fraught with danger.
 
 @end table
 
@@ -328,7 +328,7 @@ instructions.
 
 @item unknown instruction @samp{...}
 This message is produced when the assembler encounters an instruction
-which it does not recognise.
+which it does not recognize.
 
 @item only the NOP instruction can be issued in parallel on the m32r
 This message is produced when the assembler encounters a parallel
diff --git a/gas/doc/c-m68k.texi b/gas/doc/c-m68k.texi
index d4da2a1..0f8bb78 100644
--- a/gas/doc/c-m68k.texi
+++ b/gas/doc/c-m68k.texi
@@ -284,7 +284,7 @@ The following addressing modes are understood:
 
 @item Address Register
 @samp{%a0} through @samp{%a7}@*
-@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer.  @code{%a6}
+@samp{%a7} is also known as @samp{%sp}, i.e., the Stack Pointer.  @code{%a6}
 is also known as @samp{%fp}, the Frame Pointer.
 
 @item Address Register Indirect
@@ -346,7 +346,7 @@ The following additional addressing modes are understood:
 @table @dfn
 @item Address Register Indirect
 @samp{(%a0)} through @samp{(%a7)}@* 
-@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer.  @code{%a6}
+@samp{%a7} is also known as @samp{%sp}, i.e., the Stack Pointer.  @code{%a6}
 is also known as @samp{%fp}, the Frame Pointer.
 
 @item Address Register Postincrement
@@ -445,11 +445,11 @@ This directive is identical to a @code{.space} directive.
 
 @cindex @code{arch} directive, M680x0
 @item .arch @var{name}
-Select the target architecture and extension features.  Valid valuse
+Select the target architecture and extension features.  Valid values
 for @var{name} are the same as for the @option{-march} command line
 option.  This directive cannot be specified after
 any instructions have been assembled.  If it is given multiple times,
-or in conjuction with the @option{-march} option, all uses must be for
+or in conjunction with the @option{-march} option, all uses must be for
 the same architecture and extension set.
 
 @cindex @code{cpu} directive, M680x0
@@ -458,7 +458,7 @@ Select the target cpu.  Valid valuse
 for @var{name} are the same as for the @option{-mcpu} command line
 option.  This directive cannot be specified after
 any instructions have been assembled.  If it is given multiple times,
-or in conjuction with the @option{-mopt} option, all uses must be for
+or in conjunction with the @option{-mopt} option, all uses must be for
 the same cpu.
 
 @end table
diff --git a/gas/doc/c-mmix.texi b/gas/doc/c-mmix.texi
index 8e47fa4..257e3a6 100644
--- a/gas/doc/c-mmix.texi
+++ b/gas/doc/c-mmix.texi
@@ -530,7 +530,7 @@ Operand syntax is a bit stricter with @code{@value{AS}} than
 must write @code{addu $1,$2,3}.
 
 You can't LOC to a lower address than those already visited
-(i.e. ``backwards'').
+(i.e., ``backwards'').
 
 A LOC directive must come before any emitted code.
 
diff --git a/gas/doc/c-pdp11.texi b/gas/doc/c-pdp11.texi
index d714b28..78f2cf4 100644
--- a/gas/doc/c-pdp11.texi
+++ b/gas/doc/c-pdp11.texi
@@ -311,7 +311,7 @@ an immediate constants, while in BSD syntax the character for this
 purpose is @code{$}.
 
 @cindex PDP-11 general-purpose register syntax
-eneral-purpose registers are named @code{r0} through @code{r7}.
+general-purpose registers are named @code{r0} through @code{r7}.
 Mnemonic alternatives for @code{r6} and @code{r7} are @code{sp} and
 @code{pc}, respectively.
 
diff --git a/gas/doc/c-ppc.texi b/gas/doc/c-ppc.texi
index 08b2271..b5e26fd 100644
--- a/gas/doc/c-ppc.texi
+++ b/gas/doc/c-ppc.texi
@@ -95,10 +95,10 @@ Allow symbolic names for registers.
 Do not allow symbolic names for registers.
 
 @item -mrelocatable
-Support for GCC's -mrelocatble option.
+Support for GCC's -mrelocatable option.
 
 @item -mrelocatable-lib
-Support for GCC's -mrelocatble-lib option.
+Support for GCC's -mrelocatable-lib option.
 
 @item -memb
 Set PPC_EMB bit in ELF flags.
diff --git a/gas/doc/c-tic54x.texi b/gas/doc/c-tic54x.texi
index 374def3..85b2fda 100644
--- a/gas/doc/c-tic54x.texi
+++ b/gas/doc/c-tic54x.texi
@@ -32,7 +32,7 @@
 
 @cindex options, TIC54X
 @cindex TIC54X options
-The TMS320C54x version of @code{@value{AS}} has a few machine-dependent options.
+The TMS320C54X version of @code{@value{AS}} has a few machine-dependent options.
 
 @cindex @samp{-mfar-mode} option, far-mode
 @cindex @samp{-mf} option, far-mode
@@ -450,7 +450,7 @@ points to the word that contains the specified field.
 @itemx .def @var{symbol} [,...,@var{symbol_n}]
 @itemx .ref @var{symbol} [,...,@var{symbol_n}]
 @code{.def} nominally identifies a symbol defined in the current file
-and availalbe to other files.  @code{.ref} identifies a symbol used in
+and available to other files.  @code{.ref} identifies a symbol used in
 the current file but defined elsewhere.  Both map to the standard
 @code{.global} directive.
 
@@ -685,7 +685,7 @@ values are accepted, the op is ignored.
 
 @cindex TIC54X-specific macros
 @cindex macros, TIC54X
-Macros do not require explicit dereferencing of arguments (i.e. \ARG).  
+Macros do not require explicit dereferencing of arguments (i.e., \ARG).  
 
 During macro expansion, the macro parameters are converted to subsyms.
 If the number of arguments passed the macro invocation exceeds the
diff --git a/gas/doc/c-v850.texi b/gas/doc/c-v850.texi
index 445be05..d899d5d 100644
--- a/gas/doc/c-v850.texi
+++ b/gas/doc/c-v850.texi
@@ -267,7 +267,7 @@ the immediate operand field of the given instruction.  For example:
 
 computes the difference between the address of labels 'here' and
 'there', takes the upper 16 bits of this difference, shifts it down 16
-bits and then mutliplies it by the lower 16 bits in register 5, putting
+bits and then multiplies it by the lower 16 bits in register 5, putting
 the result into register 6. 
 
 @cindex @code{lo} pseudo-op, V850
diff --git a/gas/doc/c-xtensa.texi b/gas/doc/c-xtensa.texi
index 33035ad..2a1fb54 100644
--- a/gas/doc/c-xtensa.texi
+++ b/gas/doc/c-xtensa.texi
@@ -428,7 +428,7 @@ The @code{L8UI} machine instruction can only be used with immediate
 offsets in the range from 0 to 255. The @code{L16SI} and @code{L16UI}
 machine instructions can only be used with offsets from 0 to 510.  The
 @code{L32I} machine instruction can only be used with offsets from 0 to
-1020.  A load offset outside these ranges can be materalized with
+1020.  A load offset outside these ranges can be materialized with
 an @code{L32R} instruction if the destination register of the load
 is different than the source address register.  For example:
 
@@ -489,7 +489,7 @@ is assembled into the following:
 @cindex Xtensa directives
 @cindex directives, Xtensa
 
-The Xtensa assember supports a region-based directive syntax:
+The Xtensa assembler supports a region-based directive syntax:
 
 @smallexample
     .begin @var{directive} [@var{options}]
diff --git a/gas/doc/c-z80.texi b/gas/doc/c-z80.texi
index 76e8410..c52268a 100644
--- a/gas/doc/c-z80.texi
+++ b/gas/doc/c-z80.texi
@@ -59,7 +59,7 @@ Treat undocumented z80-instructions that do not work on R800 as errors.
 @item -r800
 Produce code for the R800 processor. The assembler does not support
 undocumented instructions for the R800.
-In line with common practice, @code{@value{AS}} uses Z80 instriction names
+In line with common practice, @code{@value{AS}} uses Z80 instruction names
 for the R800 processor, as far as they exist.
 @end table
 
@@ -105,7 +105,7 @@ A backslash @samp{\} is an ordinary character for the Z80 assembler.
 @cindex single quote, Z80
 @cindex Z80 '
 The single quote @samp{'} must be followed by a closing quote. If there
-is one character inbetween, it is a character constant, otherwise it is
+is one character in between, it is a character constant, otherwise it is
 a string constant.
 
 @node Z80-Regs
@@ -114,7 +114,7 @@ a string constant.
 @cindex register names, Z80
 
 The registers are referred to with the letters assigned to them by
-Zilog. In addition @command{@value{AS}} recognises @samp{ixl} and 
+Zilog. In addition @command{@value{AS}} recognizes @samp{ixl} and 
 @samp{ixh} as the least and most significant octet in @samp{ix}, and
 similarly @samp{iyl} and  @samp{iyh} as parts of @samp{iy}. 
 
@@ -171,7 +171,7 @@ overflow.
 @item ds @var{count}[, @var{value}]
 @itemx defs @var{count}[, @var{value}]
 @c Synonyms for @code{ds.b}, 
-@c which should have been described elsewhre
+@c which should have been described elsewhere
 Fill @var{count} bytes in the object file with @var{value}, if
 @var{value} is omitted it defaults to zero.
 
@@ -188,7 +188,7 @@ This is a normal instruction on Z80, and not an assembler directive.
 A synonym for @xref{Section}, no second argument should be given. 
 @ignore
 
-The following attributes will possibly be recognised in the future
+The following attributes will possibly be recognized in the future
 @table @code
 @item abs
 The section is to be absolute. @code{@value{AS}} will issue an error
@@ -212,7 +212,7 @@ The section is marked as read only.
 
 @node Z80 Opcodes
 @section Opcodes
-In line with commmon practice Z80 mnonics are used for both the Z80 and
+In line with common practice, Z80 mnemonics are used for both the Z80 and
 the R800. 
 
 In many instructions it is possible to use one of the half index
diff --git a/gas/doc/internals.texi b/gas/doc/internals.texi
index dffdb1e..16a6463 100644
--- a/gas/doc/internals.texi
+++ b/gas/doc/internals.texi
@@ -838,7 +838,7 @@ GAS will call @code{md_parse_option} whenever @code{getopt} returns an
 unrecognized code, presumably indicating a special code value which appears in
 @code{md_longopts}.  This function should return non-zero if it handled the
 option and zero otherwise.  There is no need to print a message about an option
-not being recognised.  This will be handled by the generic code.
+not being recognized.  This will be handled by the generic code.
 
 GAS will call @code{md_show_usage} when a usage message is printed; it should
 print a description of the machine specific options. @code{md_after_pase_args},
@@ -891,7 +891,7 @@ If this macro is defined, GAS will use it instead of @code{comment_chars}.
 @cindex tc_symbol_chars
 If this macro is defined, it is a pointer to a null terminated list of
 characters which may appear in an operand.  GAS already assumes that all
-alphanumberic characters, and @samp{$}, @samp{.}, and @samp{_} may appear in an
+alphanumeric characters, and @samp{$}, @samp{.}, and @samp{_} may appear in an
 operand (see @samp{symbol_chars} in @file{app.c}).  This macro may be defined
 to treat additional characters as appearing in an operand.  This affects the
 way in which GAS removes whitespace before passing the string to
@@ -1609,7 +1609,7 @@ symbol's flags.
 
 @item obj_clear_weak_hook
 @cindex obj_clear_weak_hook
-If you define this macro, @code{S_CLEAR_WEAKREFD} will call it after clearning
+If you define this macro, @code{S_CLEAR_WEAKREFD} will call it after cleaning
 the @code{weakrefd} flag, but before modifying any other flags.
 
 @item obj_frob_file