[ARC] Sync cpu names with the ones accepted by GCC.

gas/
2016-12-02  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/cpu-em-err.s: New file.
	* testsuite/gas/arc/cpu-em4-err.s: Likewise.
	* testsuite/gas/arc/cpu-fpuda-err.s: Likewise.
	* testsuite/gas/arc/cpu-hs-err.s: Likewise.
	* testsuite/gas/arc/cpu-quarkse-err.s: Likewise.
	* testsuite/gas/arc/noargs_a7.s: Add .cpu.
	* config/tc-arc.c (ARC_CPU_TYPE_A6xx): Define.
	(ARC_CPU_TYPE_A7xx): Likewise.
	(ARC_CPU_TYPE_AV2EM): Likewise.
	(ARC_CPU_TYPE_AV2HS): Likewise.
	(cpu_types): Update list of known CPU names.
	(arc_show_cpu_list): New function.
	(md_show_usage): Print accepted CPU names.
	(cl_features): New variable.
	(arc_select_cpu): Use cl_features.
	(arc_option): Allow various .cpu names.
	(md_parse_option): Set cl_features.
	* doc/c-arc.texi: Update -mcpu and .cpu documentation.

1 files changed, 104 insertions, 0 deletions

diff --git a/gas/doc/c-arc.texi b/gas/doc/c-arc.texi
index 64522db..2a59c63 100644
--- a/gas/doc/c-arc.texi
+++ b/gas/doc/c-arc.texi
@@ -47,10 +47,28 @@ convenience.  Supported values for @var{cpu} are
 @item arc600
 Assemble for ARC 600.  Aliases: @code{-mA6}, @code{-mARC600}.
 
+@item arc600_norm
+Assemble for ARC 600 with norm instructions.
+
+@item arc600_mul64
+Assemble for ARC 600 with mul64 instructions.
+
+@item arc600_mul32x16
+Assemble for ARC 600 with mul32x16 instructions.
+
 @item arc601
 @cindex @code{mARC601} command line option, ARC
 Assemble for ARC 601.  Alias: @code{-mARC601}.
 
+@item arc601_norm
+Assemble for ARC 601 with norm instructions.
+
+@item arc601_mul64
+Assemble for ARC 601 with mul64 instructions.
+
+@item arc601_mul32x16
+Assemble for ARC 601 with mul32x16 instructions.
+
 @item arc700
 @cindex @code{mA7} command line option, ARC
 @cindex @code{mARC700} command line option, ARC
@@ -60,10 +78,41 @@ Assemble for ARC 700.  Aliases: @code{-mA7}, @code{-mARC700}.
 @cindex @code{mEM} command line option, ARC
 Assemble for ARC EM.  Aliases: @code{-mEM}
 
+@item em
+Assemble for ARC EM, identical as arcem variant.
+
+@item em4
+Assemble for ARC EM with code-density instructions.
+
+@item em4_dmips
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpus
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpuda
+Assemble for ARC EM with code-density, and double-precision assist
+instructions.
+
+@item quarkse_em
+Assemble for QuarkSE-EM cpu.
+
 @item archs
 @cindex @code{mHS} command line option, ARC
 Assemble for ARC HS.  Aliases: @code{-mHS}, @code{-mav2hs}.
 
+@item hs
+Assemble for ARC HS.
+
+@item hs34
+Assemble for ARC HS34.
+
+@item hs38
+Assemble for ARC HS38.
+
+@item hs38_linux
+Assemble for ARC HS38 with floating point support on.
+
 @item nps400
 @cindex @code{mnps400} command line option, ARC
 Assemble for ARC 700 with NPS-400 extended instructions.
@@ -368,6 +417,27 @@ version.  Permitted values for CPU are:
 @item ARC600
 Assemble for the ARC600 instruction set.
 
+@item arc600_norm
+Assemble for ARC 600 with norm instructions.
+
+@item arc600_mul64
+Assemble for ARC 600 with mul64 instructions.
+
+@item arc600_mul32x16
+Assemble for ARC 600 with mul32x16 instructions.
+
+@item arc601
+Assemble for ARC 601 instruction set.
+
+@item arc601_norm
+Assemble for ARC 601 with norm instructions.
+
+@item arc601_mul64
+Assemble for ARC 601 with mul64 instructions.
+
+@item arc601_mul32x16
+Assemble for ARC 601 with mul32x16 instructions.
+
 @item ARC700
 Assemble for the ARC700 instruction set.
 
@@ -377,9 +447,43 @@ Assemble for the NPS400 instruction set.
 @item EM
 Assemble for the ARC EM instruction set.
 
+@item arcem
+Assemble for ARC EM instruction set
+
+@item em4
+Assemble for ARC EM with code-density instructions.
+
+@item em4_dmips
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpus
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpuda
+Assemble for ARC EM with code-density, and double-precision assist
+instructions.
+
+@item quarkse_em
+Assemble for QuarkSE-EM instruction set.
+
 @item HS
 Assemble for the ARC HS instruction set.
 
+@item archs
+Assemble for ARC HS instruction set.
+
+@item hs
+Assemble for ARC HS instruction set.
+
+@item hs34
+Assemble for ARC HS34 instruction set.
+
+@item hs38
+Assemble for ARC HS38 instruction set.
+
+@item hs38_linux
+Assemble for ARC HS38 with floating point support on.
+
 @end table
 
 Note: the @code{.cpu} directive overrides the command line option