diff options
| author | Jan Beulich <jbeulich@suse.com> | 2020-02-12 16:19:03 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-02-12 16:19:03 +0100 |
| commit | 5990e377e5a339bce715fabfc3e45b24b459a7af (patch) | |
| tree | d14b42a87167ad6209f6dee222588556eeb8da7b /gas/doc | |
| parent | f20e3e823d56e54ffe56792ea6a2fe947c2dec0d (diff) | |
| download | gdb-5990e377e5a339bce715fabfc3e45b24b459a7af.zip gdb-5990e377e5a339bce715fabfc3e45b24b459a7af.tar.gz gdb-5990e377e5a339bce715fabfc3e45b24b459a7af.tar.bz2 | |
x86-64: Intel64 adjustments for insns dealing with far pointers
AMD and Intel differ in their handling of far indirect branches as well
as LFS/LGS/LSS: AMD CPUs ignore REX.W while Intel ones honors it. (Note
how the latter three were hybrids so far, while far branches were fully
AMD-like.)
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-i386.texi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index f0189cc..4eaf533 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -1455,6 +1455,18 @@ There are some discrepancies between AMD64 and Intel64 ISAs. @item For @samp{movsxd} with 16-bit destination register, AMD64 supports 32-bit source operand and Intel64 supports 16-bit source operand. + +@item For far branches (with explicit memory operand), both ISAs support +32- and 16-bit operand size. Intel64 additionally supports 64-bit +operand size, encoded as @samp{ljmpq} and @samp{lcallq} in AT&T syntax +and with an explicit @samp{tbyte ptr} operand size specifier in Intel +syntax. + +@item @samp{lfs}, @samp{lgs}, and @samp{lss} similarly allow for 16- +and 32-bit operand size (32- and 48-bit memory operand) in both ISAs, +while Intel64 additionally supports 64-bit operand sise (80-bit memory +operands). + @end itemize @node i386-Bugs |