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author | H.J. Lu <hjl.tools@gmail.com> | 2018-09-17 09:26:18 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2018-09-17 09:26:29 -0700 |
commit | 03751133023c5623cf60f8d3222cb79a376331f9 (patch) | |
tree | 0ae561fd6f959782ff846f94f20465ee0d47a3a1 /gas/doc | |
parent | ec6f095abc396e60f46e1b4724d0eb2e4d18213d (diff) | |
download | gdb-03751133023c5623cf60f8d3222cb79a376331f9.zip gdb-03751133023c5623cf60f8d3222cb79a376331f9.tar.gz gdb-03751133023c5623cf60f8d3222cb79a376331f9.tar.bz2 |
x86: Add -mvexwig=[0|1] option to assembler
Add -mvexwig=[0|1] option to x86 assembler to control how the assembler
should encode the VEX.W bit in WIG VEX instructions.
* gas/NEWS: Mention -mvexwig=[0|1] option.
* config/tc-i386.c (vexwig): New.
(build_vex_prefix): Set the VEX.W bit for -mvexwig=1 for WIG
VEX instructions.
(OPTION_MVEXWIG): New.
(md_longopts): Add -mvexwig=.
(md_parse_option): Handle OPTION_MVEXWIG.
(md_show_usage): Show -mvexwig=[0|1].
* doc/c-i386.texi: Document -mvexwig=[0|1].
* testsuite/gas/i386/avx-wig.d: New file.
* testsuite/gas/i386/avx-wig.s: Likewise.
* testsuite/gas/i386/avx2-wig.d: Likewise.
* testsuite/gas/i386/avx2-wig.s: Likewise.
* testsuite/gas/i386/x86-64-avx-wig.d: Likewise.
* testsuite/gas/i386/x86-64-avx-wig.s: Likewise.
* testsuite/gas/i386/x86-64-avx2-wig.d: Likewise.
* testsuite/gas/i386/x86-64-avx2-wig.s: Likewise.
* testsuite/gas/i386/i386.exp: Run avx-wig, avx2-wig,
x86-64-avx-wig and x86-64-avx2-wig.
Diffstat (limited to 'gas/doc')
-rw-r--r-- | gas/doc/c-i386.texi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 64e3397..77ccfbc 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -298,6 +298,16 @@ AVX instructions with 128bit vector length, which is the default. @option{-mavxscalar=@var{256}} will encode scalar AVX instructions with 256bit vector length. +@cindex @samp{-mvexwig=} option, i386 +@cindex @samp{-mvexwig=} option, x86-64 +@item -mvexwig=@var{0} +@itemx -mvexwig=@var{1} +These options control how the assembler should encode VEX.W-ignored (WIG) +VEX instructions. @option{-mvexwig=@var{0}} will encode WIG VEX +instructions with vex.w = 0, which is the default. +@option{-mvexwig=@var{1}} will encode WIG EVEX instructions with +vex.w = 1. + @cindex @samp{-mevexlig=} option, i386 @cindex @samp{-mevexlig=} option, x86-64 @item -mevexlig=@var{128} |