diff options
author | Nick Clifton <nickc@redhat.com> | 2000-12-01 21:35:38 +0000 |
---|---|---|
committer | Nick Clifton <nickc@redhat.com> | 2000-12-01 21:35:38 +0000 |
commit | e7af610e147b2f6f35e2f7dcec4c707027a53757 (patch) | |
tree | 981ed717ac072d086d1100528456686af62f1bf2 /gas/doc/c-mips.texi | |
parent | b23da31b1cf7d0b7d2ae1d1c4378f8ff77feaf43 (diff) | |
download | gdb-e7af610e147b2f6f35e2f7dcec4c707027a53757.zip gdb-e7af610e147b2f6f35e2f7dcec4c707027a53757.tar.gz gdb-e7af610e147b2f6f35e2f7dcec4c707027a53757.tar.bz2 |
Add MIPS32 as a seperate MIPS architecture
Diffstat (limited to 'gas/doc/c-mips.texi')
-rw-r--r-- | gas/doc/c-mips.texi | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index 137dfe9..e56156e 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -60,12 +60,14 @@ to select big-endian output, and @samp{-EL} for little-endian. @itemx -mips2 @itemx -mips3 @itemx -mips4 +@itemx -mips32 Generate code for a particular MIPS Instruction Set Architecture level. @samp{-mips1} corresponds to the @sc{r2000} and @sc{r3000} processors, @samp{-mips2} to the @sc{r6000} processor, @samp{-mips3} to the -@sc{r4000} processor, and @samp{-mips4} to the @sc{r8000} and -@sc{r10000} processors. You can also switch instruction sets during the -assembly; see @ref{MIPS ISA,, Directives to override the ISA level}. +@sc{r4000} processor, @samp{-mips4} to the @sc{r8000} and +@sc{r10000} processors, and @samp{-mips32} to a generic @sc(MIPS32) +processor. You can also switch instruction sets during the +assembly; see @ref{MIPS ISA, Directives to override the ISA level}. @item -mgp32 Assume that 32-bit general purpose registers are available. This @@ -140,10 +142,8 @@ rm5721, 6000, rm7000, 8000, -10000 -4Kc -4Km -4Kp +10000, +mips32-4k @end quotation @@ -239,8 +239,8 @@ assembly language programmers! @kindex @code{.set mips@var{n}} @sc{gnu} @code{@value{AS}} supports an additional directive to change the @sc{mips} Instruction Set Architecture level on the fly: @code{.set -mips@var{n}}. @var{n} should be a number from 0 to 4. A value from 1 -to 4 makes the assembler accept instructions for the corresponding +mips@var{n}}. @var{n} should be a number from 0 to 4, or 32. The values 1 +to 4 and 32 make the assembler accept instructions for the corresponding @sc{isa} level, from that point on in the assembly. @code{.set mips@var{n}} affects not only which instructions are permitted, but also how certain macros are expanded. @code{.set mips0} restores the |