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author | Ilya Tocar <ilya.tocar@intel.com> | 2014-07-15 13:33:39 +0400 |
---|---|---|
committer | H.J. Lu <hjl.tools@gmail.com> | 2014-07-22 10:23:49 -0700 |
commit | 90a915bf0c95859e90e79c8264825ad6423eea6f (patch) | |
tree | bcb85a7d88625d5a8cd35cae1477e050f58e3f77 /gas/doc/c-i386.texi | |
parent | 1ba585e8f4ec2ed043539e57640945ff6ff3359b (diff) | |
download | gdb-90a915bf0c95859e90e79c8264825ad6423eea6f.zip gdb-90a915bf0c95859e90e79c8264825ad6423eea6f.tar.gz gdb-90a915bf0c95859e90e79c8264825ad6423eea6f.tar.bz2 |
Add AVX512DQ instructions and their AVX512VL variants.
gas/
* config/tc-i386.c (cpu_arch): Add .avx512dq, CPU_AVX512DQ_FLAGS.
* doc/c-i386.texi: Document avx512dq/.avx512dq.
gas/testsuite/
* gas/i386/avx512dq-intel.d: New.
* gas/i386/avx512dq.d: New.
* gas/i386/avx512dq.s: New.
* gas/i386/avx512dq_vl-intel.d: New.
* gas/i386/avx512dq_vl.d: New.
* gas/i386/avx512dq_vl.s: New.
* gas/i386/i386.exp: Run new AVX-512 tests.
* gas/i386/x86-64-avx512dq-intel.d: New.
* gas/i386/x86-64-avx512dq.d: New.
* gas/i386/x86-64-avx512dq.s: New.
* gas/i386/x86-64-avx512dq_vl-intel.d: New.
* gas/i386/x86-64-avx512dq_vl.d: New.
* gas/i386/x86-64-avx512dq_vl.s: New.
opcodes/
* i386-dis-evex.h: Updated.
* i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
PREFIX_EVEX_0F3A67.
(VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
(VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
(prefix_table): Add entries for new instructions.
(vex_len_table): Ditto.
(vex_w_table): Ditto.
(OP_E_memory): Update xmmq_mode handling.
* i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
(cpu_flags): Add CpuAVX512DQ.
* i386-init.h: Regenerared.
* i386-opc.h (CpuAVX512DQ): New.
(i386_cpu_flags): Add cpuavx512dq.
* i386-opc.tbl: Add AVX512DQ instructions.
* i386-tbl.h: Regenerate.
Diffstat (limited to 'gas/doc/c-i386.texi')
-rw-r--r-- | gas/doc/c-i386.texi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 377839a..c1631c2 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -188,6 +188,7 @@ accept various extension mnemonics. For example, @code{svme}, @code{abm} and @code{padlock}. +@code{avx512dq}, @code{avx512bw}, @code{avx512vl}, Note that rather than extending a basic instruction set, the extension @@ -1072,7 +1073,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.smap} @tab @samp{.sha} @item @samp{.smap} @tab @samp{.clflushopt} @tab @samp{.xsavec} @tab @samp{.xsaves} @item @samp{.smap} @tab @samp{.prefetchwt1} -@item @samp{.smap} @tab @samp{.avx512vl} @tab @samp{.avx512bw} +@item @samp{.smap} @tab @samp{.avx512vl} @tab @samp{.avx512bw} @tab @samp{.avx512dq} @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16} |