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authorNick Clifton <nickc@redhat.com>2006-07-24 13:49:50 +0000
committerNick Clifton <nickc@redhat.com>2006-07-24 13:49:50 +0000
commitb45619c047b9bcea43bebfd63d2489301262b481 (patch)
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parent2f9c733339d0a8476a7a8ff77fbfbdbedfa190d1 (diff)
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Fix spelling typos
Diffstat (limited to 'gas/doc/c-i386.texi')
-rw-r--r--gas/doc/c-i386.texi4
1 files changed, 2 insertions, 2 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 52f3110..665f42f 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -647,7 +647,7 @@ then stores the result in the 4 byte location @samp{mem})
@code{@value{AS}} supports Intel's MMX instruction set (SIMD
instructions for integer data), available on Intel's Pentium MMX
processors and Pentium II processors, AMD's K6 and K6-2 processors,
-Cyrix' M2 processor, and probably others. It also supports AMD's 3DNow!
+Cyrix' M2 processor, and probably others. It also supports AMD's 3DNow!@:
instruction set (SIMD instructions for 32-bit floating point data)
available on AMD's K6-2 processor and possibly others in the future.
@@ -710,7 +710,7 @@ value @samp{4} onto the stack, decrementing @samp{%esp} by 2.
@end smallexample
The same code in a 16-bit code section would generate the machine
-opcode bytes @samp{6a 04} (ie. without the operand size prefix), which
+opcode bytes @samp{6a 04} (i.e., without the operand size prefix), which
is correct since the processor default operand size is assumed to be 16
bits in a 16-bit code section.