From Jie Zhang <jie.zhang@analog.com>

	* config/tc-bfin.h (bfin_anomaly_checks): Declare.
	(AC_05000074): Define.
	(ENABLE_AC_05000074): Define.
	* config/tc-bfin.c (enum bfin_cpu_type): New.
	(bfin_cpu_t): Typedef.
	(bfin_cpu_type): Define.
	(bfin_si_revision): Define.
	(bfin_anomaly_checks): Define.
	(struct bfin_cpu): New.
	(bfin_cpus[]): New. (struct bfin_cpu_isa): Define.
	(bfin_isa): New global variable.
	(OPTION_MCPU): Define.
	(md_longopts[]): Add -mcpu option.
	(md_parse_option): Deal with -mcpu option and initialize
	bfin_anomaly_checks.
	* doc/c-bfin.texi: Rename BFIN to Blackfin throughout.  Document
	-mcpu option.
	* config/bfin-parse.y (gen_multi_instr_1): Check anomaly
	05000074.

1 files changed, 54 insertions, 8 deletions

diff --git a/gas/doc/c-bfin.texi b/gas/doc/c-bfin.texi
index 0b8ae1d..fa6fde1 100644
--- a/gas/doc/c-bfin.texi
+++ b/gas/doc/c-bfin.texi
@@ -14,14 +14,60 @@
 
 @cindex Blackfin support
 @menu
-* BFIN Syntax::			BFIN Syntax
-* BFIN Directives::		BFIN Directives
+* Blackfin Options::		Blackfin Options
+* Blackfin Syntax::		Blackfin Syntax
+* Blackfin Directives::		Blackfin Directives
 @end menu
 
-@node BFIN Syntax
+@node Blackfin Options
+@section Options
+@cindex Blackfin options (none)
+@cindex options for Blackfin (none)
+
+@table @code
+
+@cindex @code{-mcpu=} command line option, Blackfin
+@item -mcpu=@var{processor}@r{[}-@var{sirevision}@r{]}
+This option specifies the target processor.  The optional @var{sirevision}
+is not used in assembler.  It's here such that GCC can easily pass down its
+@code{-mcpu=} option.  The assembler will issue an
+error message if an attempt is made to assemble an instruction which
+will not execute on the target processor.  The following processor names are
+recognized: 
+@code{bf522},
+@code{bf523},
+@code{bf524},
+@code{bf525},
+@code{bf526},
+@code{bf527},
+@code{bf531},
+@code{bf532},
+@code{bf533},
+@code{bf534},
+@code{bf535} (not implemented yet),
+@code{bf536},
+@code{bf537},
+@code{bf538},
+@code{bf539},
+@code{bf542},
+@code{bf542m},
+@code{bf544},
+@code{bf544m},
+@code{bf547},
+@code{bf547m},
+@code{bf548},
+@code{bf548m},
+@code{bf549},
+@code{bf549m},
+and
+@code{bf561}.
+
+@end table
+
+@node Blackfin Syntax
 @section Syntax
-@cindex BFIN syntax
-@cindex syntax, BFIN
+@cindex Blackfin syntax
+@cindex syntax, Blackfin
 
 @table @code
 @item Special Characters
@@ -164,10 +210,10 @@ the Blackfin(r) Processor Instruction Set Reference.
 
 @end table
 
-@node BFIN Directives
+@node Blackfin Directives
 @section Directives
-@cindex BFIN directives
-@cindex directives, BFIN
+@cindex Blackfin directives
+@cindex directives, Blackfin
 
 The following directives are provided for compatibility with the VDSP assembler.