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authorH.J. Lu <hjl.tools@gmail.com>2013-01-10 19:51:55 +0000
committerH.J. Lu <hjl.tools@gmail.com>2013-01-10 19:51:55 +0000
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tree20fa4046a20ec2318234368e49846226ec368020 /gas/doc/c-aarch64.texi
parent4c665b71b1b907fcd4a7d56e10c310ace08addd9 (diff)
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Remove trailing white spaces on gas
* app.c: Remove trailing white spaces. * as.c: Likewise. * as.h: Likewise. * cond.c: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.h: Likewise. * ecoff.c: Likewise. * input-file.c: Likewise. * itbl-lex.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * sb.c: Likewise. * subsegs.c: Likewise. * symbols.c: Likewise. * write.c: Likewise. * config/tc-i386.c: Likewise. * doc/Makefile.am: Likewise. * doc/Makefile.in: Likewise. * doc/c-aarch64.texi: Likewise. * doc/c-alpha.texi: Likewise. * doc/c-arc.texi: Likewise. * doc/c-arm.texi: Likewise. * doc/c-avr.texi: Likewise. * doc/c-bfin.texi: Likewise. * doc/c-cr16.texi: Likewise. * doc/c-d10v.texi: Likewise. * doc/c-d30v.texi: Likewise. * doc/c-h8300.texi: Likewise. * doc/c-hppa.texi: Likewise. * doc/c-i370.texi: Likewise. * doc/c-i386.texi: Likewise. * doc/c-i860.texi: Likewise. * doc/c-m32c.texi: Likewise. * doc/c-m32r.texi: Likewise. * doc/c-m68hc11.texi: Likewise. * doc/c-m68k.texi: Likewise. * doc/c-microblaze.texi: Likewise. * doc/c-mips.texi: Likewise. * doc/c-msp430.texi: Likewise. * doc/c-mt.texi: Likewise. * doc/c-s390.texi: Likewise. * doc/c-score.texi: Likewise. * doc/c-sh.texi: Likewise. * doc/c-sh64.texi: Likewise. * doc/c-tic54x.texi: Likewise. * doc/c-tic6x.texi: Likewise. * doc/c-v850.texi: Likewise. * doc/c-xc16x.texi: Likewise. * doc/c-xgate.texi: Likewise. * doc/c-xtensa.texi: Likewise. * doc/c-z80.texi: Likewise. * doc/internals.texi: Likewise.
Diffstat (limited to 'gas/doc/c-aarch64.texi')
-rw-r--r--gas/doc/c-aarch64.texi4
1 files changed, 2 insertions, 2 deletions
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 5a59f44..3939fee 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -104,7 +104,7 @@ Relocations for @samp{ADRP}, and @samp{ADD}, @samp{LDR} or @samp{STR}
instructions can be generated by prefixing the label with
@samp{#:pg_hi21:} and @samp{#:lo12:} respectively.
-For example to use 33-bit (+/-4GB) pc-relative addressing to
+For example to use 33-bit (+/-4GB) pc-relative addressing to
load the address of @var{foo} into x0:
@smallexample
@@ -236,7 +236,7 @@ should only be done if it is really necessary.
@cindex opcodes for AArch64
@code{@value{AS}} implements all the standard AArch64 opcodes. It also
implements several pseudo opcodes, including several synthetic load
-instructions.
+instructions.
@table @code