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authorMaciej W. Rozycki <macro@linux-mips.org>2013-06-26 12:15:43 +0000
committerMaciej W. Rozycki <macro@linux-mips.org>2013-06-26 12:15:43 +0000
commit81566a9b783f83766a99adfe81868f0bf8ebbd39 (patch)
treeda9e34d81452f5ba6a5581943e55134b8d251504 /gas/doc/as.texinfo
parent0609b76739f5b259b1fed33d05289d15c586a3a2 (diff)
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* doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
* doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names. Replace @sc{mips16} with literal `MIPS16'. (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
Diffstat (limited to 'gas/doc/as.texinfo')
-rw-r--r--gas/doc/as.texinfo7
1 files changed, 2 insertions, 5 deletions
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index b02a34d..d1e397f 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -1253,11 +1253,8 @@ Generate code for a particular MIPS Instruction Set Architecture level.
alias for @samp{-march=r6000}, @samp{-mips3} is an alias for
@samp{-march=r4000} and @samp{-mips4} is an alias for @samp{-march=r8000}.
@samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, @samp{-mips64}, and
-@samp{-mips64r2}
-correspond to generic
-@samp{MIPS V}, @samp{MIPS32}, @samp{MIPS32 Release 2}, @samp{MIPS64},
-and @samp{MIPS64 Release 2}
-ISA processors, respectively.
+@samp{-mips64r2} correspond to generic MIPS V, MIPS32, MIPS32 Release 2,
+MIPS64, and MIPS64 Release 2 ISA processors, respectively.
@item -march=@var{cpu}
Generate code for a particular MIPS CPU.