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authorNick Clifton <nickc@redhat.com>2011-10-25 11:18:16 +0000
committerNick Clifton <nickc@redhat.com>2011-10-25 11:18:16 +0000
commitcfb8c0921c8ab3be8e5e48ec31e472742c2d4104 (patch)
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parent0a394bfbada7defad3dff1fdcaa86e0e5a13c656 (diff)
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bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo . (ALL_MACHINES_CFILES): Add cpu-epiphany.c . (BFD32_BACKENDS): Add elf32-epiphany.lo . (BFD32_BACKENDS_CFILES): Add elf32-epiphany.c . * Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate. * archures.c (bfd_arch_epiphany): Add. (bfd_mach_epiphany16, bfd_mach_epiphany32): Define. (bfd_epiphany_arch): Declare. (bfd_archures_list): Add &bfd_epiphany_arch. * config.bfd (epiphany-*-elf): New target case. * configure.in (bfd_elf32_epiphany_vec): New target vector case. * reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation. (BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise. (BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise. (BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise. * targets.c (bfd_elf32_epiphany_vec): Declare. (_bfd_target_vector): Add bfd_elf32_epiphany_vec. * po/SRC-POTFILES.in, po/bfd.pot: Regenerate. * cpu-epiphany.c, elf32-epiphany.c: New files. binutils: * readelf.c (include "elf/epiphany.h") (guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY. (get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise. (is_16bit_abs_reloc, is_none_reloc): Likewise. * po/binutils.pot: Regenerate. cpu: * cpu/epiphany.cpu, cpu/epiphany.opc: New files. gas: * NEWS: Mention addition of Adapteva Epiphany support. * config/tc-epiphany.c, config/tc-epiphany.h: New files. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c . (TARGET_CPU_HFILES): Add config/tc-epiphany.h . * Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate. * configure.in: Also set using_cgen for epiphany. * configure.tgt: Handle epiphany. * doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi . * doc/all.texi: Set EPIPHANY. * doc/as.texinfo: Add EPIPHANY-specific text. * doc/c-epiphany.texi: New file. * po/gas.pot: Regenerate. gas/testsuite: * gas/epiphany: New directory. include: * dis-asm.h (print_insn_epiphany): Declare. * elf/epiphany.h: New file. * elf/common.h (EM_ADAPTEVA_EPIPHANY): Define. ld: * NEWS: Mention addition of Adapteva Epiphany support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c . (eelf32epiphany.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Handle epiphany-*-elf. * po/ld.pot: Regenerate. * testsuite/ld-srec/srec.exp: xfail epiphany. * emulparams/elf32epiphany.sh: New file. opcodes: * Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h . (TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c, epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c . (CLEANFILES): Add stamp-epiphany. (EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it. (stamp-epiphany): New rule. * Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate. * configure.in: Handle bfd_epiphany_arch. * disassemble.c (ARCH_epiphany): Define. (disassembler): Handle bfd_arch_epiphany. * epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files. * epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise. * epiphany-opc.h: Likewise.
Diffstat (limited to 'gas/doc/as.texinfo')
-rw-r--r--gas/doc/as.texinfo28
1 files changed, 28 insertions, 0 deletions
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 8ed62a4..362c10b 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -307,6 +307,11 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
@emph{Target D30V options:}
[@b{-O}|@b{-n}|@b{-N}]
@end ifset
+@ifset EPIPHANY
+
+@emph{Target EPIPHANY options:}
+ [@b{-mepiphany}|@b{-mepiphany16}]
+@end ifset
@ifset H8
@emph{Target H8/300 options:}
@@ -843,6 +848,22 @@ Warn when a nop after a 32-bit multiply instruction is generated.
@end ifset
@c man end
+@ifset EPIPHANY
+The following options are available when @value{AS} is configured for the
+Adapteva EPIPHANY series.
+
+@table @gcctabopt
+
+@item -mepiphany
+Specifies that the both 32 and 16 bit instructions are allowed. This is the
+default behavior.
+
+@item -mepiphany16
+Restricts the permitted instructions to just the 16 bit set.
+
+@end table
+@end ifset
+
@ifset I80386
@ifclear man
@@ -6849,6 +6870,9 @@ subject, see the hardware manufacturer's manual.
@ifset D30V
* D30V-Dependent:: D30V Dependent Features
@end ifset
+@ifset EPIPHANY
+* Epiphany-Dependent:: EPIPHANY Dependent Features
+@end ifset
@ifset H8/300
* H8/300-Dependent:: Renesas H8/300 Dependent Features
@end ifset
@@ -7025,6 +7049,10 @@ family.
@include c-d30v.texi
@end ifset
+@ifset EPIPHANY
+@include c-epiphany.texi
+@end ifset
+
@ifset H8/300
@include c-h8300.texi
@end ifset