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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 16:49:34 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 16:49:34 +0000 |
| commit | 6b4680fbd08221530ad3d541cd51a866eefef6fc (patch) | |
| tree | b05cecde47fd0a28c948c8d66d79bbb0915c14bd /gas/debug.c | |
| parent | 51d543ed936c9ea7d045ecf80030e6bc8ffff29f (diff) | |
| download | gdb-6b4680fbd08221530ad3d541cd51a866eefef6fc.zip gdb-6b4680fbd08221530ad3d541cd51a866eefef6fc.tar.gz gdb-6b4680fbd08221530ad3d541cd51a866eefef6fc.tar.bz2 | |
[AArch64][PATCH 3/14] Support ARMv8.2 FP16 Scalar Three Same instructions.
ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Scalar Three Register Same, making them
available when +simd+fp16 is enabled.
The instructions added are: FABD, FMULX, FCMEQ, FCMGE, FCMGT, FACGE,
FACGT, FRECPS and FRSQRTS.
The general form for these instructions is
<OP> <Hd>, <Hs>, <Hm>
gas/testsuite/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.
* gas/aarch64/advsimd-fp16.s: Add tests for scalar three register same
instructions.
opcodes/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (aarch64_opcode_table): Add fp16 versions of
fmulx, fcmeq, frecps, frsqrts, fcmge, facge, fabd, fcmgt and
facgt to the scalar three same group.
Change-Id: I155eb8d7c1e9a7c89d691d7e4aae83be51ff1238
Diffstat (limited to 'gas/debug.c')
0 files changed, 0 insertions, 0 deletions