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author | Jim Wilson <jimw@sifive.com> | 2018-07-27 14:35:29 -0700 |
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committer | Jim Wilson <jimw@sifive.com> | 2018-07-27 14:35:29 -0700 |
commit | d19969ffbfda0576fab881e0b00c2fefae3aa8df (patch) | |
tree | 17306e43c83f8070de1ad87aa1c8cbb8720d280a /gas/configure.tgt | |
parent | 129eb0f1f16dc7a49799a024a7bcb109d954a1e7 (diff) | |
download | gdb-d19969ffbfda0576fab881e0b00c2fefae3aa8df.zip gdb-d19969ffbfda0576fab881e0b00c2fefae3aa8df.tar.gz gdb-d19969ffbfda0576fab881e0b00c2fefae3aa8df.tar.bz2 |
RISC-V: Fix gas configure support for riscv*-*-*.
gas/
* configure.tgt (riscv*): Accept as alias for riscv32*.
Diffstat (limited to 'gas/configure.tgt')
-rw-r--r-- | gas/configure.tgt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gas/configure.tgt b/gas/configure.tgt index 3d0415c..6df7dea 100644 --- a/gas/configure.tgt +++ b/gas/configure.tgt @@ -89,8 +89,8 @@ case ${cpu} in pj*) cpu_type=pj endian=big ;; powerpc*le*) cpu_type=ppc endian=little ;; powerpc*) cpu_type=ppc endian=big ;; - riscv32*) cpu_type=riscv endian=little arch=riscv32 ;; riscv64*) cpu_type=riscv endian=little arch=riscv64 ;; + riscv32* | riscv*) cpu_type=riscv endian=little arch=riscv32 ;; rs6000*) cpu_type=ppc ;; rl78*) cpu_type=rl78 ;; rx) cpu_type=rx ;; |