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| author | Walter Lee <walt@tilera.com> | 2012-02-25 19:51:34 +0000 |
|---|---|---|
| committer | Walter Lee <walt@tilera.com> | 2012-02-25 19:51:34 +0000 |
| commit | fb6ceddedd56805fc4fd64792a0e73baa8c22a21 (patch) | |
| tree | 035d5e8c3f9a3be2c2b82f975fcde4e4074ba612 /gas/configure.tgt | |
| parent | 825902491e89db303b036d82eef32ef0b07d4317 (diff) | |
| download | gdb-fb6ceddedd56805fc4fd64792a0e73baa8c22a21.zip gdb-fb6ceddedd56805fc4fd64792a0e73baa8c22a21.tar.gz gdb-fb6ceddedd56805fc4fd64792a0e73baa8c22a21.tar.bz2 | |
Add big-endian support for tilegx.
bfd/
* config.bfd (tilegx-*-*): rename little endian vector; add big
endian vector.
(tilegxbe-*-*): New case.
* configure.in (bfd_elf32_tilegx_vec): Rename...
(bfd_elf32_tilegx_le_vec): ... to this.
(bfd_elf32_tilegx_be_vec): New vector.
(bfd_elf64_tilegx_vec): Rename...
(bfd_elf64_tilegx_le_vec): ... to this.
(bfd_elf64_tilegx_be_vec): New vector.
* configure: Regenerate.
* elf32-tilegx.c (TARGET_LITTLE_SYM): Rename.
(TARGET_LITTLE_NAME): Ditto.
(TARGET_BIG_SYM): Define.
(TARGET_BIG_NAME): Define.
* elf64-tilegx.c (TARGET_LITTLE_SYM): Rename.
(TARGET_LITTLE_NAME): Ditto.
(TARGET_BIG_SYM): Define.
(TARGET_BIG_NAME): Define.
* targets.c (bfd_elf32_tilegx_vec): Rename...
(bfd_elf32_tilegx_le_vec): ... to this.
(bfd_elf32_tilegx_be_vec): Declare.
(bfd_elf64_tilegx_vec): Rename...
(bfd_elf64_tilegx_le_vec): ... to this.
(bfd_elf64_tilegx_be_vec): Declare.
(_bfd_target_vector): Add / rename above vectors.
binutils/testsuite/
* binutils-all/objdump.exp (cpus_expected): Add tilegx.
gas/
* tc-tilegx.c (tilegx_target_format): Handle big endian.
(OPTION_EB): Define.
(OPTION_EL): Define.
(md_longopts): Add entries for "EB" and "EL".
(md_parse_option): Handle OPTION_EB and OPTION_EL.
(md_show_usage): Add -EB and -EL.
(md_number_to_chars): New.
* tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with
ifndef.
(md_number_to_chars): Delete.
* configure.tgt (tilegx*be): Handle.
* doc/as.texinfo [TILE-Gx]: Document -EB and -EL.
* doc/c-tilegx.texi: Ditto.
ld/
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c.
(eelf32tilegx_be.c): Add rule to build this file.
(eelf64tilegx_be.c): Ditto.
* Makefile.in: Regenerate.
* configure.tgt (tilegx-*-*): Support big endian.
(tilegxbe-*-*): New.
* emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename.
(BIG_OUTPUT_FORMAT): Define.
(LITTLE_OUTPUT_FORMAT): Define.
* emulparams/elf32tilegx_be.sh: New.
* emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename.
(BIG_OUTPUT_FORMAT): Define.
(LITTLE_OUTPUT_FORMAT): Define.
* emulparams/elf64tilegx_be.sh: New.
ld/testsuite/
* ld-tilegx/reloc-be.d: New.
* ld-tilegx/reloc-le.d: New.
* ld-tilegx/reloc.d: Delete.
* ld-tilegx/tilegx.exp: Test big and little endian.
Diffstat (limited to 'gas/configure.tgt')
| -rw-r--r-- | gas/configure.tgt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/gas/configure.tgt b/gas/configure.tgt index c33bb7a..06fb6ca 100644 --- a/gas/configure.tgt +++ b/gas/configure.tgt @@ -82,6 +82,8 @@ case ${cpu} in sparclet*) cpu_type=sparc arch=sparclet ;; sparclite*) cpu_type=sparc arch=sparclite ;; sparc*) cpu_type=sparc arch=sparclite ;; # ??? See tc-sparc.c. + tilegx*be) cpu_type=tilegx endian=big ;; + tilegx*) cpu_type=tilegx endian=little ;; v850*) cpu_type=v850 ;; x86_64*) cpu_type=i386 arch=x86_64;; xtensa*) cpu_type=xtensa arch=xtensa ;; @@ -404,7 +406,7 @@ case ${generic_target} in tic54x-*-* | c54x*-*-*) fmt=coff bfd_gas=yes need_libm=yes;; tic6x-*-*) fmt=elf ;; - tilepro-*-* | tilegx-*-*) fmt=elf ;; + tilepro-*-* | tilegx*-*-*) fmt=elf ;; v850*-*-*) fmt=elf ;; |