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| author | Haochen Jiang <haochen.jiang@intel.com> | 2024-12-18 10:40:33 +0800 |
|---|---|---|
| committer | Haochen Jiang <haochen.jiang@intel.com> | 2024-12-18 10:40:33 +0800 |
| commit | 704452b488bf5a96bb9b68d7e801d1568aedbe4a (patch) | |
| tree | 055251a8964c5e8674d74dc29ac49334988d12b9 /gas/config | |
| parent | 7195f52f734578177b7044ba1a22df2ca15dad24 (diff) | |
| download | gdb-704452b488bf5a96bb9b68d7e801d1568aedbe4a.zip gdb-704452b488bf5a96bb9b68d7e801d1568aedbe4a.tar.gz gdb-704452b488bf5a96bb9b68d7e801d1568aedbe4a.tar.bz2 | |
Support Intel SM4 AVX10.2 extension
In this patch, we will support SM4 AVX10.2 extension part. It is
a promotion from VEX encoding to EVEX encoding. The EVEX encoding
is based on AVX10.2, which is the same as the upcoming MOVRS ISA.
Thus, we decide to pull AVX10.2 out to CPU_COMMON_FLAGS.
While I have also tried to merge the table like AVX/AVX512, I
choose to just templatize the table. I am okay to go either way,
but slightly prefer the templatizing one since probably SM4 would
be the only ISA with AVX10.2 needs such VEX to EVEX extension (MOVRS
does not need that). Also, it is a tendancy that we will directly
provide EVEX encodings and no VEX encodings for vector instructions
since AVX10. This will make the adding in gas/config/tc-i386.c not
that worthy.
gas/ChangeLog:
* NEWS: Support Intel SM4 EVEX instructions.
* config/tc-i386.c (_is_cpu): Handle AVX10.2.
* testsuite/gas/i386/i386.exp: Run SM4 tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/avx10_2-256-sm4-intel.d: Add SM4 tests.
* testsuite/gas/i386/avx10_2-256-sm4.d: Ditto.
* testsuite/gas/i386/avx10_2-256-sm4.s: Ditto.
* testsuite/gas/i386/avx10_2-512-sm4-intel.d: Ditto.
* testsuite/gas/i386/avx10_2-512-sm4.d: Ditto.
* testsuite/gas/i386/avx10_2-512-sm4.s: Ditto.
* testsuite/gas/i386/avx10_2-sm4-inval.l: Ditto.
* testsuite/gas/i386/avx10_2-sm4-inval.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-sm4-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-sm4.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-sm4.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-sm4-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-sm4.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-sm4.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-sm4-inval.l: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-sm4-inval.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex.h: Add evex table entry for SM4.
* i386-dis.h: Ditto.
* i386-opc.h: (i386_cpu): Move AVX10.2 to CPU_FLAGS_COMMON.
* i386-opc.tbl: Add SM4 EVEX instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Ditto.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-i386.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index aeb9b97..f508a13 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1867,6 +1867,7 @@ _is_cpu (const i386_cpu_attr *a, enum i386_cpu cpu) case CpuAVX512F: return a->bitfield.cpuavx512f; case CpuAVX512VL: return a->bitfield.cpuavx512vl; case CpuAPX_F: return a->bitfield.cpuapx_f; + case CpuAVX10_2: return a->bitfield.cpuavx10_2; case Cpu64: return a->bitfield.cpu64; case CpuNo64: return a->bitfield.cpuno64; default: |