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| author | Jan Beulich <jbeulich@suse.com> | 2019-11-08 09:04:09 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2019-11-08 09:04:09 +0100 |
| commit | 00cee14fbad24453ff56656c5726ef5e4b0de588 (patch) | |
| tree | 1b4bbeafdf3970582fbe95e092b178bacf070cd2 /gas/config | |
| parent | bab6aec1255ba2ec8de3ae0363958e2ff26ce25d (diff) | |
| download | gdb-00cee14fbad24453ff56656c5726ef5e4b0de588.zip gdb-00cee14fbad24453ff56656c5726ef5e4b0de588.tar.gz gdb-00cee14fbad24453ff56656c5726ef5e4b0de588.tar.bz2 | |
x86: convert SReg from bitfield to enumerator
This is to further shrink the operand type representation.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-i386-intel.c | 4 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 15 |
2 files changed, 10 insertions, 9 deletions
diff --git a/gas/config/tc-i386-intel.c b/gas/config/tc-i386-intel.c index 8f738b9..2116e49 100644 --- a/gas/config/tc-i386-intel.c +++ b/gas/config/tc-i386-intel.c @@ -283,7 +283,7 @@ i386_intel_simplify_register (expressionS *e) as_bad (_("invalid use of register")); return 0; } - if (i386_regtab[reg_num].reg_type.bitfield.sreg + if (i386_regtab[reg_num].reg_type.bitfield.class == SReg && i386_regtab[reg_num].reg_num == RegFlat) { as_bad (_("invalid use of pseudo-register")); @@ -984,7 +984,7 @@ i386_intel_operand (char *operand_string, int got_a_float) as_bad (_("segment register name expected")); return 0; } - if (!i386_regtab[expP->X_add_number].reg_type.bitfield.sreg) + if (i386_regtab[expP->X_add_number].reg_type.bitfield.class != SReg) { as_bad (_("invalid use of register")); return 0; diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 32f8550..fde8767 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -3048,7 +3048,7 @@ pi (const char *line, i386_insn *x) if (x->types[j].bitfield.class == Reg || x->types[j].bitfield.regmmx || x->types[j].bitfield.regsimd - || x->types[j].bitfield.sreg + || x->types[j].bitfield.class == SReg || x->types[j].bitfield.control || x->types[j].bitfield.debug || x->types[j].bitfield.test) @@ -6604,7 +6604,7 @@ check_byte_reg (void) if (i.types[op].bitfield.class == Reg || i.types[op].bitfield.regmmx || i.types[op].bitfield.regsimd - || i.types[op].bitfield.sreg + || i.types[op].bitfield.class == SReg || i.types[op].bitfield.control || i.types[op].bitfield.debug || i.types[op].bitfield.test) @@ -7034,7 +7034,7 @@ duplicate: default_seg = build_modrm_byte (); } - else if (i.types[0].bitfield.sreg) + else if (i.types[0].bitfield.class == SReg) { if (flag_code != CODE_64BIT ? i.tm.base_opcode == POP_SEG_SHORT @@ -7682,7 +7682,7 @@ build_modrm_byte (void) if (i.types[op].bitfield.class == Reg || i.types[op].bitfield.regbnd || i.types[op].bitfield.regmask - || i.types[op].bitfield.sreg + || i.types[op].bitfield.class == SReg || i.types[op].bitfield.control || i.types[op].bitfield.debug || i.types[op].bitfield.test) @@ -10058,7 +10058,7 @@ i386_att_operand (char *operand_string) op_string = end_op; if (is_space_char (*op_string)) ++op_string; - if (*op_string == ':' && r->reg_type.bitfield.sreg) + if (*op_string == ':' && r->reg_type.bitfield.class == SReg) { switch (r->reg_num) { @@ -10921,7 +10921,7 @@ parse_real_register (char *reg_string, char **end_op) return (const reg_entry *) NULL; if ((r->reg_type.bitfield.dword - || (r->reg_type.bitfield.sreg && r->reg_num > 3) + || (r->reg_type.bitfield.class == SReg && r->reg_num > 3) || r->reg_type.bitfield.control || r->reg_type.bitfield.debug || r->reg_type.bitfield.test) @@ -10969,7 +10969,8 @@ parse_real_register (char *reg_string, char **end_op) && flag_code != CODE_64BIT) return (const reg_entry *) NULL; - if (r->reg_type.bitfield.sreg && r->reg_num == RegFlat && !intel_syntax) + if (r->reg_type.bitfield.class == SReg && r->reg_num == RegFlat + && !intel_syntax) return (const reg_entry *) NULL; return r; |