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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2021-01-05 17:39:04 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2021-01-11 15:01:09 +0000 |
| commit | 82c70b08dfb47bf56ce78fbd9147d38f51ecdeb8 (patch) | |
| tree | 8027bec80ca4a29fa74c6adaa3e58dfc57f16eda /gas/config | |
| parent | c0f6e439cc59fa60fec3a4c4ff56e6fac52a8c65 (diff) | |
| download | gdb-82c70b08dfb47bf56ce78fbd9147d38f51ecdeb8.zip gdb-82c70b08dfb47bf56ce78fbd9147d38f51ecdeb8.tar.gz gdb-82c70b08dfb47bf56ce78fbd9147d38f51ecdeb8.tar.bz2 | |
aarch64: Remove support for CSRE
This patch removes support for the CSRE extension from aarch64
gas/objdump.
CSRE (FEAT_CSRE) is part of the Future Architecture Technologies program
and at this time Arm is withdrawing this particular feature.
The patch removes the system registers and the CSR PDEC instruction.
gas/ChangeLog
* NEWS: Remove CSRE.
* config/tc-aarch64.c (parse_csr_operand): Delete.
(parse_operands): Delete handling of AARCH64_OPND_CSRE_CSR.
(aarch64_features): Remove csre.
* doc/c-aarch64.texi: Remove CSRE.
* testsuite/gas/aarch64/csre.d: Delete.
* testsuite/gas/aarch64/csre-invalid.s: Likewise.
* testsuite/gas/aarch64/csre-invalid.d: Likewise.
* testsuite/gas/aarch64/csre_csr.s: Likewise.
* testsuite/gas/aarch64/csre_csr.d: Likewise.
* testsuite/gas/aarch64/csre_csr-invalid.s: Likewise.
* testsuite/gas/aarch64/csre_csr-invalid.l: Likewise.
* testsuite/gas/aarch64/csre_csr-invalid.d: Likewise.
include/ChangeLog
* opcode/aarch64.h (AARCH64_FEATURE_CSRE): Delete.
(aarch64_opnd): Delete AARCH64_OPND_CSRE_CSR.
opcodes/ChangeLog
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
* aarch64-opc.c (aarch64_print_operand): Delete handling of
AARCH64_OPND_CSRE_CSR.
* aarch64-tbl.h (aarch64_feature_csre): Delete.
(CSRE): Likewise.
(_CSRE_INSN): Likewise.
(aarch64_opcode_table): Delete csr.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-aarch64.c | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index b04605c..6f782d0 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -4036,29 +4036,6 @@ parse_barrier_psb (char **str, return 0; } -/* Parse an operand for CSR (CSRE instruction). */ - -static int -parse_csr_operand (char **str) -{ - char *p, *q; - - p = q = *str; - while (ISALPHA (*q)) - q++; - - /* Instruction has only one operand PDEC which encodes Rt field of the - operation to 0b11111. */ - if (strcasecmp(p, "pdec")) - { - set_syntax_error (_("CSR instruction accepts only PDEC")); - return PARSE_FAIL; - } - - *str = q; - return 0; -} - /* Parse an operand for BTI. Set *HINT_OPT to the hint-option record return 0 if successful. Otherwise return PARSE_FAIL. */ @@ -6793,12 +6770,6 @@ parse_operands (char *str, const aarch64_opcode *opcode) goto failure; break; - case AARCH64_OPND_CSRE_CSR: - val = parse_csr_operand (&str); - if (val == PARSE_FAIL) - goto failure; - break; - default: as_fatal (_("unhandled operand code %d"), operands[i]); } @@ -9230,8 +9201,6 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = { AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0)}, {"f64mm", AARCH64_FEATURE (AARCH64_FEATURE_F64MM, 0), AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0)}, - {"csre", AARCH64_FEATURE (AARCH64_FEATURE_CSRE, 0), - AARCH64_ARCH_NONE}, {"ls64", AARCH64_FEATURE (AARCH64_FEATURE_LS64, 0), AARCH64_ARCH_NONE}, {"flagm", AARCH64_FEATURE (AARCH64_FEATURE_FLAGM, 0), |