Initial revision

43 files changed, 24451 insertions, 0 deletions

diff --git a/gas/config/a.out.h b/gas/config/a.out.h
new file mode 100755
index 0000000..5043249
--- /dev/null
+++ b/gas/config/a.out.h
@@ -0,0 +1,150 @@
+/* This file describes the a.out file format
+   Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#ifdef USE_HP_INC_HDR
+#include "../binutils/hp-include/a.out.h"
+#else
+
+#ifdef USE_SYSTEM_HDR
+#include "/usr/include/a.out.h"
+#else
+
+#ifdef USE_HP_HDR
+/* The `exec' structure and overall layout must be close to HP's when
+   we are running on an HP system, otherwise we will not be able to
+   execute the resulting file. */
+
+struct exec
+{
+  unsigned short a_machtype;	/* machine type */
+  unsigned short a_magic;	/* magic number */
+  unsigned long a_spare1;
+  unsigned long a_spare2;
+  unsigned long a_text;		/* length of text, in bytes */
+  unsigned long a_data;		/* length of data, in bytes */
+  unsigned long a_bss;		/* length of uninitialized data area for file, in bytes */
+  unsigned long a_trsize;	/* length of relocation info for text, in bytes */
+  unsigned long a_drsize;	/* length of relocation info for data, in bytes */
+  unsigned long a_spare3;	/* HP = pascal interface size */
+  unsigned long a_spare4;	/* HP = symbol table size */
+  unsigned long a_spare5;	/* HP = debug name table size */
+  unsigned long a_entry;	/* start address */
+  unsigned long a_spare6;	/* HP = source line table size */
+  unsigned long a_spare7;	/* HP = value table size */
+  unsigned long a_syms;		/* length of symbol table data in file, in bytes */
+  unsigned long a_spare8;
+};
+
+#define N_MAGIC(exec) ((exec) . a_magic)
+#define N_MACHTYPE(exec) ((exec) . a_machtype)
+#define N_SET_MAGIC(exec, magic) (((exec) . a_magic) = (magic))
+#define N_SET_MACHTYPE(exec, machtype) (((exec) . a_machtype) = (machtype))
+
+#define N_BADMAG(x) ((_N_BADMAG (x)) || (_N_BADMACH (x)))
+
+#define _N_BADMACH(x)							\
+(((N_MACHTYPE (x)) != HP9000S200_ID) &&					\
+ ((N_MACHTYPE (x)) != HP98x6_ID))
+
+#define _N_BADMAG(x) \
+ (((x).a_magic)!=OMAGIC && ((x).a_magic)!=NMAGIC && ((x).a_magic)!=ZMAGIC)
+
+#define HP98x6_ID 0x20A
+#define HP9000S200_ID 0x20C
+
+#else
+
+	/* A Generic machine. . . */
+
+/* JF I'm not sure where this file came from.  I put the permit.text message in
+   it anyway.  This file came to me as part of the original VAX assembler, but had
+   no copyright notices in it. */
+
+struct exec {
+	long	a_magic;			/* number identifies as .o file and gives type of such. */
+	unsigned a_text;		/* length of text, in bytes */
+	unsigned a_data;		/* length of data, in bytes */
+	unsigned a_bss;		/* length of uninitialized data area for file, in bytes */
+	unsigned a_syms;		/* length of symbol table data in file, in bytes */
+	unsigned a_entry;		/* start address */
+	unsigned a_trsize;		/* length of relocation info for text, in bytes */
+	unsigned a_drsize;		/* length of relocation info for data, in bytes */
+};
+
+#define N_BADMAG(x) \
+ (((x).a_magic)!=OMAGIC && ((x).a_magic)!=NMAGIC && ((x).a_magic)!=ZMAGIC)
+
+#endif
+
+	/* From here down is common to both the HP and the generic machine */
+#define OMAGIC 0407
+#define NMAGIC 0410
+#define ZMAGIC 0413
+
+
+#define N_TXTOFF(x) \
+ ((x).a_magic == ZMAGIC ? 1024 : sizeof(struct exec))
+
+#define N_SYMOFF(x) \
+ (N_TXTOFF(x) + (x).a_text + (x).a_data + (x).a_trsize + (x).a_drsize)
+
+#define N_STROFF(x) \
+ (N_SYMOFF(x) + (x).a_syms)
+
+struct nlist {
+	union {
+		char	*n_name;
+		struct nlist *n_next;
+		long	n_strx;
+	} n_un;
+	char	n_type;
+	char	n_other;
+	short	n_desc;
+	unsigned n_value;
+};
+
+#define N_UNDF	0
+#define N_ABS	2
+#define N_TEXT	4
+#define N_DATA	6
+#define N_BSS	8
+#define N_FN	31		/* JF: Someone claims this should be 31 instead of
+			   15.  I just inherited this file; I didn't write
+			   it.  Who is right? */
+
+
+#define N_EXT 1
+#define N_TYPE 036
+#define N_STAB 0340
+
+struct relocation_info {
+	int	 r_address;
+	unsigned r_symbolnum:24,
+		 r_pcrel:1,
+		 r_length:2,
+		 r_extern:1,
+		 r_bsr:1, /* OVE: used on ns32k based systems, if you want */
+		 r_disp:1, /* OVE: used on ns32k based systems, if you want */
+		 nuthin:2;
+};
+
+#endif
+#endif
diff --git a/gas/config/atof-ieee.c b/gas/config/atof-ieee.c
new file mode 100644
index 0000000..323d4e1
--- /dev/null
+++ b/gas/config/atof-ieee.c
@@ -0,0 +1,511 @@
+/* atof_ieee.c - turn a Flonum into an IEEE floating point number
+   Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "as.h"
+
+#ifdef USG
+#define bzero(s,n) memset(s,0,n)
+#define bcopy(from,to,n) memcpy((to),(from),(n))
+#endif
+
+extern FLONUM_TYPE generic_floating_point_number; /* Flonums returned here. */
+
+#ifndef NULL
+#define NULL (0)
+#endif
+
+extern char EXP_CHARS[];
+				/* Precision in LittleNums. */
+#define MAX_PRECISION (6)
+#define F_PRECISION (2)
+#define D_PRECISION (4)
+#define X_PRECISION (6)
+#define P_PRECISION (6)
+
+				/* Length in LittleNums of guard bits. */
+#define GUARD (2)
+
+static unsigned long mask [] = {
+  0x00000000,
+  0x00000001,
+  0x00000003,
+  0x00000007,
+  0x0000000f,
+  0x0000001f,
+  0x0000003f,
+  0x0000007f,
+  0x000000ff,
+  0x000001ff,
+  0x000003ff,
+  0x000007ff,
+  0x00000fff,
+  0x00001fff,
+  0x00003fff,
+  0x00007fff,
+  0x0000ffff,
+  0x0001ffff,
+  0x0003ffff,
+  0x0007ffff,
+  0x000fffff,
+  0x001fffff,
+  0x003fffff,
+  0x007fffff,
+  0x00ffffff,
+  0x01ffffff,
+  0x03ffffff,
+  0x07ffffff,
+  0x0fffffff,
+  0x1fffffff,
+  0x3fffffff,
+  0x7fffffff,
+  0xffffffff
+  };
+
+
+static int bits_left_in_littlenum;
+static int littlenums_left;
+static LITTLENUM_TYPE *littlenum_pointer;
+
+static int
+next_bits (number_of_bits)
+     int		number_of_bits;
+{
+  int			return_value;
+
+  if(!littlenums_left)
+  	return 0;
+  if (number_of_bits >= bits_left_in_littlenum)
+    {
+      return_value  = mask [bits_left_in_littlenum] & *littlenum_pointer;
+      number_of_bits -= bits_left_in_littlenum;
+      return_value <<= number_of_bits;
+      if(--littlenums_left) {
+	      bits_left_in_littlenum = LITTLENUM_NUMBER_OF_BITS - number_of_bits;
+	      littlenum_pointer --;
+	      return_value |= (*littlenum_pointer>>bits_left_in_littlenum) & mask[number_of_bits];
+      }
+    }
+  else
+    {
+      bits_left_in_littlenum -= number_of_bits;
+      return_value = mask [number_of_bits] & (*littlenum_pointer>>bits_left_in_littlenum);
+    }
+  return (return_value);
+}
+
+/* Num had better be less than LITTLENUM_NUMBER_OF_BITS */
+static void
+unget_bits(num)
+int num;
+{
+	if(!littlenums_left) {
+		++littlenum_pointer;
+		++littlenums_left;
+		bits_left_in_littlenum=num;
+	} else if(bits_left_in_littlenum+num>LITTLENUM_NUMBER_OF_BITS) {
+		bits_left_in_littlenum= num-(LITTLENUM_NUMBER_OF_BITS-bits_left_in_littlenum);
+		++littlenum_pointer;
+		++littlenums_left;
+	} else
+		bits_left_in_littlenum+=num;
+}
+
+static void
+make_invalid_floating_point_number (words)
+     LITTLENUM_TYPE *	words;
+{
+	as_bad("cannot create floating-point number");
+	words[0]= ((unsigned)-1)>>1;	/* Zero the leftmost bit */
+	words[1]= -1;
+	words[2]= -1;
+	words[3]= -1;
+	words[4]= -1;
+	words[5]= -1;
+}
+
+/***********************************************************************\
+*	Warning: this returns 16-bit LITTLENUMs. It is up to the caller	*
+*	to figure out any alignment problems and to conspire for the	*
+*	bytes/word to be emitted in the right order. Bigendians beware!	*
+*									*
+\***********************************************************************/
+
+/* Note that atof-ieee always has X and P precisions enabled.  it is up
+   to md_atof to filter them out if the target machine does not support
+   them.  */
+
+char *				/* Return pointer past text consumed. */
+atof_ieee (str, what_kind, words)
+     char *		str;	/* Text to convert to binary. */
+     char		what_kind; /* 'd', 'f', 'g', 'h' */
+     LITTLENUM_TYPE *	words;	/* Build the binary here. */
+{
+	static LITTLENUM_TYPE	bits [MAX_PRECISION + MAX_PRECISION + GUARD];
+				/* Extra bits for zeroed low-order bits. */
+				/* The 1st MAX_PRECISION are zeroed, */
+				/* the last contain flonum bits. */
+	char *		return_value;
+	int		precision; /* Number of 16-bit words in the format. */
+	long	exponent_bits;
+
+	return_value = str;
+	generic_floating_point_number.low	= bits + MAX_PRECISION;
+	generic_floating_point_number.high	= NULL;
+	generic_floating_point_number.leader	= NULL;
+	generic_floating_point_number.exponent	= NULL;
+	generic_floating_point_number.sign	= '\0';
+
+				/* Use more LittleNums than seems */
+				/* necessary: the highest flonum may have */
+				/* 15 leading 0 bits, so could be useless. */
+
+	bzero (bits, sizeof(LITTLENUM_TYPE) * MAX_PRECISION);
+
+	switch(what_kind) {
+	case 'f':
+	case 'F':
+	case 's':
+	case 'S':
+		precision = F_PRECISION;
+		exponent_bits = 8;
+		break;
+
+	case 'd':
+	case 'D':
+	case 'r':
+	case 'R':
+		precision = D_PRECISION;
+		exponent_bits = 11;
+		break;
+
+	case 'x':
+	case 'X':
+	case 'e':
+	case 'E':
+		precision = X_PRECISION;
+		exponent_bits = 15;
+		break;
+
+	case 'p':
+	case 'P':
+		
+		precision = P_PRECISION;
+		exponent_bits= -1;
+		break;
+
+	default:
+		make_invalid_floating_point_number (words);
+		return NULL;
+	}
+
+	generic_floating_point_number.high = generic_floating_point_number.low + precision - 1 + GUARD;
+
+	if (atof_generic (& return_value, ".", EXP_CHARS, & generic_floating_point_number)) {
+		/* as_bad("Error converting floating point number (Exponent overflow?)"); */
+		make_invalid_floating_point_number (words);
+		return NULL;
+	}
+	gen_to_words(words, precision, exponent_bits);
+	return return_value;
+}
+
+/* Turn generic_floating_point_number into a real float/double/extended */
+int gen_to_words(words, precision, exponent_bits)
+LITTLENUM_TYPE *words;
+int precision;
+long exponent_bits;
+{
+	int return_value=0;
+
+	long	exponent_1;
+	long	exponent_2;
+	long	exponent_3;
+	long	exponent_4;
+	int		exponent_skippage;
+	LITTLENUM_TYPE	word1;
+	LITTLENUM_TYPE *	lp;
+
+	if (generic_floating_point_number.low > generic_floating_point_number.leader) {
+		/* 0.0e0 seen. */
+		if(generic_floating_point_number.sign=='+')
+			words[0]=0x0000;
+		else
+			words[0]=0x8000;
+		bzero (&words[1], sizeof(LITTLENUM_TYPE) * (precision-1));
+		return return_value;
+	}
+
+	/* NaN:  Do the right thing */
+	if(generic_floating_point_number.sign==0) {
+		if(precision==F_PRECISION) {
+			words[0]=0x7fff;
+			words[1]=0xffff;
+		} else {
+			words[0]=0x7fff;
+			words[1]=0xffff;
+			words[2]=0xffff;
+			words[3]=0xffff;
+		}
+		return return_value;
+	} else if(generic_floating_point_number.sign=='P') {
+		/* +INF:  Do the right thing */
+		if(precision==F_PRECISION) {
+			words[0]=0x7f80;
+			words[1]=0;
+		} else {
+			words[0]=0x7ff0;
+			words[1]=0;
+			words[2]=0;
+			words[3]=0;
+		}
+		return return_value;
+	} else if(generic_floating_point_number.sign=='N') {
+		/* Negative INF */
+		if(precision==F_PRECISION) {
+			words[0]=0xff80;
+			words[1]=0x0;
+		} else {
+			words[0]=0xfff0;
+			words[1]=0x0;
+			words[2]=0x0;
+			words[3]=0x0;
+		}
+		return return_value;
+	}
+		/*
+		 * The floating point formats we support have:
+		 * Bit 15 is sign bit.
+		 * Bits 14:n are excess-whatever exponent.
+		 * Bits n-1:0 (if any) are most significant bits of fraction.
+		 * Bits 15:0 of the next word(s) are the next most significant bits.
+		 *
+		 * So we need: number of bits of exponent, number of bits of
+		 * mantissa.
+		 */
+	bits_left_in_littlenum = LITTLENUM_NUMBER_OF_BITS;
+	littlenum_pointer = generic_floating_point_number.leader;
+	littlenums_left = 1+generic_floating_point_number.leader - generic_floating_point_number.low;
+	/* Seek (and forget) 1st significant bit */
+	for (exponent_skippage = 0;! next_bits(1); exponent_skippage ++)
+		;
+	exponent_1 = generic_floating_point_number.exponent + generic_floating_point_number.leader + 1 -
+ generic_floating_point_number.low;
+	/* Radix LITTLENUM_RADIX, point just higher than generic_floating_point_number.leader. */
+	exponent_2 = exponent_1 * LITTLENUM_NUMBER_OF_BITS;
+	/* Radix 2. */
+	exponent_3 = exponent_2 - exponent_skippage;
+	/* Forget leading zeros, forget 1st bit. */
+	exponent_4 = exponent_3 + ((1 << (exponent_bits - 1)) - 2);
+	/* Offset exponent. */
+
+	lp = words;
+
+	/* Word 1. Sign, exponent and perhaps high bits. */
+	word1 =   (generic_floating_point_number.sign == '+') ? 0 : (1<<(LITTLENUM_NUMBER_OF_BITS-1));
+
+	/* Assume 2's complement integers. */
+	if(exponent_4<1 && exponent_4>=-62) {
+		int prec_bits;
+		int num_bits;
+
+		unget_bits(1);
+		num_bits= -exponent_4;
+		prec_bits=LITTLENUM_NUMBER_OF_BITS*precision-(exponent_bits+1+num_bits);
+		if(precision==X_PRECISION && exponent_bits==15)
+			prec_bits-=LITTLENUM_NUMBER_OF_BITS+1;
+
+		if(num_bits>=LITTLENUM_NUMBER_OF_BITS-exponent_bits) {
+			/* Bigger than one littlenum */
+			num_bits-=(LITTLENUM_NUMBER_OF_BITS-1)-exponent_bits;
+			*lp++=word1;
+			if(num_bits+exponent_bits+1>=precision*LITTLENUM_NUMBER_OF_BITS) {
+				/* Exponent overflow */
+				make_invalid_floating_point_number(words);
+				return return_value;
+			}
+			if(precision==X_PRECISION && exponent_bits==15) {
+				*lp++=0;
+				*lp++=0;
+				num_bits-=LITTLENUM_NUMBER_OF_BITS-1;
+			}
+			while(num_bits>=LITTLENUM_NUMBER_OF_BITS) {
+				num_bits-=LITTLENUM_NUMBER_OF_BITS;
+				*lp++=0;
+			}
+			if(num_bits)
+				*lp++=next_bits(LITTLENUM_NUMBER_OF_BITS-(num_bits));
+		} else {
+			if(precision==X_PRECISION && exponent_bits==15) {
+				*lp++=word1;
+				*lp++=0;
+				if(num_bits==LITTLENUM_NUMBER_OF_BITS) {
+					*lp++=0;
+					*lp++=next_bits(LITTLENUM_NUMBER_OF_BITS-1);
+				} else if(num_bits==LITTLENUM_NUMBER_OF_BITS-1)
+					*lp++=0;
+				else
+					*lp++=next_bits(LITTLENUM_NUMBER_OF_BITS-1-num_bits);
+				num_bits=0;
+			} else {
+				word1|= next_bits ((LITTLENUM_NUMBER_OF_BITS-1) - (exponent_bits+num_bits));
+				*lp++=word1;
+			}
+		}
+		while(lp<words+precision)
+			*lp++=next_bits(LITTLENUM_NUMBER_OF_BITS);
+
+		/* Round the mantissa up, but don't change the number */
+		if(next_bits(1)) {
+			--lp;
+			if(prec_bits>LITTLENUM_NUMBER_OF_BITS) {
+				int n = 0;
+				int tmp_bits;
+
+				n=0;
+				tmp_bits=prec_bits;
+				while(tmp_bits>LITTLENUM_NUMBER_OF_BITS) {
+					if(lp[n]!=(LITTLENUM_TYPE)-1)
+						break;
+					--n;
+					tmp_bits-=LITTLENUM_NUMBER_OF_BITS;
+				}
+				if(tmp_bits>LITTLENUM_NUMBER_OF_BITS || (lp[n]&mask[tmp_bits])!=mask[tmp_bits]) {
+					unsigned long carry;
+
+					for (carry = 1; carry && (lp >= words); lp --) {
+						carry = * lp + carry;
+						* lp = carry;
+						carry >>= LITTLENUM_NUMBER_OF_BITS;
+					}
+				}
+			} else if((*lp&mask[prec_bits])!=mask[prec_bits])
+				lp++;
+		}
+
+		return return_value;
+	} else 	if (exponent_4 & ~ mask [exponent_bits]) {
+			/*
+			 * Exponent overflow. Lose immediately.
+			 */
+
+			/*
+			 * We leave return_value alone: admit we read the
+			 * number, but return a floating exception
+			 * because we can't encode the number.
+			 */
+		make_invalid_floating_point_number (words);
+		return return_value;
+	} else {
+		word1 |=  (exponent_4 << ((LITTLENUM_NUMBER_OF_BITS-1) - exponent_bits))
+			| next_bits ((LITTLENUM_NUMBER_OF_BITS-1) - exponent_bits);
+	}
+
+	* lp ++ = word1;
+
+	/* X_PRECISION is special: it has 16 bits of zero in the middle,
+	   followed by a 1 bit. */
+	if(exponent_bits==15 && precision==X_PRECISION) {
+		*lp++=0;
+		*lp++= 1<<(LITTLENUM_NUMBER_OF_BITS)|next_bits(LITTLENUM_NUMBER_OF_BITS-1);
+	}
+
+	/* The rest of the words are just mantissa bits. */
+	while(lp < words + precision)
+		*lp++ = next_bits (LITTLENUM_NUMBER_OF_BITS);
+
+	if (next_bits (1)) {
+		unsigned long	carry;
+			/*
+			 * Since the NEXT bit is a 1, round UP the mantissa.
+			 * The cunning design of these hidden-1 floats permits
+			 * us to let the mantissa overflow into the exponent, and
+			 * it 'does the right thing'. However, we lose if the
+			 * highest-order bit of the lowest-order word flips.
+			 * Is that clear?
+			 */
+
+
+/* #if (sizeof(carry)) < ((sizeof(bits[0]) * BITS_PER_CHAR) + 2)
+	Please allow at least 1 more bit in carry than is in a LITTLENUM.
+	We need that extra bit to hold a carry during a LITTLENUM carry
+	propagation. Another extra bit (kept 0) will assure us that we
+	don't get a sticky sign bit after shifting right, and that
+	permits us to propagate the carry without any masking of bits.
+#endif */
+		for (carry = 1, lp --; carry && (lp >= words); lp --) {
+			carry = * lp + carry;
+			* lp = carry;
+			carry >>= LITTLENUM_NUMBER_OF_BITS;
+		}
+		if ( (word1 ^ *words) & (1 << (LITTLENUM_NUMBER_OF_BITS - 1)) ) {
+			/* We leave return_value alone: admit we read the
+			 * number, but return a floating exception
+			 * because we can't encode the number.
+			 */
+			*words&= ~ (1 << (LITTLENUM_NUMBER_OF_BITS - 1));
+			/* make_invalid_floating_point_number (words); */
+			/* return return_value; */
+		}
+	}
+	return (return_value);
+}
+
+/* This routine is a real kludge.  Someone really should do it better, but
+   I'm too lazy, and I don't understand this stuff all too well anyway
+   (JF)
+ */
+void
+int_to_gen(x)
+long x;
+{
+	char buf[20];
+	char *bufp;
+
+	sprintf(buf,"%ld",x);
+	bufp= &buf[0];
+	if(atof_generic(&bufp,".", EXP_CHARS, &generic_floating_point_number))
+		as_bad("Error converting number to floating point (Exponent overflow?)");
+}
+
+#ifdef TEST
+char *
+print_gen(gen)
+FLONUM_TYPE *gen;
+{
+	FLONUM_TYPE f;
+	LITTLENUM_TYPE arr[10];
+	double dv;
+	float fv;
+	static char sbuf[40];
+
+	if(gen) {
+		f=generic_floating_point_number;
+		generic_floating_point_number= *gen;
+	}
+	gen_to_words(&arr[0],4,11);
+	bcopy(&arr[0],&dv,sizeof(double));
+	sprintf(sbuf,"%x %x %x %x %.14G   ",arr[0],arr[1],arr[2],arr[3],dv);
+	gen_to_words(&arr[0],2,8);
+	bcopy(&arr[0],&fv,sizeof(float));
+	sprintf(sbuf+strlen(sbuf),"%x %x %.12g\n",arr[0],arr[1],fv);
+	if(gen)
+		generic_floating_point_number=f;
+	return sbuf;
+}
+#endif
diff --git a/gas/config/atof-vax.c b/gas/config/atof-vax.c
new file mode 100644
index 0000000..43c81d6
--- /dev/null
+++ b/gas/config/atof-vax.c
@@ -0,0 +1,509 @@
+/* atof_vax.c - turn a Flonum into a VAX floating point number
+   Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+	/* JF added these two for md_atof() */
+#include "as.h"
+
+#include "flonum.h"
+
+
+				/* Precision in LittleNums. */
+#define MAX_PRECISION (8)
+#define H_PRECISION (8)
+#define G_PRECISION (4)
+#define D_PRECISION (4)
+#define F_PRECISION (2)
+
+				/* Length in LittleNums of guard bits. */
+#define GUARD (2)
+
+int				/* Number of chars in flonum type 'letter'. */
+atof_vax_sizeof (letter)
+     char letter;
+{
+  int	return_value;
+
+  /*
+   * Permitting uppercase letters is probably a bad idea.
+   * Please use only lower-cased letters in case the upper-cased
+   * ones become unsupported!
+   */
+  switch (letter)
+    {
+    case 'f':
+    case 'F':
+      return_value = 4;
+      break;
+
+    case 'd':
+    case 'D':
+    case 'g':
+    case 'G':
+      return_value = 8;
+      break;
+
+    case 'h':
+    case 'H':
+      return_value = 16;
+      break;
+
+    default:
+      return_value = 0;
+      break;
+    }
+  return (return_value);
+}				/* atof_vax_sizeof */
+
+static const long mask [] = {
+  0x00000000,
+  0x00000001,
+  0x00000003,
+  0x00000007,
+  0x0000000f,
+  0x0000001f,
+  0x0000003f,
+  0x0000007f,
+  0x000000ff,
+  0x000001ff,
+  0x000003ff,
+  0x000007ff,
+  0x00000fff,
+  0x00001fff,
+  0x00003fff,
+  0x00007fff,
+  0x0000ffff,
+  0x0001ffff,
+  0x0003ffff,
+  0x0007ffff,
+  0x000fffff,
+  0x001fffff,
+  0x003fffff,
+  0x007fffff,
+  0x00ffffff,
+  0x01ffffff,
+  0x03ffffff,
+  0x07ffffff,
+  0x0fffffff,
+  0x1fffffff,
+  0x3fffffff,
+  0x7fffffff,
+  0xffffffff
+  };
+
+
+/* Shared between flonum_gen2vax and next_bits */
+static int		bits_left_in_littlenum;
+static LITTLENUM_TYPE *	littlenum_pointer;
+static LITTLENUM_TYPE * littlenum_end;
+
+static int
+next_bits (number_of_bits)
+     int		number_of_bits;
+{
+  int			return_value;
+
+  if(littlenum_pointer<littlenum_end)
+  	return 0;
+  if (number_of_bits >= bits_left_in_littlenum)
+    {
+      return_value  = mask [bits_left_in_littlenum] & * littlenum_pointer;
+      number_of_bits -= bits_left_in_littlenum;
+      return_value <<= number_of_bits;
+      bits_left_in_littlenum = LITTLENUM_NUMBER_OF_BITS - number_of_bits;
+      littlenum_pointer --;
+      if(littlenum_pointer>=littlenum_end)
+	      return_value |= ( (* littlenum_pointer) >> (bits_left_in_littlenum) ) & mask [number_of_bits];
+    }
+  else
+    {
+      bits_left_in_littlenum -= number_of_bits;
+      return_value = mask [number_of_bits] & ( (* littlenum_pointer) >> bits_left_in_littlenum);
+    }
+  return (return_value);
+}
+
+static void
+make_invalid_floating_point_number (words)
+     LITTLENUM_TYPE *	words;
+{
+  * words = 0x8000;		/* Floating Reserved Operand Code */
+}
+
+static int			/* 0 means letter is OK. */
+what_kind_of_float (letter, precisionP, exponent_bitsP)
+     char		letter;	/* In: lowercase please. What kind of float? */
+     int *		precisionP; /* Number of 16-bit words in the float. */
+     long *		exponent_bitsP;	/* Number of exponent bits. */
+{
+  int	retval;			/* 0: OK. */
+
+  retval = 0;
+  switch (letter)
+    {
+    case 'f':
+      * precisionP = F_PRECISION;
+      * exponent_bitsP = 8;
+      break;
+
+    case 'd':
+      * precisionP = D_PRECISION;
+      * exponent_bitsP = 8;
+      break;
+
+    case 'g':
+      * precisionP = G_PRECISION;
+      * exponent_bitsP = 11;
+      break;
+
+    case 'h':
+      * precisionP = H_PRECISION;
+      * exponent_bitsP = 15;
+      break;
+
+    default:
+      retval = 69;
+      break;
+    }
+  return (retval);
+}
+
+/***********************************************************************\
+*									*
+*	Warning: this returns 16-bit LITTLENUMs, because that is	*
+*	what the VAX thinks in. It is up to the caller to figure	*
+*	out any alignment problems and to conspire for the bytes/word	*
+*	to be emitted in the right order. Bigendians beware!		*
+*									*
+\***********************************************************************/
+
+char *				/* Return pointer past text consumed. */
+atof_vax (str, what_kind, words)
+     char *		str;	/* Text to convert to binary. */
+     char		what_kind; /* 'd', 'f', 'g', 'h' */
+     LITTLENUM_TYPE *	words;	/* Build the binary here. */
+{
+  FLONUM_TYPE		f;
+  LITTLENUM_TYPE	bits [MAX_PRECISION + MAX_PRECISION + GUARD];
+				/* Extra bits for zeroed low-order bits. */
+				/* The 1st MAX_PRECISION are zeroed, */
+				/* the last contain flonum bits. */
+  char *		return_value;
+  int			precision; /* Number of 16-bit words in the format. */
+  long		exponent_bits;
+
+  return_value = str;
+  f . low	= bits + MAX_PRECISION;
+  f . high	= NULL;
+  f . leader	= NULL;
+  f . exponent	= NULL;
+  f . sign	= '\0';
+
+  if (what_kind_of_float (what_kind, & precision, & exponent_bits))
+    {
+      return_value = NULL;	/* We lost. */
+      make_invalid_floating_point_number (words);
+    }
+  if (return_value)
+    {
+      bzero (bits, sizeof(LITTLENUM_TYPE) * MAX_PRECISION);
+
+				/* Use more LittleNums than seems */
+				/* necessary: the highest flonum may have */
+				/* 15 leading 0 bits, so could be useless. */
+      f . high = f . low + precision - 1 + GUARD;
+
+      if (atof_generic (& return_value, ".", "eE", & f))
+	{
+	  make_invalid_floating_point_number (words);
+	  return_value = NULL;	/* we lost */
+	}
+      else
+	{
+	  if (flonum_gen2vax (what_kind, & f, words))
+	    {
+	      return_value = NULL;
+	    }
+	}
+    }
+  return (return_value);
+}
+
+/*
+ * In: a flonum, a vax floating point format.
+ * Out: a vax floating-point bit pattern.
+ */
+
+int				/* 0: OK. */
+flonum_gen2vax (format_letter, f, words)
+     char		format_letter; /* One of 'd' 'f' 'g' 'h'. */
+     FLONUM_TYPE *	f;
+     LITTLENUM_TYPE *	words;	/* Deliver answer here. */
+{
+  LITTLENUM_TYPE *	lp;
+  int			precision;
+  long		exponent_bits;
+  int			return_value; /* 0 == OK. */
+
+  return_value = what_kind_of_float (format_letter, & precision, & exponent_bits);
+  if (return_value != 0)
+    {
+      make_invalid_floating_point_number (words);
+    }
+  else
+    {
+      if (f -> low > f -> leader)
+	{
+	  /* 0.0e0 seen. */
+	  bzero (words, sizeof(LITTLENUM_TYPE) * precision);
+	}
+      else
+	{
+	  long		exponent_1;
+	  long		exponent_2;
+	  long		exponent_3;
+	  long		exponent_4;
+	  int		exponent_skippage;
+	  LITTLENUM_TYPE	word1;
+
+		/* JF: Deal with new Nan, +Inf and -Inf codes */
+	  if(f->sign!='-' && f->sign!='+') {
+	    make_invalid_floating_point_number(words);
+	    return return_value;
+	  }
+	  /*
+	   * All vaxen floating_point formats (so far) have:
+	   * Bit 15 is sign bit.
+	   * Bits 14:n are excess-whatever exponent.
+	   * Bits n-1:0 (if any) are most significant bits of fraction.
+	   * Bits 15:0 of the next word are the next most significant bits.
+	   * And so on for each other word.
+	   *
+	   * All this to be compatible with a KF11?? (Which is still faster
+	   * than lots of vaxen I can think of, but it also has higher
+	   * maintenance costs ... sigh).
+	   *
+	   * So we need: number of bits of exponent, number of bits of
+	   * mantissa.
+	   */
+	  
+#ifdef NEVER  /******* This zeroing seems redundant - Dean 3may86 **********/
+	  /*
+	   * No matter how few bits we got back from the atof()
+	   * routine, add enough zero littlenums so the rest of the
+	   * code won't run out of "significant" bits in the mantissa.
+	   */
+	  {
+	    LITTLENUM_TYPE * ltp;
+	    for (ltp = f -> leader + 1;
+		 ltp <= f -> low + precision;
+		 ltp ++)
+	      {
+		* ltp = 0;
+	      }
+	  }
+#endif
+	  
+	  bits_left_in_littlenum = LITTLENUM_NUMBER_OF_BITS;
+	  littlenum_pointer = f -> leader;
+	  littlenum_end = f->low;
+	  /* Seek (and forget) 1st significant bit */
+	  for (exponent_skippage = 0;
+	       ! next_bits(1);
+	       exponent_skippage ++)
+	    {
+	    }
+	  exponent_1 = f -> exponent + f -> leader + 1 - f -> low;
+	  /* Radix LITTLENUM_RADIX, point just higher than f -> leader. */
+	  exponent_2 = exponent_1 * LITTLENUM_NUMBER_OF_BITS;
+	  /* Radix 2. */
+	  exponent_3 = exponent_2 - exponent_skippage;
+	  /* Forget leading zeros, forget 1st bit. */
+	  exponent_4 = exponent_3 + (1 << (exponent_bits - 1));
+	  /* Offset exponent. */
+	  
+	  if (exponent_4 & ~ mask [exponent_bits])
+	    {
+	      /*
+	       * Exponent overflow. Lose immediately.
+	       */
+	      
+	      make_invalid_floating_point_number (words);
+	      
+	      /*
+	       * We leave return_value alone: admit we read the
+	       * number, but return a floating exception
+	       * because we can't encode the number.
+	       */
+	    }
+	  else
+	    {
+	      lp = words;
+	      
+	      /* Word 1. Sign, exponent and perhaps high bits. */
+	      /* Assume 2's complement integers. */
+	      word1 = ((exponent_4 & mask [exponent_bits]) << (15 - exponent_bits))
+		|       ((f -> sign == '+') ? 0 : 0x8000)
+		  |	next_bits (15 - exponent_bits);
+	      * lp ++ = word1;
+	      
+	      /* The rest of the words are just mantissa bits. */
+	      for (; lp < words + precision; lp++)
+		{
+		  * lp = next_bits (LITTLENUM_NUMBER_OF_BITS);
+		}
+	      
+	      if (next_bits (1))
+		{
+		  /*
+		   * Since the NEXT bit is a 1, round UP the mantissa.
+		   * The cunning design of these hidden-1 floats permits
+		   * us to let the mantissa overflow into the exponent, and
+		   * it 'does the right thing'. However, we lose if the
+		   * highest-order bit of the lowest-order word flips.
+		   * Is that clear?
+		   */
+		  
+		  unsigned long	carry;
+		  
+		  /*
+		    #if (sizeof(carry)) < ((sizeof(bits[0]) * BITS_PER_CHAR) + 2)
+		    Please allow at least 1 more bit in carry than is in a LITTLENUM.
+		    We need that extra bit to hold a carry during a LITTLENUM carry
+		    propagation. Another extra bit (kept 0) will assure us that we
+		    don't get a sticky sign bit after shifting right, and that
+		    permits us to propagate the carry without any masking of bits.
+		    #endif
+		    */
+		  for (carry = 1, lp --;
+		       carry && (lp >= words);
+		       lp --)
+		    {
+		      carry = * lp + carry;
+		      * lp = carry;
+		      carry >>= LITTLENUM_NUMBER_OF_BITS;
+		    }
+		  
+		  if ( (word1 ^ *words) & (1 << (LITTLENUM_NUMBER_OF_BITS - 1)) )
+		    {
+		      make_invalid_floating_point_number (words);
+		      /*
+		       * We leave return_value alone: admit we read the
+		       * number, but return a floating exception
+		       * because we can't encode the number.
+		       */
+		    }
+		}		/* if (we needed to round up) */
+	    }			/* if (exponent overflow) */
+	}			/* if (0.0e0) */
+    }				/* if (float_type was OK) */
+  return (return_value);
+}
+
+
+/* JF this used to be in vax.c but this looks like a better place for it */
+
+/*
+ *		md_atof()
+ *
+ * In:	input_line_pointer -> the 1st character of a floating-point
+ *		number.
+ *	1 letter denoting the type of statement that wants a
+ *		binary floating point number returned.
+ *	Address of where to build floating point literal.
+ *		Assumed to be 'big enough'.
+ *	Address of where to return size of literal (in chars).
+ *
+ * Out:	Input_line_pointer -> of next char after floating number.
+ *	Error message, or "".
+ *	Floating point literal.
+ *	Number of chars we used for the literal.
+ */
+
+#define MAXIMUM_NUMBER_OF_LITTLENUMS (8) /* For .hfloats. */
+
+char *
+md_atof (what_statement_type, literalP, sizeP)
+     char	what_statement_type;
+     char *	literalP;
+     int *	sizeP;
+{
+  LITTLENUM_TYPE	words [MAXIMUM_NUMBER_OF_LITTLENUMS];
+  register char		kind_of_float;
+  register int		number_of_chars;
+  register LITTLENUM_TYPE * littlenum_pointer;
+
+  switch (what_statement_type)
+    {
+    case 'F':			/* .float */
+    case 'f':			/* .ffloat */
+      kind_of_float = 'f';
+      break;
+
+    case 'D':			/* .double */
+    case 'd':			/* .dfloat */
+      kind_of_float = 'd';
+      break;
+
+    case 'g':			/* .gfloat */
+      kind_of_float = 'g';
+      break;
+
+    case 'h':			/* .hfloat */
+      kind_of_float = 'h';
+      break;
+
+    default:
+      kind_of_float = 0;
+      break;
+    };
+
+  if (kind_of_float)
+    {
+      register LITTLENUM_TYPE * limit;
+
+      input_line_pointer = atof_vax (input_line_pointer,
+				     kind_of_float,
+				     words);
+      /*
+       * The atof_vax() builds up 16-bit numbers.
+       * Since the assembler may not be running on
+       * a little-endian machine, be very careful about
+       * converting words to chars.
+       */
+      number_of_chars = atof_vax_sizeof (kind_of_float);
+      know( number_of_chars <= MAXIMUM_NUMBER_OF_LITTLENUMS * sizeof(LITTLENUM_TYPE) );
+      limit = words + (number_of_chars / sizeof(LITTLENUM_TYPE));
+      for (littlenum_pointer = words;
+	   littlenum_pointer < limit;
+	   littlenum_pointer ++)
+	{
+	  md_number_to_chars (literalP, * littlenum_pointer, sizeof(LITTLENUM_TYPE));
+	  literalP += sizeof(LITTLENUM_TYPE);
+	};
+    }
+  else
+    {
+      number_of_chars = 0;
+    };
+
+  * sizeP = number_of_chars;
+  return (kind_of_float ? "" : "Bad call to md_atof()");
+}				/* md_atof() */
+
+/* atof_vax.c */
diff --git a/gas/config/coff.gnu.h b/gas/config/coff.gnu.h
new file mode 100755
index 0000000..281ac17
--- /dev/null
+++ b/gas/config/coff.gnu.h
@@ -0,0 +1,568 @@
+/*** coff information for 80960.  Origins: Intel, AMD, etc., natch. */
+
+/*
+ * At this point I'm sure this file is right for i960 and I'm pretty sure it's
+ * right for a29k, although it hasn't been tested rigorously.  Please feel free
+ * to add your own machine's description here.  Without that info, it isn't
+ * possible to build cross development tools from elsewhere nor is it easy to
+ * continue to support your machines format.
+ *
+ * The TC_foo ifdef's are mine.  They are what gas uses.  The other ifdef's
+ * remain for documentation from other scavenged files.   xoxorich.
+ */
+
+/* $Id$ */
+
+/********************** FILE HEADER **********************/
+
+struct filehdr {
+	unsigned short	f_magic;	/* magic number			*/
+	unsigned short	f_nscns;	/* number of sections		*/
+	long		f_timdat;	/* time & date stamp		*/
+	long		f_symptr;	/* file pointer to symtab	*/
+	long		f_nsyms;	/* number of symtab entries	*/
+	unsigned short	f_opthdr;	/* sizeof(optional hdr)		*/
+	unsigned short	f_flags;	/* flags			*/
+};
+
+/* Bits for f_flags:
+ *	F_RELFLG	relocation info stripped from file
+ *	F_EXEC		file is executable (no unresolved externel references)
+ *	F_LNNO		line nunbers stripped from file
+ *	F_LSYMS		local symbols stripped from file
+ *	F_AR32WR	file has byte ordering of an AR32WR machine (e.g. vax)
+ */
+#define F_RELFLG	(0x0001)
+#define F_EXEC		(0x0002)
+#define F_LNNO		(0x0004)
+#define F_LSYMS		(0x0008)
+
+#ifdef TC_I960
+#define F_AR32WR	(0x0010) /* File has 32 bits per word, least
+				    significant byte first. */
+#else /* TC_I960 */
+#define F_AR32WR	(0x0100)
+#endif /* TC_I960 */
+
+#define F_MINMAL	(0x0010) /* ??? */
+#define F_UPDATE	(0x0020) /* ??? */
+#define F_SWABD		(0x0040) /* ??? */
+#define F_AR16WR	(0x0080) /* File has the byte ordering used by
+				    the PDP*-11/70 processor. */
+#define F_AR32W		(0x0200) /* File has 32 bits per word, most
+				    significant byte first. */
+
+/*
+ *	Intel 80960 (I960) processor flags.
+ *	F_I960TYPE == mask for processor type field. 
+ */
+
+#define	F_I960TYPE	(0xf000)
+#define	F_I960CORE	(0x1000)
+#define	F_I960KB	(0x2000)
+#define	F_I960SB	(0x2000)
+#define	F_I960MC	(0x3000)
+#define	F_I960XA	(0x4000)
+#define	F_I960CA	(0x5000)
+#define	F_I960KA	(0x6000)
+#define	F_I960SA	(0x6000)
+
+/*
+ * i80960 Magic Numbers
+ */
+
+#define I960ROMAGIC	(0x160)	/* read-only text segments */
+#define I960RWMAGIC	(0x161)	/* read-write text segments */
+
+#define I960BADMAG(x) (((x).f_magic != I960ROMAGIC) && ((x).f_magic != I960RWMAGIC))
+
+#define	SIPFBOMAGIC	(0x17a)	/* Am29000 (Byte 0 is MSB - Big Endian) */
+#define	SIPRBOMAGIC	(0x17b)	/* Am29000 (Byte 0 is LSB - Little Endian) */
+
+#define A29KBADMAG(x)	(((x).f_magic != SIPFBOMAGIC) && ((x).f_magic != SIPRBOMAGIC))
+
+#define	FILHDR	struct filehdr
+#define	FILHSZ	sizeof(FILHDR)
+
+
+/********************** AOUT "OPTIONAL HEADER" **********************/
+
+typedef struct {
+	unsigned long	phys_addr;
+	unsigned long	bitarray;
+} TAGBITS;
+
+/*  These appear to be used only by exec(2).  I don't know who cares
+    about them in a cross development environment.  In any case, this
+    is my collection after researching the issue for a few hours.
+    Apparently, most have these have remained essentially unchanged
+    since v7 days, although a few new ones have been added.  xoxorich. */
+
+#define BAD0MAGIC	(0401) /* (?) "lpd (UNIX/RT)" */
+#define BAD1MAGIC	(0405) /* (?) overlay */
+#define	OMAGIC		(0407) /* old impure format. data immediately
+				  follows text. both sections are rw. */
+#define	NMAGIC		(0410) /* split i&d, read-only text */
+#define A_MAGIC3	(0411) /* (?) "separated I&D" */
+#define	ZMAGIC		(0413) /* like NMAGIC, but demand loaded */
+#define PAGEMAGIC2	(0414) /* (?) like ZMAGIC, but address zero
+				  explicitly unmapped. */
+#define REGMAGIC	(0414) /* (?) a PAGEMAGIC2 alias? */
+#define PAGEMAGIC3	(0415) /* (?) like ZMAGIC, but address zero mapped. */
+#define A_MAGIC5	(0437) /* (?) "system overlay, separated I&D" */
+ /* intended for non-unix cross development */
+#define SASMAGIC	(010000) /* Single Address Space */    
+#define MASMAGIC	(020000) /* (?) "Multiple (separate I & D) Address Spaces" */
+
+typedef	struct aouthdr {
+	short		magic;	/* type of file				*/
+	short		vstamp;	/* version stamp			*/
+	unsigned long	tsize;	/* text size in bytes, padded to FW bdry*/
+	unsigned long	dsize;	/* initialized data "  "		*/
+	unsigned long	bsize;	/* uninitialized data "   "		*/
+#if U3B
+	unsigned long	dum1;
+	unsigned long	dum2;	/* pad to entry point	*/
+#endif
+	unsigned long	entry;	/* entry pt.				*/
+	unsigned long	text_start;	/* base of text used for this file */
+	unsigned long	data_start;	/* base of data used for this file */
+ /* CAREFUL: some formats omit the tagentries member. */
+	unsigned long	tagentries;	/* number of tag entries to
+					   follow (always zero for i960) */
+} AOUTHDR;
+
+/* return a pointer to the tag bits array */
+
+#define TAGPTR(aout) ((TAGBITS *) (&(aout.tagentries)+1))
+
+/* compute size of a header */
+
+/*#define AOUTSZ(aout) (sizeof(AOUTHDR)+(aout.tagentries*sizeof(TAGBITS)))*/
+#define AOUTSZ (sizeof(AOUTHDR))
+
+
+/********************** STORAGE CLASSES **********************/
+
+#define C_EFCN		-1	/* physical end of function */
+#define C_NULL		0
+#define C_AUTO		1	/* automatic variable */
+#define C_EXT		2	/* external symbol */
+#define C_STAT		3	/* static */
+#define C_REG		4	/* register variable */
+#define C_EXTDEF	5	/* external definition */
+#define C_LABEL		6	/* label */
+#define C_ULABEL	7	/* undefined label */
+#define C_MOS		8	/* member of structure */
+#define C_ARG		9	/* function argument */
+#define C_STRTAG	10	/* structure tag */
+#define C_MOU		11	/* member of union */
+#define C_UNTAG		12	/* union tag */
+#define C_TPDEF		13	/* type definition */
+#define C_USTATIC	14	/* undefined static */
+#define C_ENTAG		15	/* enumeration tag */
+#define C_MOE		16	/* member of enumeration */
+#define C_REGPARM	17	/* register parameter */
+#define C_FIELD		18	/* bit field */
+
+#ifdef TC_I960
+#define C_AUTOARG	19	/* auto argument */
+#define C_LASTENT	20	/* dummy entry (end of block) */
+#endif /* TC_I960 */
+
+#ifdef TC_A29K
+#define C_GLBLREG	19		/* global register */
+#define C_EXTREG	20		/* external global register */
+#define	C_DEFREG	21		/* ext. def. of global register */
+#define C_STARTOF	22		/* as29 $SIZEOF and $STARTOF symbols */
+#endif /* TC_A29K */
+
+#define C_BLOCK		100	/* ".bb" or ".eb" */
+#define C_FCN		101	/* ".bf" or ".ef" */
+#define C_EOS		102	/* end of structure */
+#define C_FILE		103	/* file name */
+#define C_LINE		104	/* line # reformatted as symbol table entry */
+#define C_ALIAS	 	105	/* duplicate tag */
+#define C_HIDDEN	106	/* ext symbol in dmert public lib. like static,
+				   used to avoid name conflicts. */
+
+#ifdef TC_I960
+	/* New storage classes for 80960 */
+#define C_SCALL		107	/* Procedure reachable via system call	*/
+ /* C_LEAFPROC is obsolete.  Use C_LEAFEXT or C_LEAFSTAT */
+#define C_LEAFPROC	108	/* Leaf procedure, "call" via BAL */
+#define C_LEAFEXT       108
+#define C_OPTVAR	109	/* Optimized variable */
+#define C_DEFINE	110	/* Preprocessor #define */
+#define C_PRAGMA	111	/* Advice to compiler or linker	*/
+#define C_SEGMENT	112	/* 80960 segment name */
+#define C_LEAFSTAT      113     /* Static leaf */
+#endif /* TC_I960 */
+
+#ifdef TC_A29K
+#define C_SHADOW	107 /* shadow symbol */
+#endif /* TC_A29K */
+
+/********************** SECTION HEADER **********************/
+
+struct scnhdr {
+	char		s_name[8];	/* section name */
+	long		s_paddr;	/* physical address, aliased s_nlib */
+	long		s_vaddr;	/* virtual address */
+	long		s_size;		/* section size */
+	long		s_scnptr;	/* file ptr to raw data for section */
+	long		s_relptr;	/* file ptr to relocation */
+	long		s_lnnoptr;	/* file ptr to line numbers */
+	unsigned short	s_nreloc;	/* number of relocation entries	*/
+	unsigned short	s_nlnno;	/* number of line number entries */
+	long		s_flags;	/* flags */
+
+#ifdef TC_I960
+	unsigned long	s_align;	/* section alignment */
+#endif /* TC_I960 */
+};
+
+#define	SCNHDR	struct scnhdr
+#define	SCNHSZ	sizeof(SCNHDR)
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT	".text"
+#define _DATA	".data"
+#define _BSS	".bss"
+
+/*
+ * s_flags "type"
+ */
+
+/*
+ * In instances where it is necessary for a linker to
+ * produce an output file which contains text or data not
+ * based at virtual address 0, e.g. for a ROM, then the
+ * linker should accept address base information as command
+ * input and use PAD sections to skip over unused addresses.
+ * (at least for a29k.  Maybe others.)
+ */
+
+#define STYP_REG	 (0x0000) /* "regular" section: allocated, relocated, loaded */
+#define STYP_DSECT	 (0x0001) /* "dummy" section: not allocated, relocated, not loaded */
+#define STYP_NOLOAD	 (0x0002) /* "noload" section: allocated, relocated, not loaded */
+#define STYP_GROUP	 (0x0004) /* "grouped" section: formed of input sections */
+#define STYP_PAD	 (0x0008) /* "padding" section: not allocated, not relocated, loaded */
+#define STYP_COPY	 (0x0010) /* "copy" section: for decision function used by field update;  not allocated, not relocated,
+				     loaded; reloc & lineno entries processed normally */
+#define STYP_TEXT	 (0x0020) /* section contains text only */
+#define S_SHRSEG	 (0x0020) /* In 3b Update files (output of ogen), sections which appear in SHARED segments of the Pfile
+				     will have the S_SHRSEG flag set by ogen, to inform dufr that updating 1 copy of the proc. will
+				     update all process invocations. */
+#define STYP_DATA	 (0x0040) /* section contains data only */
+#define STYP_BSS	 (0x0080) /* section contains bss only */
+#define S_NEWFCN	 (0x0100) /* In a minimal file or an update file, a new function (as compared with a replaced function) */
+#define STYP_INFO	 (0x0200) /* comment section : not allocated not relocated, not loaded */
+#define STYP_OVER	 (0x0400) /* overlay section : relocated not allocated or loaded */
+#define STYP_LIB	 (0x0800) /* for .lib section : same as INFO */
+#define STYP_MERGE	 (0x2000) /* merge section -- combines with text, data or bss sections only */
+#define STYP_REVERSE_PAD (0x4000) /* section will be padded with no-op instructions wherever padding is necessary and there is a
+				     word of contiguous bytes beginning on a word boundary. */
+
+#ifdef TC_A29K
+/* NOTE:  The use of STYP_BSSREG for relocation is not yet defined. */
+#define	STYP_BSSREG	0x1200	/* Global register area (like STYP_INFO) */
+#define STYP_ENVIR	0x2200	/* Environment (like STYP_INFO) */
+#define STYP_ABS	0x4000	/* Absolute (allocated, not reloc, loaded) */
+#define STYP_LIT	0x8020	/* Literal data (like STYP_TEXT) */
+#endif /* TC_A29K */
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct lineno {
+	union {
+		long l_symndx;	/* symbol index of function name, iff l_lnno == 0*/
+		long l_paddr;	/* (physical) address of line number */
+	} l_addr;
+	unsigned short	l_lnno;	/* line number */
+#ifdef TC_I960
+ /* not used on a29k */
+	char padding[2];	/* force alignment */
+#endif /* TC_I960 */
+};
+
+#define	LINENO	struct lineno
+#define	LINESZ	sizeof(LINENO) 
+
+
+/********************** SYMBOLS **********************/
+
+#define SYMNMLEN	8	/* # characters in a symbol name	*/
+#define FILNMLEN	14	/* # characters in a file name		*/
+#define DIMNUM		4	/* # array dimensions in auxiliary entry */
+
+struct syment {
+	union {
+		char	_n_name[SYMNMLEN];	/* old COFF version	*/
+		struct {
+			long	_n_zeroes;	/* new == 0		*/
+			long	_n_offset;	/* offset into string table */
+		} _n_n;
+		char	*_n_nptr[2];	/* allows for overlaying	*/
+	} _n;
+	long		n_value;	/* value of symbol		*/
+	short		n_scnum;	/* section number		*/
+
+#ifdef TC_I960
+ /* This isn't yet used on the i960.  In some formats this
+    is two bytes of padding.  In others, it is missing entirely. */
+	unsigned short	n_flags;	/* copy of flags from filhdr	*/
+#endif /* TC_I960 */
+
+#ifdef TC_A29K
+	unsigned short	n_type;		/* type and derived type	*/
+#else /* TC_A29K */
+ /* at least i960 uses long */
+	unsigned long	n_type;		/* type and derived type	*/
+#endif /* TC_A29K */
+
+	char		n_sclass;	/* storage class		*/
+	char		n_numaux;	/* number of aux. entries	*/
+
+#ifndef TC_A29K
+	char		pad2[2];	/* force alignment		*/
+#endif /* TC_A29K */
+};
+
+#define	SYMENT	struct syment
+#define	SYMESZ	sizeof(SYMENT) /* This had better also be sizeof(AUXENT) */
+
+#define n_name		_n._n_name
+#define n_ptr		_n._n_nptr[1]
+#define n_zeroes	_n._n_n._n_zeroes
+#define n_offset	_n._n_n._n_offset
+
+/*
+ * Relocatable symbols have number of the section in which they are defined,
+ * or one of the following:
+ */
+
+#define N_SCNUM	((short) 1-65535) /* section num where symbol defined */
+#define N_UNDEF	((short)0)  /* undefined symbol */
+#define N_ABS	((short)-1) /* value of symbol is absolute */
+#define N_DEBUG	((short)-2) /* debugging symbol -- symbol value is meaningless */
+#define N_TV	((short)-3) /* indicates symbol needs preload transfer vector */
+#define P_TV	((short)-4) /* indicates symbol needs transfer vector (postload) */
+
+/*
+ * Type of a symbol, in low 4 bits of the word
+ */
+#define T_NULL		0 /* type not assigned */
+#define T_VOID		1 /* function argument (only used by compiler) (but now
+			     real void). */
+#define T_CHAR		2 /* character */
+#define T_SHORT		3 /* short integer */
+#define T_INT		4 /* integer */
+#define T_LONG		5 /* long integer */
+#define T_FLOAT		6 /* floating point */
+#define T_DOUBLE	7 /* double word */
+#define T_STRUCT	8 /* structure */
+#define T_UNION		9 /* union */
+#define T_ENUM		10 /* enumeration */
+#define T_MOE		11 /* member of enumeration */
+#define T_UCHAR		12 /* unsigned character */
+#define T_USHORT	13 /* unsigned short */
+#define T_UINT		14 /* unsigned integer */
+#define T_ULONG		15 /* unsigned long */
+
+#ifdef TC_I960
+#define T_LNGDBL	16	/* long double */
+#endif /* TC_I960 */
+
+/*
+ * derived types, in n_type
+ */
+#define DT_NON		(0)	/* no derived type */
+#define DT_PTR		(1)	/* pointer */
+#define DT_FCN		(2)	/* function */
+#define DT_ARY		(3)	/* array */
+
+#ifndef TC_I960
+
+#define N_BTMASK	(0x0f)
+#define N_TMASK		(0x30)
+#define N_BTSHFT	(4)
+#define N_TSHIFT	(2)
+
+#else /* TC_I960 */
+
+#define N_BTMASK	(0x1f)
+#define N_TMASK		(0x60)
+#define N_BTSHFT	(5)
+#define N_TSHIFT	(2)
+
+#endif /* TC_I960 */
+
+#define BTYPE(x)	((x) & N_BTMASK)
+
+#define ISPTR(x)	(((x) & N_TMASK) == (DT_PTR << N_BTSHFT))
+#define ISFCN(x)	(((x) & N_TMASK) == (DT_FCN << N_BTSHFT))
+#define ISARY(x)	(((x) & N_TMASK) == (DT_ARY << N_BTSHFT))
+
+#define DECREF(x) ((((x)>>N_TSHIFT)&~N_BTMASK)|((x)&N_BTMASK))
+
+union auxent {
+	struct {
+		long x_tagndx;	/* str, un, or enum tag indx */
+		union {
+			struct {
+			    unsigned short x_lnno; /* declaration line number */
+			    unsigned short x_size; /* str/union/array size */
+			} x_lnsz;
+			long x_fsize;	/* size of function */
+		} x_misc;
+		union {
+			struct {		/* if ISFCN, tag, or .bb */
+			    long x_lnnoptr;	/* ptr to fcn line # */
+			    long x_endndx;	/* entry ndx past block end */
+			} x_fcn;
+			struct {		/* if ISARY, up to 4 dimen. */
+			    unsigned short x_dimen[DIMNUM];
+			} x_ary;
+		} x_fcnary;
+		unsigned short x_tvndx;		/* tv index */
+	} x_sym;
+
+ /* This was just a struct x_file with x_fname only in a29k.  xoxorich. */
+	union {
+		char x_fname[FILNMLEN];
+		struct {
+			long x_zeroes;
+			long x_offset;
+		} x_n;
+	} x_file;
+
+	struct {
+		long x_scnlen;			/* section length */
+		unsigned short x_nreloc;	/* # relocation entries */
+		unsigned short x_nlinno;	/* # line numbers */
+	} x_scn;
+
+	struct {
+		long		x_tvfill;	/* tv fill value */
+		unsigned short	x_tvlen;	/* length of .tv */
+
+ /* This field was typo'd x_tvrna on a29k. xoxorich. */
+		unsigned short	x_tvran[2];	/* tv range */
+	} x_tv;		/* info about .tv section (in auxent of symbol .tv)) */
+
+#ifdef TC_I960
+	/******************************************
+	 *  I960-specific *2nd* aux. entry formats
+	 ******************************************/
+	struct {
+ /* This is a very old typo that keeps getting propogated. */
+#define x_stdindx x_stindx
+		long x_stindx;	/* sys. table entry */
+	} x_sc;	/* system call entry */
+
+	struct {
+		unsigned long x_balntry; /* BAL entry point */
+	} x_bal; /* BAL-callable function */
+
+	struct {
+		unsigned long	x_timestamp;	        /* time stamp */
+		char 	x_idstring[20];	        /* producer identity string */
+	} x_ident;	                        /* Producer ident info */
+
+	char a[sizeof(struct syment)];	/* force auxent/syment sizes to match */
+#endif /* TC_I960 */
+};
+
+#define	AUXENT	union auxent
+#define	AUXESZ	sizeof(AUXENT) /* This had better also be sizeof(SYMENT) */
+
+#if VAX || I960
+#	define _ETEXT	"_etext"
+#else
+#	define _ETEXT	"etext"
+#endif
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+struct reloc {
+	long r_vaddr;		/* Virtual address of reference */
+	long r_symndx;		/* Index into symbol table */
+	unsigned short r_type;	/* Relocation type */
+#ifdef TC_I960
+ /* not used for a29k */
+	char pad[2];		/* Unused */
+#endif /* TC_I960 */
+};
+
+#define RELOC struct reloc
+#define RELSZ sizeof(RELOC)
+
+#ifdef TC_I960
+#define R_RELLONG	(0x11)	/* Direct 32-bit relocation */
+#define R_IPRSHORT	(0x18)
+#define R_IPRMED 	(0x19)	/* 24-bit ip-relative relocation */
+#define R_IPRLONG	(0x1a)
+#define R_OPTCALL	(0x1b)	/* 32-bit optimizable call (leafproc/sysproc) */
+#define R_OPTCALLX	(0x1c)	/* 64-bit optimizable call (leafproc/sysproc) */
+#define R_GETSEG	(0x1d)
+#define R_GETPA		(0x1e)
+#define R_TAGWORD	(0x1f)
+#endif /* TC_I960 */
+
+#ifdef TC_A29K
+/*
+ * NOTE: All the "I" forms refer to Am29000 instruction
+ * formats.  The linker is expected to know how the numeric
+ * information is split and/or aligned within the
+ * instruction word(s).  R_BYTE works for instructions, too.
+ *
+ * If the parameter to a CONSTH instruction is a relocatable
+ * type, two relocation records are written.  The first has
+ * an r_type of R_IHIHALF (33 octal) and a normal r_vaddr
+ * and r_symndx.  The second relocation record has an r_type
+ * of R_IHCONST (34 octal), a normal r_vaddr (which is
+ * redundant), and an r_symndx containing the 32-bit
+ * constant offset to the relocation instead of the actual
+ * symbol table index.  This second record is always
+ * written, even if the constant offset is zero.  The
+ * constant fields of the instruction are set to zero.
+ */
+
+#define	R_ABS		(0x00) /* reference is absolute */
+#define	R_IREL		(0x18) /* instruction relative (jmp/call) */
+#define	R_IABS		(0x19) /* instruction absolute (jmp/call) */
+#define	R_ILOHALF	(0x1a) /* instruction low half  (const)  */
+#define	R_IHIHALF	(0x1b) /* instruction high half (consth) part 1 */
+#define	R_IHCONST	(0x1c) /* instruction high half (consth) part 2
+				  constant offset of R_IHIHALF relocation */
+#define	R_BYTE		(0x1d) /* relocatable byte value */
+#define R_HWORD		(0x1e) /* relocatable halfword value */
+#define R_WORD		(0x1f) /* relocatable word value */
+#define	R_IGLBLRC	(0x20) /* instruction global register RC */
+#define	R_IGLBLRA	(0x21) /* instruction global register RA */
+#define	R_IGLBLRB	(0x22) /* instruction global register RB */
+#endif /* TC_A29K */
+
+
+#define DEFAULT_DATA_SECTION_ALIGNMENT 4
+#define DEFAULT_BSS_SECTION_ALIGNMENT 4
+#define DEFAULT_TEXT_SECTION_ALIGNMENT 16
+/* For new sections we havn't heard of before */
+#define DEFAULT_SECTION_ALIGNMENT 4
+
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * End:
+ */
+
+/* end of coff.gnu.h */
diff --git a/gas/config/ho-ansi.h b/gas/config/ho-ansi.h
new file mode 100644
index 0000000..b7fc587
--- /dev/null
+++ b/gas/config/ho-ansi.h
@@ -0,0 +1,40 @@
+/* ho-ansi.h  Host-specific header file for generic ansi environments.
+   Copyright (C) 1987, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#define M_ANSI 1
+
+#include <stdlib.h>
+#include <string.h>
+#include <memory.h>
+
+#define sys_nerr	_sys_nerr
+#define sys_errlist	_sys_errlist
+#define bzero(b,l)	(memset((b),0,(l)))
+
+/*
+ * $Log$
+ * Revision 1.1  1991/04/04 18:15:38  rich
+ * Initial revision
+ *
+ *
+ */
+
+/* end of ho-ansi.h */
diff --git a/gas/config/ho-cygnus.h b/gas/config/ho-cygnus.h
new file mode 100755
index 0000000..9b39153
--- /dev/null
+++ b/gas/config/ho-cygnus.h
@@ -0,0 +1,41 @@
+/* ho-ansi.h  Host-specific header file for generic ansi environments.
+   Copyright (C) 1987, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#define M_ANSI 1
+
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <ctype.h>
+
+#define sys_nerr	_sys_nerr
+#define sys_errlist	_sys_errlist
+#define bzero(s,l)	(memset((s),0,(l)))
+
+/*
+ * $Log$
+ * Revision 1.1  1991/04/04 18:15:40  rich
+ * Initial revision
+ *
+ *
+ */
+
+/* end of ho-ansi.h */
diff --git a/gas/config/ho-generic.h b/gas/config/ho-generic.h
new file mode 100644
index 0000000..40c49e9
--- /dev/null
+++ b/gas/config/ho-generic.h
@@ -0,0 +1,32 @@
+/* ho-generic.h  Generic host-specific header file.
+   Copyright (C) 1987, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#define M_GENERIC 1
+
+/*
+ * $Log$
+ * Revision 1.1  1991/04/04 18:15:42  rich
+ * Initial revision
+ *
+ *
+ */
+
+/* end of ho-generic.h */
diff --git a/gas/config/ho-hpux.h b/gas/config/ho-hpux.h
new file mode 100644
index 0000000..751b4ee
--- /dev/null
+++ b/gas/config/ho-hpux.h
@@ -0,0 +1,34 @@
+/* ho-hpux.h -- Header to compile the assembler under HP-UX
+   Copyright (C) 1988, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#include "ho-sysv.h"
+
+/* This header file contains the #defines specific
+   to HPUX changes sent me by cph@zurich.ai.mit.edu */
+#ifndef hpux
+#define hpux
+#endif
+
+#ifdef setbuffer
+#undef setbuffer
+#endif /* setbuffer */
+
+#define setbuffer(stream, buf, size)
diff --git a/gas/config/ho-i386.h b/gas/config/ho-i386.h
new file mode 100644
index 0000000..94dd8c2
--- /dev/null
+++ b/gas/config/ho-i386.h
@@ -0,0 +1,28 @@
+/* ho-i386.h  i386 specific header file.
+   Copyright (C) 1987, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#define HO_I386 1
+
+#define NO_STDARG
+
+#include "ho-sysv.h"
+
+/* end of ho-i386.h */
diff --git a/gas/config/ho-sun3.h b/gas/config/ho-sun3.h
new file mode 100644
index 0000000..33b74c3
--- /dev/null
+++ b/gas/config/ho-sun3.h
@@ -0,0 +1,7 @@
+/* $Id$ */
+
+#include <ho-sunos.h>
+
+extern int sprintf();
+
+/* end of ho-sun3.h */
diff --git a/gas/config/ho-sun386.h b/gas/config/ho-sun386.h
new file mode 100644
index 0000000..00eacad
--- /dev/null
+++ b/gas/config/ho-sun386.h
@@ -0,0 +1,7 @@
+/* $Id$ */
+
+#include <ho-sunos.h>
+
+extern int sprintf();
+
+/* end of ho-sun386.h */
diff --git a/gas/config/ho-sun4.h b/gas/config/ho-sun4.h
new file mode 100644
index 0000000..6cfd6b4
--- /dev/null
+++ b/gas/config/ho-sun4.h
@@ -0,0 +1,5 @@
+/* $Id$ */
+
+#include <ho-sunos.h>
+
+/* end of ho-sun4.h */
diff --git a/gas/config/ho-sunos.h b/gas/config/ho-sunos.h
new file mode 100644
index 0000000..13d5c3d
--- /dev/null
+++ b/gas/config/ho-sunos.h
@@ -0,0 +1,56 @@
+/* $Id$ */
+
+#ifndef __STDC__
+#define NO_STDARG
+#include <memory.h>
+#endif /* not __STDC__ */
+
+#include <ctype.h>
+#include <string.h>
+
+/* externs for system libraries. */
+
+extern char *strchr();
+extern char *malloc();
+extern char *realloc();
+extern char *strrchr();
+extern int _filbuf();
+extern int _flsbuf();
+extern int abort();
+extern int bcopy();
+extern int bzero();
+extern int bzero();
+extern int exit();
+extern int fclose();
+extern int fprintf();
+extern int fread();
+extern int free();
+extern int perror();
+extern int printf();
+extern int setvbuf();
+extern int sscanf();
+extern int strcmp();
+extern int strlen();
+extern int strncmp();
+extern int time();
+extern int ungetc();
+extern int vfprintf();
+extern int vprintf();
+extern long atol();
+
+#ifndef tolower
+extern int tolower();
+#endif /* tolower */
+
+#ifndef toupper
+extern int toupper();
+#endif /* toupper */
+
+/*
+ * Local Variables:
+ * fill-column: 80
+ * comment-column: 0
+ * End:
+ */
+
+/* end of ho-sun4.h */
diff --git a/gas/config/ho-sysv.h b/gas/config/ho-sysv.h
new file mode 100644
index 0000000..af8dd6e
--- /dev/null
+++ b/gas/config/ho-sysv.h
@@ -0,0 +1,31 @@
+/* ho-sysv.h  System V specific header file.
+   Copyright (C) 1987, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#define HO_USG
+
+#define bcopy(from,to,n) memcpy((to),(from),(n))
+#define bzero(s,n) memset((s),0,(n))
+#define setbuffer(stream, buf, size) setvbuf((stream), (buf), _IOLBF, (size))
+
+extern int free();
+extern char *malloc();
+
+/* end of ho-sysv.h */
diff --git a/gas/config/obj-aout.c b/gas/config/obj-aout.c
new file mode 100644
index 0000000..6c1e100
--- /dev/null
+++ b/gas/config/obj-aout.c
@@ -0,0 +1,500 @@
+/* a.out object file format
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as
+published by the Free Software Foundation; either version 1,
+or (at your option) any later version.
+
+GAS is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public
+License along with GAS; see the file COPYING.  If not, write
+to the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+/* $Id$ */
+
+#include "as.h"
+
+#include "obstack.h"
+
+ /* in: segT   out: N_TYPE bits */
+const short seg_N_TYPE[] = {
+  N_ABS,
+  N_TEXT,
+  N_DATA,
+  N_BSS,
+  N_UNDF, /* unknown */
+  N_UNDF, /* absent */
+  N_UNDF, /* pass1 */
+  N_UNDF, /* error */
+  N_UNDF, /* bignum/flonum */
+  N_UNDF, /* difference */
+  N_UNDF, /* debug */
+  N_UNDF, /* ntv */
+  N_UNDF, /* ptv */
+  N_REGISTER, /* register */
+};
+
+const segT N_TYPE_seg [N_TYPE+2] = {	/* N_TYPE == 0x1E = 32-2 */
+	SEG_UNKNOWN,			/* N_UNDF == 0 */
+	SEG_GOOF,
+	SEG_ABSOLUTE,			/* N_ABS == 2 */
+	SEG_GOOF,
+	SEG_TEXT,			/* N_TEXT == 4 */
+	SEG_GOOF,
+	SEG_DATA,			/* N_DATA == 6 */
+	SEG_GOOF,
+	SEG_BSS,			/* N_BSS == 8 */
+	SEG_GOOF,
+	SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF,
+	SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF,
+	SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF,
+	SEG_REGISTER,			/* dummy N_REGISTER for regs = 30 */
+	SEG_GOOF,
+};
+
+#ifdef __STDC__
+static void obj_aout_stab(int what);
+static void obj_aout_line(void);
+static void obj_aout_desc(void);
+#else /* __STDC__ */
+static void obj_aout_desc();
+static void obj_aout_stab();
+static void obj_aout_line();
+#endif /* __STDC__ */
+
+const pseudo_typeS obj_pseudo_table[] = {
+	{ "line",	obj_aout_line,		0	}, /* source code line number */
+	{ "ln",		obj_aout_line,		0	}, /* source code line number */
+	{ "desc",	obj_aout_desc,		0	}, /* def */
+	{ "stabd",	obj_aout_stab,		'd'	}, /* stabs */
+	{ "stabn",	obj_aout_stab,		'n'	}, /* stabs */
+	{ "stabs",	obj_aout_stab,		's'	}, /* stabs */
+
+	{ NULL}	/* end sentinel */
+}; /* obj_pseudo_table */
+
+
+/* Relocation. */
+
+/*
+ * In: length of relocation (or of address) in chars: 1, 2 or 4.
+ * Out: GNU LD relocation length code: 0, 1, or 2.
+ */
+
+static unsigned char
+nbytes_r_length [] = {
+  42, 0, 1, 42, 2
+  };
+
+/*
+ *		emit_relocations()
+ *
+ * Crawl along a fixS chain. Emit the segment's relocations.
+ */
+void obj_emit_relocations(where, fixP, segment_address_in_file)
+char **where;
+fixS *fixP; /* Fixup chain for this segment. */
+relax_addressT segment_address_in_file;
+{
+	struct reloc_info_generic ri;
+	register symbolS *symbolP;
+
+	/* If a machine dependent emitter is needed, call it instead. */
+	if (md_emit_relocations) {
+		(*md_emit_relocations) (fixP, segment_address_in_file);
+		return;
+	}
+
+	/* JF this is for paranoia */
+	bzero((char *)&ri,sizeof(ri));
+	for (;  fixP;  fixP = fixP->fx_next) {
+		if ((symbolP = fixP->fx_addsy) != 0) {
+			ri.r_bsr		= fixP->fx_bsr;
+			ri.r_disp		= fixP->fx_im_disp;
+			ri.r_callj		= fixP->fx_callj;
+			ri.r_length		= nbytes_r_length [fixP->fx_size];
+			ri.r_pcrel		= fixP->fx_pcrel;
+			ri.r_address	= fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file;
+
+			if (S_GET_TYPE(symbolP) == N_UNDF) {
+				ri.r_extern	= 1;
+				ri.r_symbolnum	= symbolP->sy_number;
+			} else {
+				ri.r_extern	= 0;
+				ri.r_symbolnum	= S_GET_TYPE(symbolP);
+			}
+
+			/* Output the relocation information in machine-dependent form. */
+			md_ri_to_chars(*where, &ri);
+			*where += md_reloc_size;
+		} /* if there is an add symbol */
+	} /* for each fix */
+
+	return;
+} /* emit_relocations() */
+
+/* Aout file generation & utilities */
+void obj_header_append(where, headers)
+char **where;
+object_headers *headers;
+{
+	tc_headers_hook(headers);
+
+#ifdef CROSS_ASSEMBLE
+	md_number_to_chars(*where, headers->header.a_info, sizeof(headers->header.a_info));
+	*where += sizeof(headers->header.a_info);
+	md_number_to_chars(*where, headers->header.a_text, sizeof(headers->header.a_text));
+	*where += sizeof(headers->header.a_text);
+	md_number_to_chars(*where, headers->header.a_data, sizeof(headers->header.a_data));
+	*where += sizeof(headers->header.a_data);
+	md_number_to_chars(*where, headers->header.a_bss, sizeof(headers->header.a_bss));
+	*where += sizeof(headers->header.a_bss);
+	md_number_to_chars(*where, headers->header.a_syms, sizeof(headers->header.a_syms));
+	*where += sizeof(headers->header.a_syms);
+	md_number_to_chars(*where, headers->header.a_entry, sizeof(headers->header.a_entry));
+	*where += sizeof(headers->header.a_entry);
+	md_number_to_chars(*where, headers->header.a_trsize, sizeof(headers->header.a_trsize));
+	*where += sizeof(headers->header.a_trsize);
+	md_number_to_chars(*where, headers->header.a_drsize, sizeof(headers->header.a_drsize));
+	*where += sizeof(headers->header.a_drsize);
+#ifdef EXEC_MACHINE_TYPE
+	md_number_to_chars(*where, headers->header.a_machtype, sizeof(headers->header.a_machtype));
+	*where += sizeof(headers->header.a_machtype);
+#endif /* EXEC_MACHINE_TYPE */
+#ifdef EXEC_VERSION
+	md_number_to_chars(*where, headers->header.a_version, sizeof(headers->header.a_version));
+	*where += sizeof(headers->header.a_version);
+#endif /* EXEC_VERSION */
+
+#else /* CROSS_ASSEMBLE */
+
+	append(where, (char *) &headers->header, sizeof(headers->header));
+#endif /* CROSS_ASSEMBLE */
+
+	return;
+} /* obj_append_header() */
+
+void obj_symbol_to_chars(where, symbolP)
+char **where;
+symbolS *symbolP;
+{
+	md_number_to_chars((char *)&(S_GET_OFFSET(symbolP)), S_GET_OFFSET(symbolP), sizeof(S_GET_OFFSET(symbolP)));
+	md_number_to_chars((char *)&(S_GET_DESC(symbolP)), S_GET_DESC(symbolP), sizeof(S_GET_DESC(symbolP)));
+	md_number_to_chars((char *)&(S_GET_VALUE(symbolP)), S_GET_VALUE(symbolP), sizeof(S_GET_VALUE(symbolP)));
+
+	append(where, (char *)&symbolP->sy_symbol, sizeof(obj_symbol_type));
+} /* obj_symbol_to_chars() */
+
+void obj_emit_symbols(where, symbol_rootP)
+char **where;
+symbolS *symbol_rootP;
+{
+    symbolS *	symbolP;
+
+    /*
+     * Emit all symbols left in the symbol chain.
+ */
+    for(symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+	/* Used to save the offset of the name. It is used to point
+	   to the string in memory but must be a file offset. */
+	register char *temp;
+
+	temp = S_GET_NAME(symbolP);
+	S_SET_OFFSET(symbolP, symbolP->sy_name_offset);
+
+	/* Any symbol still undefined and is not a dbg symbol is made N_EXT. */
+	if (!S_IS_DEBUG(symbolP) && !S_IS_DEFINED(symbolP)) S_SET_EXTERNAL(symbolP);
+
+	obj_symbol_to_chars(where, symbolP);
+	S_SET_NAME(symbolP,temp);
+    }
+} /* emit_symbols() */
+
+void obj_symbol_new_hook(symbolP)
+symbolS *symbolP;
+{
+	S_SET_OTHER(symbolP, 0);
+	S_SET_DESC(symbolP, 0);
+	return;
+} /* obj_symbol_new_hook() */
+
+static void obj_aout_line() {
+	/* Assume delimiter is part of expression. */
+	/* BSD4.2 as fails with delightful bug, so we */
+	/* are not being incompatible here. */
+	new_logical_line((char *)NULL, (int)(get_absolute_expression()));
+	demand_empty_rest_of_line();
+} /* obj_aout_line() */
+
+/*
+ *			stab()
+ *
+ * Handle .stabX directives, which used to be open-coded.
+ * So much creeping featurism overloaded the semantics that we decided
+ * to put all .stabX thinking in one place. Here.
+ *
+ * We try to make any .stabX directive legal. Other people's AS will often
+ * do assembly-time consistency checks: eg assigning meaning to n_type bits
+ * and "protecting" you from setting them to certain values. (They also zero
+ * certain bits before emitting symbols. Tut tut.)
+ *
+ * If an expression is not absolute we either gripe or use the relocation
+ * information. Other people's assemblers silently forget information they
+ * don't need and invent information they need that you didn't supply.
+ *
+ * .stabX directives always make a symbol table entry. It may be junk if
+ * the rest of your .stabX directive is malformed.
+ */
+static void obj_aout_stab(what)
+int what;
+{
+  register symbolS *	symbolP = 0;
+  register char *	string;
+	   int saved_type = 0;
+  	   int length;
+  	   int goof;	/* TRUE if we have aborted. */
+	   long longint;
+
+/*
+ * Enter with input_line_pointer pointing past .stabX and any following
+ * whitespace.
+ */
+	goof = 0; /* JF who forgot this?? */
+	if (what == 's') {
+		string = demand_copy_C_string(& length);
+		SKIP_WHITESPACE();
+		if (* input_line_pointer == ',')
+			input_line_pointer ++;
+		else {
+			as_bad("I need a comma after symbol's name");
+			goof = 1;
+		}
+	} else
+		string = "";
+
+/*
+ * Input_line_pointer->after ','.  String->symbol name.
+ */
+	if (! goof) {
+		symbolP = symbol_new(string,
+				     SEG_UNKNOWN,
+				     0,
+				     (struct frag *)0);
+		switch (what) {
+		case 'd':
+			S_SET_NAME(symbolP, NULL); /* .stabd feature. */
+			S_SET_VALUE(symbolP, obstack_next_free(&frags) - frag_now->fr_literal);
+			symbolP->sy_frag = frag_now;
+			break;
+
+		case 'n':
+			symbolP->sy_frag = &zero_address_frag;
+			break;
+
+		case 's':
+			symbolP->sy_frag = & zero_address_frag;
+			break;
+
+		default:
+			BAD_CASE(what);
+			break;
+		}
+
+		if (get_absolute_expression_and_terminator(&longint) == ',')
+			symbolP->sy_symbol.n_type = saved_type = longint;
+		else {
+			as_bad("I want a comma after the n_type expression");
+			goof = 1;
+			input_line_pointer --; /* Backup over a non-',' char. */
+		}
+	}
+
+	if (!goof) {
+		if (get_absolute_expression_and_terminator(&longint) == ',')
+			S_SET_OTHER(symbolP, longint);
+		else {
+			as_bad("I want a comma after the n_other expression");
+			goof = 1;
+			input_line_pointer--; /* Backup over a non-',' char. */
+		}
+	}
+
+	if (!goof) {
+		S_SET_DESC(symbolP, get_absolute_expression());
+		if (what == 's' || what == 'n') {
+			if (*input_line_pointer != ',') {
+				as_bad("I want a comma after the n_desc expression");
+				goof = 1;
+			} else {
+				input_line_pointer++;
+			}
+		}
+	}
+
+	if ((!goof) && (what=='s' || what=='n')) {
+		pseudo_set(symbolP);
+		symbolP->sy_symbol.n_type = saved_type;
+	}
+
+	if (goof)
+		ignore_rest_of_line();
+	else
+		demand_empty_rest_of_line ();
+} /* obj_aout_stab() */
+
+static void obj_aout_desc() {
+	register char *name;
+	register char c;
+	register char *p;
+	register symbolS *symbolP;
+	register int temp;
+
+	/*
+	 * Frob invented at RMS' request. Set the n_desc of a symbol.
+ */
+	name = input_line_pointer;
+	c = get_symbol_end();
+	p = input_line_pointer;
+	* p = c;
+	SKIP_WHITESPACE();
+	if (*input_line_pointer != ',') {
+		*p = 0;
+		as_bad("Expected comma after name \"%s\"", name);
+		*p = c;
+		ignore_rest_of_line();
+	} else {
+		input_line_pointer ++;
+		temp = get_absolute_expression();
+		*p = 0;
+		symbolP = symbol_find_or_make(name);
+		*p = c;
+		S_SET_DESC(symbolP,temp);
+	}
+	demand_empty_rest_of_line();
+} /* obj_aout_desc() */
+
+void obj_read_begin_hook() {
+	return;
+} /* obj_read_begin_hook() */
+
+void obj_crawl_symbol_chain(headers)
+object_headers *headers;
+{
+	symbolS *symbolP;
+	symbolS **symbolPP;
+	int symbol_number = 0;
+
+	/* JF deal with forward references first... */
+	for (symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+		if (symbolP->sy_forward) {
+			S_SET_VALUE(symbolP, S_GET_VALUE(symbolP)
+				    + S_GET_VALUE(symbolP->sy_forward)
+				    + symbolP->sy_forward->sy_frag->fr_address);
+
+			symbolP->sy_forward=0;
+		} /* if it has a forward reference */
+	} /* walk the symbol chain */
+
+	tc_crawl_symbol_chain(headers);
+
+	symbolPP = &symbol_rootP;	/*->last symbol chain link. */
+	while ((symbolP  = *symbolPP) != NULL) {
+		if (flagseen['R'] && (S_GET_SEGMENT(symbolP) == SEG_DATA)) {
+			S_SET_SEGMENT(symbolP, SEG_TEXT);
+		} /* if pusing data into text */
+
+		S_SET_VALUE(symbolP, S_GET_VALUE(symbolP) + symbolP->sy_frag->fr_address);
+
+		/* OK, here is how we decide which symbols go out into the
+		   brave new symtab.  Symbols that do are:
+
+		   * symbols with no name (stabd's?)
+		   * symbols with debug info in their N_TYPE
+
+		   Symbols that don't are:
+		   * symbols that are registers
+		   * symbols with \1 as their 3rd character (numeric labels)
+		   * "local labels" as defined by S_LOCAL_NAME(name)
+		   if the -L switch was passed to gas.
+
+		   All other symbols are output.  We complain if a deleted
+		   symbol was marked external. */
+
+
+		if (!S_IS_REGISTER(symbolP)
+		    && (!S_GET_NAME(symbolP)
+			|| S_IS_DEBUG(symbolP)
+#ifdef TC_I960
+			/* FIXME-SOON this ifdef seems highly dubious to me.  xoxorich. */
+			|| !S_IS_DEFINED(symbolP)
+			|| S_IS_EXTERNAL(symbolP)
+#endif /* TC_I960 */
+			|| (S_GET_NAME(symbolP)[0] != '\001' && (flagseen ['L'] || ! S_LOCAL_NAME(symbolP))))) {
+			symbolP->sy_number = symbol_number++;
+
+			/* The + 1 after strlen account for the \0 at the
+			   end of each string */
+			if (!S_IS_STABD(symbolP)) {
+				/* Ordinary case. */
+				symbolP->sy_name_offset = string_byte_count;
+				string_byte_count += strlen(S_GET_NAME(symbolP)) + 1;
+			}
+			else	/* .Stabd case. */
+			    symbolP->sy_name_offset = 0;
+			symbolPP = &(symbol_next(symbolP));
+		} else {
+			if (S_IS_EXTERNAL(symbolP) || !S_IS_DEFINED(symbolP)) {
+				as_bad("Local symbol %s never defined", S_GET_NAME(symbolP));
+			} /* oops. */
+
+			/* Unhook it from the chain */
+			*symbolPP = symbol_next(symbolP);
+		} /* if this symbol should be in the output */
+	} /* for each symbol */
+
+	H_SET_SYMBOL_TABLE_SIZE(headers, symbol_number);
+
+	return;
+} /* obj_crawl_symbol_chain() */
+
+/*
+ * Find strings by crawling along symbol table chain.
+ */
+
+void obj_emit_strings(where)
+char **where;
+{
+	symbolS *symbolP;
+
+#ifdef CROSS_ASSEMBLE
+	/* Gotta do md_ byte-ordering stuff for string_byte_count first - KWK */
+	md_number_to_chars(*where, string_byte_count, sizeof(string_byte_count));
+	*where += sizeof(string_byte_count);
+#else /* CROSS_ASSEMBLE */
+	append (where, (char *)&string_byte_count, (unsigned long)sizeof(string_byte_count));
+#endif /* CROSS_ASSEMBLE */
+
+	for(symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+		if(S_GET_NAME(symbolP))
+		    append(&next_object_file_charP, S_GET_NAME(symbolP),
+			   (unsigned long)(strlen (S_GET_NAME(symbolP)) + 1));
+	} /* walk symbol chain */
+
+	return;
+} /* obj_emit_strings() */
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of obj-aout.c */
diff --git a/gas/config/obj-aout.h b/gas/config/obj-aout.h
new file mode 100644
index 0000000..602d760
--- /dev/null
+++ b/gas/config/obj-aout.h
@@ -0,0 +1,187 @@
+/* a.out object file format
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as
+published by the Free Software Foundation; either version 1,
+or (at your option) any later version.
+
+GAS is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public
+License along with GAS; see the file COPYING.  If not, write
+to the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+/* $Id$ */
+
+/* Tag to validate a.out object file format processing */
+#define OBJ_AOUT 1
+
+#include "targ-cpu.h"
+
+#ifndef		VMS
+#include "a.out.gnu.h"		/* Needed to define struct nlist. Sigh. */
+#else
+#include "a_out.h"
+#endif
+
+extern const short seg_N_TYPE[];
+extern const segT  N_TYPE_seg[];
+
+#ifndef DEFAULT_MAGIC_NUMBER_FOR_OBJECT_FILE
+#define DEFAULT_MAGIC_NUMBER_FOR_OBJECT_FILE	(OMAGIC)
+#endif /* DEFAULT_MAGIC_NUMBER_FOR_OBJECT_FILE */
+
+/* SYMBOL TABLE */
+/* Symbol table entry data type */
+
+typedef struct nlist obj_symbol_type; /* Symbol table entry */
+
+/* If compiler generate leading underscores, remove them. */
+
+#ifndef STRIP_UNDERSCORE
+#define STRIP_UNDERSCORE 0
+#endif /* STRIP_UNDERSCORE */
+
+/* Symbol table macros and constants */
+
+/*
+ *  Macros to extract information from a symbol table entry.
+ *  This syntaxic indirection allows independence regarding a.out or coff.
+ *  The argument (s) of all these macros is a pointer to a symbol table entry.
+ */
+
+/* True if the symbol is external */
+#define S_IS_EXTERNAL(s)	((s)->sy_symbol.n_type & N_EXT)
+
+/* True if symbol has been defined, ie is in N_{TEXT,DATA,BSS,ABS} or N_EXT */
+#define S_IS_DEFINED(s)		((S_GET_TYPE(s) != N_UNDF) || (S_GET_OTHER(s) != 0) || (S_GET_DESC(s) != 0))
+
+#define S_IS_REGISTER(s)	((s)->sy_symbol.n_type == N_REGISTER)
+
+/* True if a debug special symbol entry */
+#define S_IS_DEBUG(s)		((s)->sy_symbol.n_type & N_STAB)
+/* True if a symbol is local symbol name */
+/* A symbol name whose name begin with ^A is a gas internal pseudo symbol
+   nameless symbols come from .stab directives. */
+#define S_IS_LOCAL(s)		(S_GET_NAME(s) && \
+				 !S_IS_DEBUG(s) && \
+				 (S_GET_NAME(s)[0] == '\001' || \
+				  (S_LOCAL_NAME(s) && !flagseen['L'])))
+/* True if a symbol is not defined in this file */
+#define S_IS_EXTERN(s)		((s)->sy_symbol.n_type & N_EXT)
+/* True if the symbol has been generated because of a .stabd directive */
+#define S_IS_STABD(s)		(S_GET_NAME(s) == (char *)0)
+
+/* Accessors */
+/* The value of the symbol */
+#define S_GET_VALUE(s)		(((s)->sy_symbol.n_value))
+/* The name of the symbol */
+#define S_GET_NAME(s)		((s)->sy_symbol.n_un.n_name)
+/* The pointer to the string table */
+#define S_GET_OFFSET(s)		((s)->sy_symbol.n_un.n_strx)
+/* The type of the symbol */
+#define S_GET_TYPE(s)		((s)->sy_symbol.n_type & N_TYPE)
+/* The numeric value of the segment */
+#define S_GET_SEGMENT(s)	(N_TYPE_seg[S_GET_TYPE(s)])
+/* The n_other expression value */
+#define S_GET_OTHER(s)		((s)->sy_symbol.n_other)
+/* The n_desc expression value */
+#define S_GET_DESC(s)		((s)->sy_symbol.n_desc)
+
+/* Modifiers */
+/* Set the value of the symbol */
+#define S_SET_VALUE(s,v)	((s)->sy_symbol.n_value = (unsigned long) (v))
+/* Assume that a symbol cannot be simultaneously in more than on segment */
+ /* set segment */
+#define S_SET_SEGMENT(s,seg)	((s)->sy_symbol.n_type &= ~N_TYPE,(s)->sy_symbol.n_type|=SEGMENT_TO_SYMBOL_TYPE(seg))
+/* The symbol is external */
+#define S_SET_EXTERNAL(s)	((s)->sy_symbol.n_type |= N_EXT)
+/* The symbol is not external */
+#define S_CLEAR_EXTERNAL(s)	((s)->sy_symbol.n_type &= ~N_EXT)
+/* Set the name of the symbol */
+#define S_SET_NAME(s,v)		((s)->sy_symbol.n_un.n_name = (v))
+/* Set the offset in the string table */
+#define S_SET_OFFSET(s,v)	((s)->sy_symbol.n_un.n_strx = (v))
+/* Set the n_other expression value */
+#define S_SET_OTHER(s,v)	((s)->sy_symbol.n_other = (v))
+/* Set the n_desc expression value */
+#define S_SET_DESC(s,v)		((s)->sy_symbol.n_desc = (v))
+
+/* File header macro and type definition */
+
+#define H_GET_FILE_SIZE(h)	(sizeof(struct exec) + \
+				 H_GET_TEXT_SIZE(h) + H_GET_DATA_SIZE(h) + \
+				 H_GET_SYMBOL_TABLE_SIZE(h) + \
+				 H_GET_TEXT_RELOCATION_SIZE(h) + \
+				 H_GET_DATA_RELOCATION_SIZE(h) + \
+				 (h)->string_table_size)
+
+#define H_GET_TEXT_SIZE(h)		((h)->header.a_text)
+#define H_GET_DATA_SIZE(h)		((h)->header.a_data)
+#define H_GET_BSS_SIZE(h)		((h)->header.a_bss)
+#define H_GET_TEXT_RELOCATION_SIZE(h)	((h)->header.a_trsize)
+#define H_GET_DATA_RELOCATION_SIZE(h)	((h)->header.a_drsize)
+#define H_GET_SYMBOL_TABLE_SIZE(h)	((h)->header.a_syms)
+#define H_GET_MAGIC_NUMBER(h)		((h)->header.a_info)
+#define H_GET_ENTRY_POINT(h)		((h)->header.a_entry)
+#define H_GET_STRING_SIZE(h)		((h)->string_table_size)
+#ifdef EXEC_MACHINE_TYPE
+#define H_GET_MACHINE_TYPE(h)		((h)->header.a_machtype)
+#endif /* EXEC_MACHINE_TYPE */
+#ifdef EXEC_VERSION
+#define H_GET_VERSION(h)		((h)->header.a_version)
+#endif /* EXEC_VERSION */
+
+#define H_SET_TEXT_SIZE(h,v)		((h)->header.a_text = md_section_align(SEG_TEXT, (v)))
+#define H_SET_DATA_SIZE(h,v)		((h)->header.a_data = md_section_align(SEG_DATA, (v)))
+#define H_SET_BSS_SIZE(h,v)		((h)->header.a_bss = md_section_align(SEG_BSS, (v)))
+
+#define H_SET_RELOCATION_SIZE(h,t,d)	(H_SET_TEXT_RELOCATION_SIZE((h),(t)),\
+					 H_SET_DATA_RELOCATION_SIZE((h),(d)))
+
+#define H_SET_TEXT_RELOCATION_SIZE(h,v)	((h)->header.a_trsize = (v))
+#define H_SET_DATA_RELOCATION_SIZE(h,v)	((h)->header.a_drsize = (v))
+#define H_SET_SYMBOL_TABLE_SIZE(h,v)	((h)->header.a_syms = (v) * \
+					 sizeof(struct nlist))
+
+#define H_SET_MAGIC_NUMBER(h,v)		((h)->header.a_info = (v))
+
+#define H_SET_ENTRY_POINT(h,v)		((h)->header.a_entry = (v))
+#define H_SET_STRING_SIZE(h,v)		((h)->string_table_size = (v))
+#ifdef EXEC_MACHINE_TYPE
+#define H_SET_MACHINE_TYPE(h,v)		((h)->header.a_machtype = (v))
+#endif /* EXEC_MACHINE_TYPE */
+#ifdef EXEC_VERSION
+#define H_SET_VERSION(h,v)		((h)->header.a_version = (v))
+#endif /* EXEC_VERSION */
+
+/* 
+ * Current means for getting the name of a segment.
+ * This will change for infinite-segments support (e.g. COFF).
+ */
+#define	segment_name(seg)  ( seg_name[(int)(seg)] )
+extern char *const seg_name[];
+
+typedef struct {
+    struct exec	header;			/* a.out header */
+    long	string_table_size;	/* names + '\0' + sizeof(int) */
+} object_headers;
+
+/* line numbering stuff. */
+#define OBJ_EMIT_LINENO(a, b, c)	;
+#define obj_pre_write_hook(a)		;
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of obj-aout.h */
diff --git a/gas/config/obj-bout.c b/gas/config/obj-bout.c
new file mode 100644
index 0000000..abfdaa8
--- /dev/null
+++ b/gas/config/obj-bout.c
@@ -0,0 +1,485 @@
+/* b.out object file format
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as
+published by the Free Software Foundation; either version 1,
+or (at your option) any later version.
+
+GAS is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public
+License along with GAS; see the file COPYING.  If not, write
+to the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+/* $Id$ */
+
+#include "as.h"
+#include "obstack.h"
+
+const short /* in: segT   out: N_TYPE bits */
+seg_N_TYPE[] = {
+  N_ABS,
+  N_TEXT,
+  N_DATA,
+  N_BSS,
+  N_UNDF, /* unknown */
+  N_UNDF, /* absent */
+  N_UNDF, /* pass1 */
+  N_UNDF, /* error */
+  N_UNDF, /* bignum/flonum */
+  N_UNDF, /* difference */
+  N_REGISTER, /* register */
+};
+
+const segT N_TYPE_seg [N_TYPE+2] = {	/* N_TYPE == 0x1E = 32-2 */
+	SEG_UNKNOWN,			/* N_UNDF == 0 */
+	SEG_GOOF,
+	SEG_ABSOLUTE,			/* N_ABS == 2 */
+	SEG_GOOF,
+	SEG_TEXT,			/* N_TEXT == 4 */
+	SEG_GOOF,
+	SEG_DATA,			/* N_DATA == 6 */
+	SEG_GOOF,
+	SEG_BSS,			/* N_BSS == 8 */
+	SEG_GOOF,
+	SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF,
+	SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF,
+	SEG_GOOF, SEG_GOOF, SEG_GOOF, SEG_GOOF,
+	SEG_REGISTER,			/* dummy N_REGISTER for regs = 30 */
+	SEG_GOOF,
+};
+
+#ifdef __STDC__
+static void obj_bout_stab(int what);
+static void obj_bout_line(void);
+static void obj_bout_desc(void);
+#else /* __STDC__ */
+static void obj_bout_desc();
+static void obj_bout_stab();
+static void obj_bout_line();
+#endif /* __STDC__ */
+
+const pseudo_typeS obj_pseudo_table[] = {
+ /* stabs (aka a.out aka b.out directives for debug symbols) */
+	{ "desc",	obj_bout_desc,		0	}, /* def */
+	{ "line",	obj_bout_line,		0	}, /* source code line number */
+	{ "stabd",	obj_bout_stab,		'd'	}, /* stabs */
+	{ "stabn",	obj_bout_stab,		'n'	}, /* stabs */
+	{ "stabs",	obj_bout_stab,		's'	}, /* stabs */
+
+ /* coff debugging directives.  Currently ignored silently */
+	{ "def",        s_ignore,		0 },
+	{ "dim",        s_ignore,		0 },
+	{ "endef",      s_ignore,		0 },
+	{ "ln",         s_ignore,		0 },
+	{ "scl",        s_ignore,		0 },
+	{ "size",       s_ignore,		0 },
+	{ "tag",        s_ignore,		0 },
+	{ "type",       s_ignore,		0 },
+	{ "val",        s_ignore,		0 },
+
+ /* other stuff we don't handle */
+	{ "ABORT",      s_ignore,		0 },
+	{ "ident",      s_ignore,		0 },
+
+	{ NULL}	/* end sentinel */
+}; /* obj_pseudo_table */
+
+/* Relocation. */
+
+/*
+ * In: length of relocation (or of address) in chars: 1, 2 or 4.
+ * Out: GNU LD relocation length code: 0, 1, or 2.
+ */
+
+static unsigned char
+nbytes_r_length [] = {
+  42, 0, 1, 42, 2
+  };
+
+/*
+ *		emit_relocations()
+ *
+ * Crawl along a fixS chain. Emit the segment's relocations.
+ */
+void obj_emit_relocations(where, fixP, segment_address_in_file)
+char **where;
+fixS *fixP;	/* Fixup chain for this segment. */
+relax_addressT segment_address_in_file;
+{
+	struct reloc_info_generic	ri;
+	register symbolS *		symbolP;
+	
+	/* If a machine dependent emitter is needed, call it instead. */
+	if (md_emit_relocations) {
+		(*md_emit_relocations) (fixP, segment_address_in_file);
+		return;
+	}
+	
+	
+	/* JF this is for paranoia */
+	bzero((char *)&ri,sizeof(ri));
+	for (;  fixP;  fixP = fixP->fx_next) {
+		if ((symbolP = fixP->fx_addsy) != 0) {
+			ri . r_bsr		= fixP->fx_bsr;
+			ri . r_disp		= fixP->fx_im_disp;
+			ri . r_callj		= fixP->fx_callj;
+			ri . r_length		= nbytes_r_length [fixP->fx_size];
+			ri . r_pcrel		= fixP->fx_pcrel;
+			ri . r_address	= fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file;
+			
+			if (S_GET_TYPE(symbolP) == N_UNDF) {
+				ri . r_extern	= 1;
+				ri . r_symbolnum	= symbolP->sy_number;
+			} else {
+				ri . r_extern	= 0;
+				ri . r_symbolnum	= S_GET_TYPE(symbolP);
+			}
+			
+			/* Output the relocation information in machine-dependent form. */
+			md_ri_to_chars(*where, &ri);
+			*where += md_reloc_size;
+		}
+	}
+} /* emit_relocations() */
+
+/* Aout file generation & utilities */
+
+/* Convert a lvalue to machine dependent data */
+void obj_header_append(where, headers)
+char **where;
+object_headers *headers;
+{
+	/* Always leave in host byte order */
+
+	headers->header.a_talign = section_alignment[SEG_TEXT];
+
+	if (headers->header.a_talign < 2){
+		headers->header.a_talign = 2;
+	} /* force to at least 2 */
+
+	headers->header.a_dalign = section_alignment[SEG_DATA];
+	headers->header.a_balign = section_alignment[SEG_BSS];
+
+	headers->header.a_tload = 0;
+	headers->header.a_dload = md_section_align(SEG_DATA, headers->header.a_text);
+
+	append(where, (char *) &headers->header, sizeof(headers->header));
+} /* a_header_append() */
+
+void obj_symbol_to_chars(where, symbolP)
+char **where;
+symbolS *symbolP;
+{
+ /* leave in host byte order */
+	append(where, (char *)&symbolP->sy_symbol, sizeof(obj_symbol_type));
+} /* obj_symbol_to_chars() */
+
+void obj_emit_symbols(where, symbol_rootP)
+char **where;
+symbolS *symbol_rootP;
+{
+    symbolS *	symbolP;
+
+    /*
+     * Emit all symbols left in the symbol chain.
+     */
+    for(symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+	/* Used to save the offset of the name. It is used to point
+	   to the string in memory but must be a file offset. */
+	char *temp;
+
+	temp = S_GET_NAME(symbolP);
+	S_SET_OFFSET(symbolP, symbolP->sy_name_offset);
+
+	/* Any symbol still undefined and is not a dbg symbol is made N_EXT. */
+	if (!S_IS_DEBUG(symbolP) && !S_IS_DEFINED(symbolP)) S_SET_EXTERNAL(symbolP);
+
+	obj_symbol_to_chars(where, symbolP);
+	S_SET_NAME(symbolP,temp);
+    }
+} /* emit_symbols() */
+
+void obj_symbol_new_hook(symbolP)
+symbolS *symbolP;
+{
+	S_SET_OTHER(symbolP, 0);
+	S_SET_DESC(symbolP, 0);
+	return;
+} /* obj_symbol_new_hook() */
+
+static void obj_bout_line() {
+	/* Assume delimiter is part of expression. */
+	/* BSD4.2 as fails with delightful bug, so we */
+	/* are not being incompatible here. */
+	new_logical_line ((char *)NULL, (int)(get_absolute_expression ()));
+	demand_empty_rest_of_line();
+} /* obj_bout_line() */
+
+/*
+ *			stab()
+ *
+ * Handle .stabX directives, which used to be open-coded.
+ * So much creeping featurism overloaded the semantics that we decided
+ * to put all .stabX thinking in one place. Here.
+ *
+ * We try to make any .stabX directive legal. Other people's AS will often
+ * do assembly-time consistency checks: eg assigning meaning to n_type bits
+ * and "protecting" you from setting them to certain values. (They also zero
+ * certain bits before emitting symbols. Tut tut.)
+ *
+ * If an expression is not absolute we either gripe or use the relocation
+ * information. Other people's assemblers silently forget information they
+ * don't need and invent information they need that you didn't supply.
+ *
+ * .stabX directives always make a symbol table entry. It may be junk if
+ * the rest of your .stabX directive is malformed.
+ */
+static void obj_bout_stab(what)
+int what;
+{
+  register symbolS *	symbolP = 0;
+  register char *	string;
+	   int saved_type = 0;
+  	   int length;
+  	   int goof;	/* TRUE if we have aborted. */
+	   long longint;
+
+/*
+ * Enter with input_line_pointer pointing past .stabX and any following
+ * whitespace.
+ */
+	goof = 0; /* JF who forgot this?? */
+	if (what == 's') {
+		string = demand_copy_C_string(& length);
+		SKIP_WHITESPACE();
+		if (*input_line_pointer == ',')
+			input_line_pointer ++;
+		else {
+			as_bad("I need a comma after symbol's name");
+			goof = 1;
+		}
+	} else
+		string = "";
+
+/*
+ * Input_line_pointer->after ','.  String->symbol name.
+ */
+	if (!goof) {
+		symbolP = symbol_new(string,
+				     SEG_UNKNOWN,
+				     0,
+				     (struct frag *)0);
+		switch (what) {
+		case 'd':
+			S_SET_NAME(symbolP,NULL); /* .stabd feature. */
+			S_SET_VALUE(symbolP,obstack_next_free(&frags) -
+				    frag_now->fr_literal);
+			symbolP->sy_frag = frag_now;
+			break;
+
+		case 'n':
+			symbolP->sy_frag = &zero_address_frag;
+			break;
+
+		case 's':
+			symbolP->sy_frag = & zero_address_frag;
+			break;
+
+		default:
+			BAD_CASE(what);
+			break;
+		}
+		if (get_absolute_expression_and_terminator(& longint) == ',')
+			symbolP->sy_symbol.n_type = saved_type = longint;
+		else {
+			as_bad("I want a comma after the n_type expression");
+			goof = 1;
+			input_line_pointer--; /* Backup over a non-',' char. */
+		}
+	}
+	if (! goof) {
+		if (get_absolute_expression_and_terminator (& longint) == ',')
+			S_SET_OTHER(symbolP,longint);
+		else {
+			as_bad("I want a comma after the n_other expression");
+			goof = 1;
+			input_line_pointer--; /* Backup over a non-',' char. */
+		}
+	}
+	if (! goof) {
+		S_SET_DESC(symbolP, get_absolute_expression ());
+		if (what == 's' || what == 'n') {
+			if (* input_line_pointer != ',') {
+				as_bad("I want a comma after the n_desc expression");
+				goof = 1;
+			} else {
+				input_line_pointer ++;
+			}
+		}
+	}
+	if ((! goof) && (what=='s' || what=='n')) {
+		pseudo_set(symbolP);
+		symbolP->sy_symbol.n_type = saved_type;
+	}
+	if (goof)
+		ignore_rest_of_line ();
+	else
+		demand_empty_rest_of_line ();
+} /* obj_bout_stab() */
+
+static void obj_bout_desc() {
+	register char *name;
+	register char c;
+	register char *p;
+	register symbolS *	symbolP;
+	register int temp;
+
+	/*
+	 * Frob invented at RMS' request. Set the n_desc of a symbol.
+	 */
+	name = input_line_pointer;
+	c = get_symbol_end();
+	p = input_line_pointer;
+	* p = c;
+	SKIP_WHITESPACE();
+	if (*input_line_pointer != ',') {
+		*p = 0;
+		as_bad("Expected comma after name \"%s\"", name);
+		*p = c;
+		ignore_rest_of_line();
+	} else {
+		input_line_pointer ++;
+		temp = get_absolute_expression ();
+		*p = 0;
+		symbolP = symbol_find_or_make(name);
+		*p = c;
+		S_SET_DESC(symbolP,temp);
+	}
+	demand_empty_rest_of_line();
+} /* obj_bout_desc() */
+
+void obj_read_begin_hook() {
+	return;
+} /* obj_read_begin_hook() */
+
+void obj_crawl_symbol_chain(headers)
+object_headers *headers;
+{
+	symbolS **symbolPP;
+	symbolS *symbolP;
+	int symbol_number = 0;
+
+	/* JF deal with forward references first... */
+	for (symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+		if (symbolP->sy_forward) {
+			S_SET_VALUE(symbolP, S_GET_VALUE(symbolP)
+				    + S_GET_VALUE(symbolP->sy_forward)
+				    + symbolP->sy_forward->sy_frag->fr_address);
+
+			symbolP->sy_forward=0;
+		} /* if it has a forward reference */
+	} /* walk the symbol chain */
+
+	tc_crawl_symbol_chain(headers);
+
+	symbolPP = & symbol_rootP;	/*->last symbol chain link. */
+	while ((symbolP  = *symbolPP) != NULL) {
+		if (flagseen['R'] && (S_GET_SEGMENT(symbolP) == SEG_DATA)) {
+			S_SET_SEGMENT(symbolP, SEG_TEXT);
+		} /* if pusing data into text */
+
+		S_SET_VALUE(symbolP, S_GET_VALUE(symbolP) + symbolP->sy_frag->fr_address);
+
+		/* OK, here is how we decide which symbols go out into the
+		   brave new symtab.  Symbols that do are:
+
+		   * symbols with no name (stabd's?)
+		   * symbols with debug info in their N_TYPE
+
+		   Symbols that don't are:
+		   * symbols that are registers
+		   * symbols with \1 as their 3rd character (numeric labels)
+		   * "local labels" as defined by S_LOCAL_NAME(name)
+		   if the -L switch was passed to gas.
+
+		   All other symbols are output.  We complain if a deleted
+		   symbol was marked external. */
+
+
+		if (1
+		    && !S_IS_REGISTER(symbolP)
+		    && (!S_GET_NAME(symbolP)
+			|| S_IS_DEBUG(symbolP)
+#ifdef TC_I960
+			/* FIXME-SOON this ifdef seems highly dubious to me.  xoxorich. */
+			|| !S_IS_DEFINED(symbolP)
+			|| S_IS_EXTERNAL(symbolP)
+#endif /* TC_I960 */
+			|| (S_GET_NAME(symbolP)[0] != '\001' && (flagseen ['L'] || ! S_LOCAL_NAME(symbolP))))) {
+			symbolP->sy_number = symbol_number++;
+
+			/* The + 1 after strlen account for the \0 at the
+			   end of each string */
+			if (!S_IS_STABD(symbolP)) {
+				/* Ordinary case. */
+				symbolP->sy_name_offset = string_byte_count;
+				string_byte_count += strlen(S_GET_NAME(symbolP)) + 1;
+			}
+			else	/* .Stabd case. */
+			    symbolP->sy_name_offset = 0;
+			symbolPP = &(symbol_next(symbolP));
+		} else {
+			if (S_IS_EXTERNAL(symbolP) || !S_IS_DEFINED(symbolP)) {
+				as_bad("Local symbol %s never defined", S_GET_NAME(symbolP));
+			} /* oops. */
+
+			/* Unhook it from the chain */
+			*symbolPP = symbol_next(symbolP);
+		} /* if this symbol should be in the output */
+	} /* for each symbol */
+
+	H_SET_SYMBOL_TABLE_SIZE(headers, symbol_number);
+
+	return;
+} /* obj_crawl_symbol_chain() */
+
+/*
+ * Find strings by crawling along symbol table chain.
+ */
+
+void obj_emit_strings(where)
+char **where;
+{
+	symbolS *symbolP;
+
+#ifdef CROSS_ASSEMBLE
+	/* Gotta do md_ byte-ordering stuff for string_byte_count first - KWK */
+	md_number_to_chars(*where, string_byte_count, sizeof(string_byte_count));
+	*where += sizeof(string_byte_count);
+#else /* CROSS_ASSEMBLE */
+	append(where, (char *) &string_byte_count, (unsigned long) sizeof(string_byte_count));
+#endif /* CROSS_ASSEMBLE */
+
+	for(symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+		if(S_GET_NAME(symbolP))
+		    append(where, S_GET_NAME(symbolP), (unsigned long)(strlen (S_GET_NAME(symbolP)) + 1));
+	} /* walk symbol chain */
+
+	return;
+} /* obj_emit_strings() */
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of obj-bout.c */
diff --git a/gas/config/obj-bout.h b/gas/config/obj-bout.h
new file mode 100644
index 0000000..fc95a35
--- /dev/null
+++ b/gas/config/obj-bout.h
@@ -0,0 +1,312 @@
+/* b.out object file format
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as
+published by the Free Software Foundation; either version 1,
+or (at your option) any later version.
+
+GAS is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public
+License along with GAS; see the file COPYING.  If not, write
+to the Free Software Foundation, 675 Mass Ave, Cambridge, MA
+02139, USA. */
+
+/* $Id$ */
+
+/*
+ * This file is a modified version of 'a.out.h'.  It is to be used in all GNU
+ * tools modified to support the i80960 b.out format (or tools that operate on
+ * object files created by such tools).
+ *
+ * All i80960 development is done in a CROSS-DEVELOPMENT environment.  I.e.,
+ * object code is generated on, and executed under the direction of a symbolic
+ * debugger running on, a host system.  We do not want to be subject to the
+ * vagaries of which host it is or whether it supports COFF or a.out format, or
+ * anything else.  We DO want to:
+ *
+ *	o always generate the same format object files, regardless of host.
+ *
+ *	o have an 'a.out' header that we can modify for our own purposes
+ *	  (the 80960 is typically an embedded processor and may require
+ *	  enhanced linker support that the normal a.out.h header can't
+ *	  accommodate).
+ *
+ * As for byte-ordering, the following rules apply:
+ *
+ *	o Text and data that is actually downloaded to the target is always
+ *	  in i80960 (little-endian) order.
+ *
+ *	o All other numbers (in the header, symbols, relocation directives)
+ *	  are in host byte-order:  object files CANNOT be lifted from a
+ *	  little-end host and used on a big-endian (or vice versa) without
+ *	  modification.
+ *
+ *	o The downloader ('comm960') takes care to generate a pseudo-header
+ *	  with correct (i80960) byte-ordering before shipping text and data
+ *	  off to the NINDY monitor in the target systems.  Symbols and
+ *	  relocation info are never sent to the target.
+ */
+
+
+#define OBJ_BOUT 1
+
+#include "targ-cpu.h"
+
+ /* bout uses host byte order for headers */
+#ifdef CROSS_ASSEMBLE
+#undef CROSS_ASSEMBLE
+#endif /* CROSS_ASSEMBLE */
+
+ /* We want \v. */
+#define BACKSLASH_V 1
+
+#define OBJ_DEFAULT_OUTPUT_FILE_NAME	"b.out"
+
+extern const short seg_N_TYPE[];
+extern const segT  N_TYPE_seg[];
+
+#define BMAGIC	0415
+/* We don't accept the following (see N_BADMAG macro).
+ * They're just here so GNU code will compile.
+ */
+#define	OMAGIC	0407		/* old impure format */
+#define	NMAGIC	0410		/* read-only text */
+#define	ZMAGIC	0413		/* demand load format */
+
+#ifndef DEFAULT_MAGIC_NUMBER_FOR_OBJECT_FILE
+#define DEFAULT_MAGIC_NUMBER_FOR_OBJECT_FILE	(BMAGIC)
+#endif /* DEFAULT_MAGIC_NUMBER_FOR_OBJECT_FILE */
+
+/* FILE HEADER
+ *	All 'lengths' are given as a number of bytes.
+ *	All 'alignments' are for relinkable files only;  an alignment of
+ *		'n' indicates the corresponding segment must begin at an
+ *		address that is a multiple of (2**n).
+ */
+struct exec {
+	/* Standard stuff */
+	unsigned long a_magic;	/* Identifies this as a b.out file	*/
+	unsigned long a_text;	/* Length of text			*/
+	unsigned long a_data;	/* Length of data			*/
+	unsigned long a_bss;	/* Length of runtime uninitialized data area */
+	unsigned long a_syms;	/* Length of symbol table		*/
+	unsigned long a_entry;	/* Runtime start address		*/
+	unsigned long a_trsize;	/* Length of text relocation info	*/
+	unsigned long a_drsize;	/* Length of data relocation info	*/
+
+	/* Added for i960 */
+	unsigned long a_tload;	/* Text runtime load address		*/
+	unsigned long a_dload;	/* Data runtime load address		*/
+	unsigned char a_talign;	/* Alignment of text segment		*/
+	unsigned char a_dalign;	/* Alignment of data segment		*/
+	unsigned char a_balign;	/* Alignment of bss segment		*/
+	unsigned char unused;	/* (Just to make struct size a multiple of 4) */
+};
+
+#define N_BADMAG(x)	(((x).a_magic)!=BMAGIC)
+#define N_TXTOFF(x)	( sizeof(struct exec) )
+#define N_DATOFF(x)	( N_TXTOFF(x) + (x).a_text )
+#define N_TROFF(x)	( N_DATOFF(x) + (x).a_data )
+#define N_DROFF(x)	( N_TROFF(x) + (x).a_trsize )
+#define N_SYMOFF(x)	( N_DROFF(x) + (x).a_drsize )
+#define N_STROFF(x)	( N_SYMOFF(x) + (x).a_syms )
+
+/* A single entry in the symbol table
+ */
+struct nlist {
+	union {
+		char	*n_name;
+		struct nlist *n_next;
+		long	n_strx;		/* Index into string table	*/
+	} n_un;
+	unsigned char n_type;	/* See below				*/
+	char	n_other;	/* Used in i80960 support -- see below	*/
+	short	n_desc;
+	unsigned long n_value;
+};
+
+typedef struct nlist obj_symbol_type;
+
+/* Legal values of n_type
+ */
+#define N_UNDF	0	/* Undefined symbol	*/
+#define N_ABS	2	/* Absolute symbol	*/
+#define N_TEXT	4	/* Text symbol		*/
+#define N_DATA	6	/* Data symbol		*/
+#define N_BSS	8	/* BSS symbol		*/
+#define N_FN	31	/* Filename symbol	*/
+
+#define N_EXT	1	/* External symbol (OR'd in with one of above)	*/
+#define N_TYPE	036	/* Mask for all the type bits			*/
+#define N_STAB	0340	/* Mask for all bits used for SDB entries 	*/
+
+#ifndef CUSTOM_RELOC_FORMAT
+struct relocation_info {
+	int	 r_address;	/* File address of item to be relocated	*/
+	unsigned
+		r_index:24,/* Index of symbol on which relocation is based*/
+		r_pcrel:1,	/* 1 => relocate PC-relative; else absolute
+				 *	On i960, pc-relative implies 24-bit
+				 *	address, absolute implies 32-bit.
+				 */
+		r_length:2,	/* Number of bytes to relocate:
+				 *	0 => 1 byte
+				 *	1 => 2 bytes
+				 *	2 => 4 bytes -- only value used for i960
+				 */
+		r_extern:1,
+		r_bsr:1,	/* Something for the GNU NS32K assembler */
+		r_disp:1,	/* Something for the GNU NS32K assembler */
+		r_callj:1,	/* 1 if relocation target is an i960 'callj' */
+		nuthin:1;	/* Unused				*/
+};
+#endif /* CUSTOM_RELOC_FORMAT */
+
+/* If compiler generate leading underscores, remove them. */
+
+#ifndef STRIP_UNDERSCORE
+#define STRIP_UNDERSCORE 0
+#endif /* STRIP_UNDERSCORE */
+
+/*
+ *  Macros to extract information from a symbol table entry.
+ *  This syntaxic indirection allows independence regarding a.out or coff.
+ *  The argument (s) of all these macros is a pointer to a symbol table entry.
+ */
+
+/* Predicates */
+/* True if the symbol is external */
+#define S_IS_EXTERNAL(s)	((s)->sy_symbol.n_type & N_EXT)
+
+/* True if symbol has been defined, ie is in N_{TEXT,DATA,BSS,ABS} or N_EXT */
+#define S_IS_DEFINED(s)		((S_GET_TYPE(s) != N_UNDF) || (S_GET_DESC(s) != 0))
+#define S_IS_REGISTER(s)	((s)->sy_symbol.n_type == N_REGISTER)
+
+/* True if a debug special symbol entry */
+#define S_IS_DEBUG(s)		((s)->sy_symbol.n_type & N_STAB)
+/* True if a symbol is local symbol name */
+/* A symbol name whose name begin with ^A is a gas internal pseudo symbol
+   nameless symbols come from .stab directives. */
+#define S_IS_LOCAL(s)		(S_GET_NAME(s) && \
+				 !S_IS_DEBUG(s) && \
+				 (S_GET_NAME(s)[0] == '\001' || \
+				  (S_LOCAL_NAME(s) && !flagseen['L'])))
+/* True if a symbol is not defined in this file */
+#define S_IS_EXTERN(s)		((s)->sy_symbol.n_type & N_EXT)
+/* True if the symbol has been generated because of a .stabd directive */
+#define S_IS_STABD(s)		(S_GET_NAME(s) == NULL)
+
+/* Accessors */
+/* The value of the symbol */
+#define S_GET_VALUE(s)		((long) ((s)->sy_symbol.n_value))
+/* The name of the symbol */
+#define S_GET_NAME(s)		((s)->sy_symbol.n_un.n_name)
+/* The pointer to the string table */
+#define S_GET_OFFSET(s)		((s)->sy_symbol.n_un.n_strx)
+/* The type of the symbol */
+#define S_GET_TYPE(s)		((s)->sy_symbol.n_type & N_TYPE)
+/* The numeric value of the segment */
+#define S_GET_SEGMENT(s)	(N_TYPE_seg[S_GET_TYPE(s)])
+/* The n_other expression value */
+#define S_GET_OTHER(s)		((s)->sy_symbol.n_other)
+/* The n_desc expression value */
+#define S_GET_DESC(s)		((s)->sy_symbol.n_desc)
+
+/* Modifiers */
+/* Set the value of the symbol */
+#define S_SET_VALUE(s,v)	((s)->sy_symbol.n_value = (unsigned long) (v))
+/* Assume that a symbol cannot be simultaneously in more than on segment */
+ /* set segment */
+#define S_SET_SEGMENT(s,seg)	((s)->sy_symbol.n_type &= ~N_TYPE,(s)->sy_symbol.n_type|=SEGMENT_TO_SYMBOL_TYPE(seg))
+/* The symbol is external */
+#define S_SET_EXTERNAL(s)	((s)->sy_symbol.n_type |= N_EXT)
+/* The symbol is not external */
+#define S_CLEAR_EXTERNAL(s)	((s)->sy_symbol.n_type &= ~N_EXT)
+/* Set the name of the symbol */
+#define S_SET_NAME(s,v)		((s)->sy_symbol.n_un.n_name = (v))
+/* Set the offset in the string table */
+#define S_SET_OFFSET(s,v)	((s)->sy_symbol.n_un.n_strx = (v))
+/* Set the n_other expression value */
+#define S_SET_OTHER(s,v)	((s)->sy_symbol.n_other = (v))
+/* Set the n_desc expression value */
+#define S_SET_DESC(s,v)		((s)->sy_symbol.n_desc = (v))
+
+/* File header macro and type definition */
+
+#define H_GET_FILE_SIZE(h)	(sizeof(struct exec) + \
+				 H_GET_TEXT_SIZE(h) + H_GET_DATA_SIZE(h) + \
+				 H_GET_SYMBOL_TABLE_SIZE(h) + \
+				 H_GET_TEXT_RELOCATION_SIZE(h) + \
+				 H_GET_DATA_RELOCATION_SIZE(h) + \
+				 (h)->string_table_size)
+
+#define H_GET_TEXT_SIZE(h)		((h)->header.a_text)
+#define H_GET_DATA_SIZE(h)		((h)->header.a_data)
+#define H_GET_BSS_SIZE(h)		((h)->header.a_bss)
+#define H_GET_TEXT_RELOCATION_SIZE(h)	((h)->header.a_trsize)
+#define H_GET_DATA_RELOCATION_SIZE(h)	((h)->header.a_drsize)
+#define H_GET_SYMBOL_TABLE_SIZE(h)	((h)->header.a_syms)
+#define H_GET_MAGIC_NUMBER(h)		((h)->header.a_info)
+#define H_GET_ENTRY_POINT(h)		((h)->header.a_entry)
+#define H_GET_STRING_SIZE(h)		((h)->string_table_size)
+#ifdef EXEC_MACHINE_TYPE
+#define H_GET_MACHINE_TYPE(h)		((h)->header.a_machtype)
+#endif /* EXEC_MACHINE_TYPE */
+#ifdef EXEC_VERSION
+#define H_GET_VERSION(h)		((h)->header.a_version)
+#endif /* EXEC_VERSION */
+
+#define H_SET_TEXT_SIZE(h,v)		((h)->header.a_text = md_section_align(SEG_TEXT, (v)))
+#define H_SET_DATA_SIZE(h,v)		((h)->header.a_data = md_section_align(SEG_DATA, (v)))
+#define H_SET_BSS_SIZE(h,v)		((h)->header.a_bss = md_section_align(SEG_BSS, (v)))
+
+#define H_SET_RELOCATION_SIZE(h,t,d)	(H_SET_TEXT_RELOCATION_SIZE((h),(t)),\
+					 H_SET_DATA_RELOCATION_SIZE((h),(d)))
+
+#define H_SET_TEXT_RELOCATION_SIZE(h,v)	((h)->header.a_trsize = (v))
+#define H_SET_DATA_RELOCATION_SIZE(h,v)	((h)->header.a_drsize = (v))
+#define H_SET_SYMBOL_TABLE_SIZE(h,v)	((h)->header.a_syms = (v) * \
+					 sizeof(struct nlist))
+
+#define H_SET_MAGIC_NUMBER(h,v)		((h)->header.a_magic = (v))
+
+#define H_SET_ENTRY_POINT(h,v)		((h)->header.a_entry = (v))
+#define H_SET_STRING_SIZE(h,v)		((h)->string_table_size = (v))
+#ifdef EXEC_MACHINE_TYPE
+#define H_SET_MACHINE_TYPE(h,v)		((h)->header.a_machtype = (v))
+#endif /* EXEC_MACHINE_TYPE */
+#ifdef EXEC_VERSION
+#define H_SET_VERSION(h,v)		((h)->header.a_version = (v))
+#endif /* EXEC_VERSION */
+
+/* 
+ * Current means for getting the name of a segment.
+ * This will change for infinite-segments support (e.g. COFF).
+ */
+#define	segment_name(seg)  ( seg_name[(int)(seg)] )
+extern char *const seg_name[];
+
+typedef struct {
+    struct exec	header;			/* a.out header */
+    long	string_table_size;	/* names + '\0' + sizeof(int) */
+} object_headers;
+
+/* unused hooks. */
+#define OBJ_EMIT_LINENO(a, b, c)	;
+#define obj_pre_write_hook(a)		;
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of obj-bout.h */
diff --git a/gas/config/obj-coff.c b/gas/config/obj-coff.c
new file mode 100644
index 0000000..ef48334
--- /dev/null
+++ b/gas/config/obj-coff.c
@@ -0,0 +1,1772 @@
+/* coff object file format
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#include "as.h"
+
+#include "obstack.h"
+
+lineno* lineno_rootP;
+
+const short seg_N_TYPE[] = { /* in: segT   out: N_TYPE bits */
+	C_ABS_SECTION,
+	C_TEXT_SECTION,
+	C_DATA_SECTION,
+	C_BSS_SECTION,
+	C_UNDEF_SECTION,		/* SEG_UNKNOWN */
+	C_UNDEF_SECTION,		/* SEG_ABSENT */
+	C_UNDEF_SECTION,		/* SEG_PASS1 */
+	C_UNDEF_SECTION,		/* SEG_GOOF */
+	C_UNDEF_SECTION,		/* SEG_BIG */
+	C_UNDEF_SECTION,		/* SEG_DIFFERENCE */
+	C_DEBUG_SECTION,		/* SEG_DEBUG */
+	C_NTV_SECTION,		/* SEG_NTV */
+	C_PTV_SECTION,		/* SEG_PTV */
+};
+
+
+/* Add 4 to the real value to get the index and compensate the negatives */
+
+const segT N_TYPE_seg [32] =
+{
+  SEG_PTV,			/* C_PTV_SECTION	== -4 */
+  SEG_NTV,			/* C_NTV_SECTION	== -3 */
+  SEG_DEBUG,			/* C_DEBUG_SECTION	== -2 */
+  SEG_ABSOLUTE,			/* C_ABS_SECTION	== -1 */
+  SEG_UNKNOWN,			/* C_UNDEF_SECTION	== 0 */
+  SEG_TEXT,			/* C_TEXT_SECTION	== 1 */
+  SEG_DATA,			/* C_DATA_SECTION	== 2 */
+  SEG_BSS,			/* C_BSS_SECTION	== 3 */
+  SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,
+  SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,
+  SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF,SEG_GOOF
+};
+
+#ifdef __STDC__
+
+char *s_get_name(symbolS *s);
+static symbolS *tag_find_or_make(char *name);
+static symbolS* tag_find(char *name);
+static void c_section_header_append(char **where, SCNHDR *header);
+static void obj_coff_def(int what);
+static void obj_coff_dim(void);
+static void obj_coff_endef(void);
+static void obj_coff_line(void);
+static void obj_coff_ln(void);
+static void obj_coff_scl(void);
+static void obj_coff_size(void);
+static void obj_coff_stab(int what);
+static void obj_coff_tag(void);
+static void obj_coff_type(void);
+static void obj_coff_val(void);
+static void tag_init(void);
+static void tag_insert(char *name, symbolS *symbolP);
+
+#else
+
+char *s_get_name();
+static symbolS *tag_find();
+static symbolS *tag_find_or_make();
+static void c_section_header_append();
+static void obj_coff_def();
+static void obj_coff_dim();
+static void obj_coff_endef();
+static void obj_coff_line();
+static void obj_coff_ln();
+static void obj_coff_scl();
+static void obj_coff_size();
+static void obj_coff_stab();
+static void obj_coff_tag();
+static void obj_coff_type();
+static void obj_coff_val();
+static void tag_init();
+static void tag_insert();
+
+#endif /* __STDC__ */
+
+static struct hash_control *tag_hash;
+static symbolS *def_symbol_in_progress = NULL;
+
+const pseudo_typeS obj_pseudo_table[] = {
+#ifndef IGNORE_DEBUG
+	{ "def",	obj_coff_def,		0	},
+	{ "dim",	obj_coff_dim,		0	},
+	{ "endef",	obj_coff_endef,		0	},
+	{ "line",	obj_coff_line,		0	},
+	{ "ln",		obj_coff_ln,		0	},
+	{ "scl",	obj_coff_scl,		0	},
+	{ "size",	obj_coff_size,		0	},
+	{ "tag",	obj_coff_tag,		0	},
+	{ "type",	obj_coff_type,		0	},
+	{ "val",	obj_coff_val,		0	},
+#else
+	{ "def",	s_ignore,		0	},
+	{ "dim",	s_ignore,		0	},
+	{ "endef",	s_ignore,		0	},
+	{ "line",	s_ignore,		0	},
+	{ "ln",		s_ignore,		0	},
+	{ "scl",	s_ignore,		0	},
+	{ "size",	s_ignore,		0	},
+	{ "tag",	s_ignore,		0	},
+	{ "type",	s_ignore,		0	},
+	{ "val",	s_ignore,		0	},
+#endif /* ignore debug */
+
+ /* stabs aka a.out aka b.out directives for debug symbols.
+    Currently ignored silently.  Except for .line which we
+    guess at from context. */
+	{ "desc",	s_ignore,		0	}, /* def */
+/*	{ "line",	s_ignore,		0	}, */ /* source code line number */
+	{ "stabd",	obj_coff_stab,		'd'	}, /* stabs */
+	{ "stabn",	obj_coff_stab,		'n'	}, /* stabs */
+	{ "stabs",	obj_coff_stab,		's'	}, /* stabs */
+
+ /* other stuff */
+	{ "ABORT",      s_abort,		0 },
+	{ "ident",      s_ignore,		0 },
+
+	{ NULL}	/* end sentinel */
+}; /* obj_pseudo_table */
+
+
+ /* obj dependant output values */
+static SCNHDR bss_section_header;
+static SCNHDR data_section_header;
+static SCNHDR text_section_header;
+
+/* Relocation. */
+
+/*
+ *		emit_relocations()
+ *
+ * Crawl along a fixS chain. Emit the segment's relocations.
+ */
+
+void obj_emit_relocations(where, fixP, segment_address_in_file)
+char **where;
+fixS *fixP; /* Fixup chain for this segment. */
+relax_addressT segment_address_in_file;
+{
+	RELOC ri;
+	symbolS *symbolP;
+
+	bzero((char *)&ri,sizeof(ri));
+	for (;  fixP;  fixP = fixP->fx_next) {
+		if (symbolP = fixP->fx_addsy) {
+#if defined(TC_M68K)
+			ri.r_type = (fixP->fx_pcrel ?
+				     (fixP->fx_size == 1 ? R_PCRBYTE :
+				      fixP->fx_size == 2 ? R_PCRWORD :
+				      R_PCRLONG):
+				     (fixP->fx_size == 1 ? R_RELBYTE :
+				      fixP->fx_size == 2 ? R_RELWORD :
+				      R_RELLONG));
+#elif defined(TC_I386)
+			/* FIXME-SOON R_OFF8 & R_DIR16 are a vague guess, completly untested. */
+			ri.r_type = (fixP->fx_pcrel ?
+				     (fixP->fx_size == 1 ? R_PCRBYTE :
+				      fixP->fx_size == 2 ? R_PCRWORD :
+				      R_PCRLONG):
+				     (fixP->fx_size == 1 ? R_OFF8 :
+				      fixP->fx_size == 2 ? R_DIR16 :
+				      R_DIR32));
+#elif defined(TC_I960)
+			ri.r_type = (fixP->fx_pcrel
+				     ? R_IPRMED
+				     : R_RELLONG);
+#elif defined(TC_A29K)
+			ri.r_type = tc_coff_fix2rtype(fixP);
+#else
+			you lose
+#endif /* TC_M68K || TC_I386 */
+			    ri.r_vaddr = fixP->fx_frag->fr_address + fixP->fx_where;
+			/* If symbol associated to relocation entry is a bss symbol
+			   or undefined symbol just remember the index of the symbol.
+			   Otherwise store the index of the symbol describing the
+			   section the symbol belong to. This heuristic speeds up ld.
+			   */
+			/* Local symbols can generate relocation information. In case
+			   of structure return for instance. But they have no symbol
+			   number because they won't be emitted in the final object.
+			   In the case where they are in the BSS section, this leads
+			   to an incorrect r_symndx.
+			   Under bsd the loader do not care if the symbol reference is
+			   incorrect. But the SYS V ld complains about this. To avoid
+			   this we associate the symbol to the associated section,
+			   *even* if it is the BSS section. */
+			/* If someone can tell me why the other symbols of the bss
+			   section are not associated with the .bss section entry,
+			   I'd be gratefull. I guess that it has to do with the special
+			   nature of the .bss section. Or maybe this is because the
+			   bss symbols are declared in the common section and can
+			   be resized later. Can it break code some where ? */
+			ri.r_symndx = (S_GET_SEGMENT(symbolP) == SEG_TEXT
+				       ? dot_text_symbol->sy_number
+				       : (S_GET_SEGMENT(symbolP) == SEG_DATA
+					  ? dot_data_symbol->sy_number
+					  : ((SF_GET_LOCAL(symbolP)
+					      ? dot_bss_symbol->sy_number
+					      : symbolP->sy_number)))); /* bss or undefined */
+
+			/* md_ri_to_chars((char *) &ri, ri); */  /* Last step : write md f */
+			append(where, (char *) &ri, sizeof(ri));
+
+#ifdef TC_I960
+			if (fixP->fx_callj) {
+				ri.r_type = R_OPTCALL;
+				append(where, (char *) &ri, sizeof(ri));
+			} /* if it's a callj, do it again for the opcode */
+#endif /* TC_I960 */
+
+		} /* if there's a symbol */
+	} /* for each fixP */
+
+	return;
+} /* obj_emit_relocations() */
+
+/* Coff file generation & utilities */
+
+void obj_header_append(where, headers)
+char **where;
+object_headers *headers;
+{
+	tc_headers_hook(headers);
+
+#ifdef CROSS_ASSEMBLE
+	/* Eventually swap bytes for cross compilation for file header */
+	md_number_to_chars(*where, headers->filehdr.f_magic, sizeof(headers->filehdr.f_magic));
+	*where += sizeof(headers->filehdr.f_magic);
+	md_number_to_chars(*where, headers->filehdr.f_nscns, sizeof(headers->filehdr.f_nscns));
+	*where += sizeof(headers->filehdr.f_nscns);
+	md_number_to_chars(*where, headers->filehdr.f_timdat, sizeof(headers->filehdr.f_timdat));
+	*where += sizeof(headers->filehdr.f_timdat);
+	md_number_to_chars(*where, headers->filehdr.f_symptr, sizeof(headers->filehdr.f_symptr));
+	*where += sizeof(headers->filehdr.f_symptr);
+	md_number_to_chars(*where, headers->filehdr.f_nsyms, sizeof(headers->filehdr.f_nsyms));
+	*where += sizeof(headers->filehdr.f_nsyms);
+	md_number_to_chars(*where, headers->filehdr.f_opthdr, sizeof(headers->filehdr.f_opthdr));
+	*where += sizeof(headers->filehdr.f_opthdr);
+	md_number_to_chars(*where, headers->filehdr.f_flags, sizeof(headers->filehdr.f_flags));
+	*where += sizeof(headers->filehdr.f_flags);
+
+#ifndef OBJ_COFF_OMIT_OPTIONAL_HEADER
+	/* Eventually swap bytes for cross compilation for a.out header */
+	md_number_to_chars(*where, headers->aouthdr.magic, sizeof(headers->aouthdr.magic));
+	*where += sizeof(headers->aouthdr.magic);
+	md_number_to_chars(*where, headers->aouthdr.vstamp, sizeof(headers->aouthdr.vstamp));
+	*where += sizeof(headers->aouthdr.vstamp);
+	md_number_to_chars(*where, headers->aouthdr.tsize, sizeof(headers->aouthdr.tsize));
+	*where += sizeof(headers->aouthdr.tsize);
+	md_number_to_chars(*where, headers->aouthdr.dsize, sizeof(headers->aouthdr.dsize));
+	*where += sizeof(headers->aouthdr.dsize);
+	md_number_to_chars(*where, headers->aouthdr.bsize, sizeof(headers->aouthdr.bsize));
+	*where += sizeof(headers->aouthdr.bsize);
+	md_number_to_chars(*where, headers->aouthdr.entry, sizeof(headers->aouthdr.entry));
+	*where += sizeof(headers->aouthdr.entry);
+	md_number_to_chars(*where, headers->aouthdr.text_start, sizeof(headers->aouthdr.text_start));
+	*where += sizeof(headers->aouthdr.text_start);
+	md_number_to_chars(*where, headers->aouthdr.data_start, sizeof(headers->aouthdr.data_start));
+	*where += sizeof(headers->aouthdr.data_start);
+#endif /* OBJ_COFF_OMIT_OPTIONAL_HEADER */
+
+#else /* CROSS_ASSEMBLE */
+
+	append(where, (char *) &headers->filehdr, sizeof(headers->filehdr));
+#ifndef OBJ_COFF_OMIT_OPTIONAL_HEADER
+	append(where, (char *) &headers->aouthdr, sizeof(headers->aouthdr));
+#endif /* OBJ_COFF_OMIT_OPTIONAL_HEADER */
+
+#endif /* CROSS_ASSEMBLE */
+
+	/* Output the section headers */
+	c_section_header_append(where, &text_section_header);
+	c_section_header_append(where, &data_section_header);
+	c_section_header_append(where, &bss_section_header);
+
+	return;
+} /* obj_header_append() */
+
+void obj_symbol_to_chars(where, symbolP)
+char **where;
+symbolS *symbolP;
+{
+	SYMENT *syment = &symbolP->sy_symbol.ost_entry;
+	int i;
+	char numaux = syment->n_numaux;
+	unsigned short type = S_GET_DATA_TYPE(symbolP);
+
+#ifdef CROSS_ASSEMBLE
+	md_number_to_chars(*where, syment->n_value, sizeof(syment->n_value));
+	*where += sizeof(syment->n_value);
+	md_number_to_chars(*where, syment->n_scnum, sizeof(syment->n_scnum));
+	*where += sizeof(syment->n_scnum);
+	md_number_to_chars(*where, syment->n_type, sizeof(syment->n_type));
+	*where += sizeof(syment->n_type);
+	md_number_to_chars(*where, syment->n_sclass, sizeof(syment->n_sclass));
+	*where += sizeof(syment->n_sclass);
+	md_number_to_chars(*where, syment->n_numaux, sizeof(syment->n_numaux));
+	*where += sizeof(syment->n_numaux);
+#else /* CROSS_ASSEMBLE */
+	append(where, (char *) syment, sizeof(*syment));
+#endif /* CROSS_ASSEMBLE */
+
+	/* Should do the following : if (.file entry) MD(..)... else if (static entry) MD(..) */
+	if (numaux > OBJ_COFF_MAX_AUXENTRIES) {
+		as_bad("Internal error? too many auxents for symbol");
+	} /* too many auxents */
+
+	for (i = 0; i < numaux; ++i) {
+#ifdef CROSS_ASSEMBLE
+#if 0 /* This code has never been tested */
+		/* The most common case, x_sym entry. */
+		if ((SF_GET(symbolP) & (SF_FILE | SF_STATICS)) == 0) {
+			md_number_to_chars(*where, auxP->x_sym.x_tagndx, sizeof(auxP->x_sym.x_tagndx));
+			*where += sizeof(auxP->x_sym.x_tagndx);
+			if (ISFCN(type)) {
+				md_number_to_chars(*where, auxP->x_sym.x_misc.x_fsize, sizeof(auxP->x_sym.x_misc.x_fsize));
+				*where += sizeof(auxP->x_sym.x_misc.x_fsize);
+			} else {
+				md_number_to_chars(*where, auxP->x_sym.x_misc.x_lnno, sizeof(auxP->x_sym.x_misc.x_lnno));
+				*where += sizeof(auxP->x_sym.x_misc.x_lnno);
+				md_number_to_chars(*where, auxP->x_sym.x_misc.x_size, sizeof(auxP->x_sym.x_misc.x_size));
+				*where += sizeof(auxP->x_sym.x_misc.x_size);
+			}
+			if (ISARY(type)) {
+				register int index;
+				for (index = 0; index < DIMNUM; index++)
+				    md_number_to_chars(*where, auxP->x_sym.x_fcnary.x_ary.x_dimen[index], sizeof(auxP->x_sym.x_fcnary.x_ary.x_dimen[index]));
+				*where += sizeof(auxP->x_sym.x_fcnary.x_ary.x_dimen[index]);
+			} else {
+				md_number_to_chars(*where, auxP->x_sym.x_fcnary.x_fcn.x_lnnoptr, sizeof(auxP->x_sym.x_fcnary.x_fcn.x_lnnoptr));
+				*where += sizeof(auxP->x_sym.x_fcnary.x_fcn.x_lnnoptr);
+				md_number_to_chars(*where, auxP->x_sym.x_fcnary.x_fcn.x_endndx, sizeof(auxP->x_sym.x_fcnary.x_fcn.x_endndx));
+				*where += sizeof(auxP->x_sym.x_fcnary.x_fcn.x_endndx);
+			}
+			md_number_to_chars(*where, auxP->x_sym.x_tvndx, sizeof(auxP->x_sym.x_tvndx));
+			*where += sizeof(auxP->x_sym.x_tvndx);
+		} else if (SF_GET_FILE(symbolP)) {	/* .file */
+			;
+		} else if (SF_GET_STATICS(symbolP)) { /* .text, .data, .bss symbols */
+			md_number_to_chars(*where, auxP->x_scn.x_scnlen, sizeof(auxP->x_scn.x_scnlen));
+			*where += sizeof(auxP->x_scn.x_scnlen);
+			md_number_to_chars(*where, auxP->x_scn.x_nreloc, sizeof(auxP->x_scn.x_nreloc));
+			*where += sizeof(auxP->x_scn.x_nreloc);
+			md_number_to_chars(*where, auxP->x_scn.x_nlinno, sizeof(auxP->x_scn.x_nlinno));
+			*where += sizeof(auxP->x_scn.x_nlinno);
+		}
+#endif /* 0 */
+#else /* CROSS_ASSEMBLE */
+		append(where, (char *) &symbolP->sy_symbol.ost_auxent[i], sizeof(symbolP->sy_symbol.ost_auxent[i]));
+#endif /* CROSS_ASSEMBLE */
+
+	}; /* for each aux in use */
+
+	return;
+} /* obj_symbol_to_chars() */
+
+static void c_section_header_append(where, header)
+char **where;
+SCNHDR *header;
+{
+#ifdef CROSS_ASSEMBLE
+    md_number_to_chars(*where, header->s_paddr, sizeof(header->s_paddr));
+    *where += sizeof(header->s_paddr);
+
+    md_number_to_chars(*where, header->s_vaddr, sizeof(header->s_vaddr));
+    *where += sizeof(header->s_vaddr);
+
+    md_number_to_chars(*where, header->s_size, sizeof(header->s_size));
+    *where += sizeof(header->s_size);
+
+    md_number_to_chars(*where, header->s_scnptr, sizeof(header->s_scnptr));
+    *where += sizeof(header->s_scnptr);
+
+    md_number_to_chars(*where, header->s_relptr, sizeof(header->s_relptr));
+    *where += sizeof(header->s_relptr);
+
+    md_number_to_chars(*where, header->s_lnnoptr, sizeof(header->s_lnnoptr));
+    *where += sizeof(header->s_lnnoptr);
+
+    md_number_to_chars(*where, header->s_nreloc, sizeof(header->s_nreloc));
+    *where += sizeof(header->s_nreloc);
+
+    md_number_to_chars(*where, header->s_nlnno, sizeof(header->s_nlnno));
+    *where += sizeof(header->s_nlnno);
+
+    md_number_to_chars(*where, header->s_flags, sizeof(header->s_flags));
+    *where += sizeof(header->s_flags);
+
+#else /* CROSS_ASSEMBLE */
+
+    append(where, (char *) header, sizeof(*header));
+
+#endif /* CROSS_ASSEMBLE */
+
+    return;
+} /* c_section_header_append() */
+
+
+void obj_emit_symbols(where, symbol_rootP)
+char **where;
+symbolS *symbol_rootP;
+{
+    symbolS *symbolP;
+    /*
+     * Emit all symbols left in the symbol chain.
+     */
+    for (symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+	    /* Used to save the offset of the name. It is used to point
+	       to the string in memory but must be a file offset. */
+	    register char *	temp;
+
+	    tc_coff_symbol_emit_hook(symbolP);
+
+	    temp = S_GET_NAME(symbolP);
+	    if (SF_GET_STRING(symbolP)) {
+		    S_SET_OFFSET(symbolP, symbolP->sy_name_offset);
+		    S_SET_ZEROES(symbolP, 0);
+	    } else {
+		    bzero(symbolP->sy_symbol.ost_entry.n_name, SYMNMLEN);
+		    strncpy(symbolP->sy_symbol.ost_entry.n_name, temp, SYMNMLEN);
+	    }
+	    obj_symbol_to_chars(where, symbolP);
+	    S_SET_NAME(symbolP,temp);
+    }
+} /* obj_emit_symbols() */
+
+/* Merge a debug symbol containing debug information into a normal symbol. */
+
+void c_symbol_merge(debug, normal)
+symbolS *debug;
+symbolS *normal;
+{
+	S_SET_DATA_TYPE(normal, S_GET_DATA_TYPE(debug));
+	S_SET_STORAGE_CLASS(normal, S_GET_STORAGE_CLASS(debug));
+
+	if (S_GET_NUMBER_AUXILIARY(debug) > S_GET_NUMBER_AUXILIARY(normal)) {
+		S_SET_NUMBER_AUXILIARY(normal, S_GET_NUMBER_AUXILIARY(debug));
+	} /* take the most we have */
+
+	if (S_GET_NUMBER_AUXILIARY(debug) > 0) {
+		memcpy((char*)&normal->sy_symbol.ost_auxent[0], (char*)&debug->sy_symbol.ost_auxent[0], S_GET_NUMBER_AUXILIARY(debug) * AUXESZ);
+	} /* Move all the auxiliary information */
+
+	/* Move the debug flags. */
+	SF_SET_DEBUG_FIELD(normal, SF_GET_DEBUG_FIELD(debug));
+} /* c_symbol_merge() */
+
+static symbolS *previous_file_symbol = NULL;
+
+void c_dot_file_symbol(filename)
+char *filename;
+{
+    symbolS* symbolP;
+
+    symbolP = symbol_new(".file",
+			 SEG_DEBUG,
+			 0,
+			 &zero_address_frag);
+
+    S_SET_STORAGE_CLASS(symbolP, C_FILE);
+    S_SET_NUMBER_AUXILIARY(symbolP, 1);
+    SA_SET_FILE_FNAME(symbolP, filename);
+    SF_SET_DEBUG(symbolP);
+    S_SET_VALUE(symbolP, (long) previous_file_symbol);
+
+    previous_file_symbol = symbolP;
+
+    /* Make sure that the symbol is first on the symbol chain */
+    if (symbol_rootP != symbolP) {
+	    if (symbolP == symbol_lastP) {
+		    symbol_lastP = symbol_lastP->sy_previous;
+	    } /* if it was the last thing on the list */
+
+	    symbol_remove(symbolP, &symbol_rootP, &symbol_lastP);
+	    symbol_insert(symbolP, symbol_rootP, &symbol_rootP, &symbol_lastP);
+	    symbol_rootP = symbolP;
+    } /* if not first on the list */
+
+} /* c_dot_file_symbol() */
+/*
+ * Build a 'section static' symbol.
+ */
+
+char *c_section_symbol(name, value, length, nreloc, nlnno)
+char *name;
+long value;
+long length;
+unsigned short nreloc;
+unsigned short nlnno;
+{
+    symbolS *symbolP;
+
+    symbolP = symbol_new(name,
+			 (name[1] == 't'
+			  ? SEG_TEXT
+			  : (name[1] == 'd'
+			     ? SEG_DATA
+			     : SEG_BSS)),
+			 value,
+			 &zero_address_frag);
+
+    S_SET_STORAGE_CLASS(symbolP, C_STAT);
+    S_SET_NUMBER_AUXILIARY(symbolP, 1);
+
+    SA_SET_SCN_SCNLEN(symbolP, length);
+    SA_SET_SCN_NRELOC(symbolP, nreloc);
+    SA_SET_SCN_NLINNO(symbolP, nlnno);
+
+    SF_SET_STATICS(symbolP);
+
+    return (char*)symbolP;
+} /* c_section_symbol() */
+
+void c_section_header(header,
+		      name,
+		      core_address,
+		      size,
+		      data_ptr,
+		      reloc_ptr,
+		      lineno_ptr,
+		      reloc_number,
+		      lineno_number,
+		      alignment)
+SCNHDR *header;
+char *name;
+long core_address;
+long size;
+long data_ptr;
+long reloc_ptr;
+long lineno_ptr;
+long reloc_number;
+long lineno_number;
+long alignment;
+{
+	strncpy(header->s_name, name, 8);
+	header->s_paddr = header->s_vaddr = core_address;
+	header->s_scnptr = ((header->s_size = size) != 0) ? data_ptr : 0;
+	header->s_relptr = reloc_ptr;
+	header->s_lnnoptr = lineno_ptr;
+	header->s_nreloc = reloc_number;
+	header->s_nlnno = lineno_number;
+
+#ifdef OBJ_COFF_SECTION_HEADER_HAS_ALIGNMENT
+#ifdef OBJ_COFF_BROKEN_ALIGNMENT
+	header->s_align = ((name[1] == 'b' || (size > 0)) ? 16 : 0);
+#else
+	header->s_align = ((alignment == 0)
+			   ? 0
+			   : (1 << alignment));
+#endif /* OBJ_COFF_BROKEN_ALIGNMENT */
+#endif /* OBJ_COFF_SECTION_HEADER_HAS_ALIGNMENT */
+
+	header->s_flags = STYP_REG | (name[1] == 't'
+				      ? STYP_TEXT
+				      : (name[1] == 'd'
+					 ? STYP_DATA
+					 : (name[1] == 'b'
+					    ? STYP_BSS
+					    : STYP_INFO)));
+	return;
+} /* c_section_header() */
+
+/* Line number handling */
+
+int function_lineoff = -1;	/* Offset in line#s where the last function
+				   started (the odd entry for line #0) */
+int text_lineno_number = 0;
+int our_lineno_number = 0;	/* we use this to build pointers from .bf's
+				   into the linetable.  It should match
+				   exactly the values that are later
+				   assigned in text_lineno_number by
+				   write.c. */
+lineno* lineno_lastP = (lineno*)0;
+
+int
+c_line_new(paddr, line_number, frag)
+long paddr;
+unsigned short line_number;
+fragS* frag;
+{
+    lineno* new_line = (lineno*)xmalloc(sizeof(lineno));
+
+    new_line->line.l_addr.l_paddr = paddr;
+    new_line->line.l_lnno = line_number;
+    new_line->frag = (char*)frag;
+    new_line->next = (lineno*)0;
+
+    if (lineno_rootP == (lineno*)0)
+	lineno_rootP = new_line;
+    else
+	lineno_lastP->next = new_line;
+    lineno_lastP = new_line;
+    return LINESZ * our_lineno_number++;
+}
+
+void obj_emit_lineno(where, line, file_start)
+char **where;
+lineno *line;
+char *file_start;
+{
+	LINENO *line_entry;
+
+	for (; line; line = line->next) {
+		line_entry = &line->line;
+
+ /* FIXME-SOMEDAY Resolving the sy_number of function linno's used to be done in
+    write_object_file() but their symbols need a fileptr to the lnno, so
+    I moved this resolution check here.  xoxorich. */
+
+		if (line_entry->l_lnno == 0) {
+			/* There is a good chance that the symbol pointed to
+			   is not the one that will be emitted and that the
+			   sy_number is not accurate. */
+/*			char *name; */
+			symbolS *symbolP;
+
+			symbolP = (symbolS *) line_entry->l_addr.l_symndx;
+
+			line_entry->l_addr.l_symndx = symbolP->sy_number;
+			symbolP->sy_symbol.ost_auxent[0].x_sym.x_fcnary.x_fcn.x_lnnoptr = *where - file_start;
+
+		} /* if this is a function linno */
+
+		/* No matter which member of the union we process, they are
+		   both long. */
+#ifdef CROSS_ASSEMBLE
+		md_number_to_chars(*where, line_entry->l_addr.l_paddr, sizeof(line_entry->l_addr.l_paddr));
+		*where += sizeof(line_entry->l_addr.l_paddr);
+
+		md_number_to_chars(*where, line_entry->l_lnno, sizeof(line_entry->l_lnno));
+		*where += sizeof(line_entry->l_lnno);
+#else /* CROSS_ASSEMBLE */
+		append(where, (char *) line_entry, LINESZ);
+#endif /* CROSS_ASSEMBLE */
+
+	} /* for each line number */
+
+	return ;
+} /* obj_emit_lineno() */
+
+void obj_symbol_new_hook(symbolP)
+symbolS *symbolP;
+{
+	char underscore = 0;      /* Symbol has leading _ */
+
+	/* Effective symbol */
+	/* Store the pointer in the offset. */
+	S_SET_ZEROES(symbolP, 0L);
+	S_SET_DATA_TYPE(symbolP, T_NULL);
+	S_SET_STORAGE_CLASS(symbolP, 0);
+	S_SET_NUMBER_AUXILIARY(symbolP, 0);
+	/* Additional information */
+	symbolP->sy_symbol.ost_flags = 0;
+	/* Auxiliary entries */
+	bzero((char*)&symbolP->sy_symbol.ost_auxent[0], AUXESZ);
+
+#if STRIP_UNDERSCORE
+	/* Remove leading underscore at the beginning of the symbol.
+	 * This is to be compatible with the standard librairies.
+	 */
+	if (*S_GET_NAME(symbolP) == '_') {
+		underscore = 1;
+		S_SET_NAME(symbolP, S_GET_NAME(symbolP) + 1);
+	} /* strip underscore */
+#endif /* STRIP_UNDERSCORE */
+
+	if (S_IS_STRING(symbolP))
+	    SF_SET_STRING(symbolP);
+	if (!underscore && S_IS_LOCAL(symbolP))
+	    SF_SET_LOCAL(symbolP);
+
+	return;
+} /* obj_symbol_new_hook() */
+
+ /* stack stuff */
+stack* stack_init(chunk_size, element_size)
+unsigned long chunk_size;
+unsigned long element_size;
+{
+	stack* st;
+
+	if ((st = (stack*)malloc(sizeof(stack))) == (stack*)0)
+	    return (stack*)0;
+	if ((st->data = malloc(chunk_size)) == (char*)0) {
+		free(st);
+		return (stack*)0;
+	}
+	st->pointer = 0;
+	st->size = chunk_size;
+	st->chunk_size = chunk_size;
+	st->element_size = element_size;
+	return st;
+} /* stack_init() */
+
+void stack_delete(st)
+stack* st;
+{
+    free(st->data);
+    free(st);
+}
+
+char *stack_push(st, element)
+stack *st;
+char *element;
+{
+	if (st->pointer + st->element_size >= st->size) {
+		st->size += st->chunk_size;
+		if ((st->data = xrealloc(st->data, st->size)) == (char*)0)
+		    return (char*)0;
+	}
+	memcpy(st->data + st->pointer, element, st->element_size);
+	st->pointer += st->element_size;
+	return st->data + st->pointer;
+} /* stack_push() */
+
+char* stack_pop(st)
+stack* st;
+{
+    if ((st->pointer -= st->element_size) < 0) {
+	st->pointer = 0;
+	return (char*)0;
+    }
+    return st->data + st->pointer;
+}
+
+char* stack_top(st)
+stack* st;
+{
+    return st->data + st->pointer - st->element_size;
+}
+
+
+/*
+ * Handle .ln directives.
+ */
+
+static void obj_coff_ln() {
+	if (def_symbol_in_progress != NULL) {
+		as_warn(".ln pseudo-op inside .def/.endef: ignored.");
+		demand_empty_rest_of_line();
+		return;
+	} /* wrong context */
+
+	c_line_new(obstack_next_free(&frags) - frag_now->fr_literal,
+		   get_absolute_expression(),
+		   frag_now);
+
+	demand_empty_rest_of_line();
+	return;
+} /* obj_coff_line() */
+
+/*
+ *			def()
+ *
+ * Handle .def directives.
+ *
+ * One might ask : why can't we symbol_new if the symbol does not
+ * already exist and fill it with debug information.  Because of
+ * the C_EFCN special symbol. It would clobber the value of the
+ * function symbol before we have a chance to notice that it is
+ * a C_EFCN. And a second reason is that the code is more clear this
+ * way. (at least I think it is :-).
+ *
+ */
+
+#define SKIP_SEMI_COLON()	while (*input_line_pointer++ != ';')
+#define SKIP_WHITESPACES()	while (*input_line_pointer == ' ' || \
+				      *input_line_pointer == '\t') \
+                                         input_line_pointer++;
+
+static void obj_coff_def(what)
+int what;
+{
+    char name_end; /* Char after the end of name */
+    char *symbol_name; /* Name of the debug symbol */
+    char *symbol_name_copy; /* Temporary copy of the name */
+    unsigned int symbol_name_length;
+    /*$char*	directiveP;$ */		/* Name of the pseudo opcode */
+    /*$char directive[MAX_DIRECTIVE];$ */ /* Backup of the directive */
+    /*$char end = 0;$ */ /* If 1, stop parsing */
+
+    if (def_symbol_in_progress != NULL) {
+	as_warn(".def pseudo-op used inside of .def/.endef: ignored.");
+	demand_empty_rest_of_line();
+	return;
+    } /* if not inside .def/.endef */
+
+    SKIP_WHITESPACES();
+
+    def_symbol_in_progress = (symbolS *) obstack_alloc(&notes, sizeof(*def_symbol_in_progress));
+    bzero(def_symbol_in_progress, sizeof(*def_symbol_in_progress));
+
+    symbol_name = input_line_pointer;
+    name_end = get_symbol_end();
+    symbol_name_length = strlen(symbol_name);
+    symbol_name_copy = xmalloc(symbol_name_length + 1);
+    strcpy(symbol_name_copy, symbol_name);
+
+    /* Initialize the new symbol */
+#if STRIP_UNDERSCORE
+    S_SET_NAME(def_symbol_in_progress, (*symbol_name_copy == '_'
+					? symbol_name_copy + 1
+					: symbol_name_copy));
+#else /* STRIP_UNDERSCORE */
+    S_SET_NAME(def_symbol_in_progress, symbol_name_copy);
+#endif /* STRIP_UNDERSCORE */
+    /* free(symbol_name_copy); */
+    def_symbol_in_progress->sy_name_offset = ~0;
+    def_symbol_in_progress->sy_number = ~0;
+    def_symbol_in_progress->sy_frag = &zero_address_frag;
+
+    if (S_IS_STRING(def_symbol_in_progress)) {
+	SF_SET_STRING(def_symbol_in_progress);
+    } /* "long" name */
+
+    *input_line_pointer = name_end;
+
+    demand_empty_rest_of_line();
+    return;
+} /* obj_coff_def() */
+
+unsigned int dim_index;
+static void obj_coff_endef() {
+	symbolS *symbolP;
+/* DIM BUG FIX sac@cygnus.com */
+	dim_index =0;
+	if (def_symbol_in_progress == NULL) {
+		as_warn(".endef pseudo-op used outside of .def/.endef: ignored.");
+		demand_empty_rest_of_line();
+		return;
+	} /* if not inside .def/.endef */
+
+	/* Set the section number according to storage class. */
+	switch (S_GET_STORAGE_CLASS(def_symbol_in_progress)) {
+	case C_STRTAG:
+	case C_ENTAG:
+	case C_UNTAG:
+		SF_SET_TAG(def_symbol_in_progress);
+		/* intentional fallthrough */
+	case C_FILE:
+	case C_TPDEF:
+		SF_SET_DEBUG(def_symbol_in_progress);
+		S_SET_SEGMENT(def_symbol_in_progress, SEG_DEBUG);
+		break;
+
+	case C_EFCN:
+		SF_SET_LOCAL(def_symbol_in_progress);   /* Do not emit this symbol. */
+		/* intentional fallthrough */
+	case C_BLOCK:
+		SF_SET_PROCESS(def_symbol_in_progress); /* Will need processing before writing */
+		/* intentional fallthrough */
+	case C_FCN:
+		S_SET_SEGMENT(def_symbol_in_progress, SEG_TEXT);
+
+		if (def_symbol_in_progress->sy_symbol.ost_entry.n_name[1] == 'b') { /* .bf */
+			if (function_lineoff < 0) {
+				fprintf(stderr, "`.bf' symbol without preceding function\n");
+			} /* missing function symbol */
+			SA_GET_SYM_LNNOPTR(def_symbol_in_progress) = function_lineoff;
+			SF_SET_PROCESS(def_symbol_in_progress);	/* Will need relocating */
+			function_lineoff = -1;
+		}
+		break;
+
+#ifdef C_AUTOARG
+	case C_AUTOARG:
+#endif /* C_AUTOARG */
+	case C_AUTO:
+	case C_REG:
+	case C_MOS:
+	case C_MOE:
+	case C_MOU:
+	case C_ARG:
+	case C_REGPARM:
+	case C_FIELD:
+	case C_EOS:
+		SF_SET_DEBUG(def_symbol_in_progress);
+		S_SET_SEGMENT(def_symbol_in_progress, SEG_ABSOLUTE);
+		break;
+
+	case C_EXT:
+	case C_STAT:
+	case C_LABEL:	
+	/* Valid but set somewhere else (s_comm, s_lcomm, colon) */
+		break;
+
+	case C_USTATIC:
+	case C_EXTDEF:
+	case C_ULABEL:
+		as_warn("unexpected storage class %d", S_GET_STORAGE_CLASS(def_symbol_in_progress));
+		break;
+	} /* switch on storage class */
+
+	/* Now that we have built a debug symbol, try to
+	   find if we should merge with an existing symbol
+	   or not.  If a symbol is C_EFCN or SEG_ABSOLUTE or
+	   untagged SEG_DEBUG it never merges. */
+
+	/* Two cases for functions.  Either debug followed
+	   by definition or definition followed by debug.
+	   For definition first, we will merge the debug
+	   symbol into the definition.  For debug first, the
+	   lineno entry MUST point to the definition
+	   function or else it will point off into space
+	   when obj_crawl_symbol_chain() merges the debug
+	   symbol into the real symbol.  Therefor, let's
+	   presume the debug symbol is a real function
+	   reference. */
+
+	/* FIXME-SOON If for some reason the definition
+	   label/symbol is never seen, this will probably
+	   leave an undefined symbol at link time. */
+
+	if (S_GET_STORAGE_CLASS(def_symbol_in_progress) == C_EFCN
+	    || (S_GET_SEGMENT(def_symbol_in_progress) == SEG_DEBUG
+		&& !SF_GET_TAG(def_symbol_in_progress))
+	    || S_GET_SEGMENT(def_symbol_in_progress) == SEG_ABSOLUTE
+	    || (symbolP = symbol_find_base(S_GET_NAME(def_symbol_in_progress), DO_NOT_STRIP)) == NULL) {
+
+		symbol_append(def_symbol_in_progress, symbol_lastP, &symbol_rootP, &symbol_lastP);
+
+	} else {
+		/* This symbol already exists, merge the
+		   newly created symbol into the old one.
+		   This is not mandatory. The linker can
+		   handle duplicate symbols correctly. But I
+		   guess that it save a *lot* of space if
+		   the assembly file defines a lot of
+		   symbols. [loic] */
+
+		/* The debug entry (def_symbol_in_progress)
+		   is merged into the previous definition. */
+
+		c_symbol_merge(def_symbol_in_progress, symbolP);
+		/* FIXME-SOON Should *def_symbol_in_progress be free'd? xoxorich. */
+		def_symbol_in_progress = symbolP;
+
+		if (SF_GET_FUNCTION(def_symbol_in_progress)
+		    || SF_GET_TAG(def_symbol_in_progress)) {
+			/* For functions, and tags, the symbol *must* be where the debug symbol
+			   appears.  Move the existing symbol to the current place. */
+			/* If it already is at the end of the symbol list, do nothing */
+			if (def_symbol_in_progress != symbol_lastP) {
+				symbol_remove(def_symbol_in_progress, &symbol_rootP, &symbol_lastP);
+				symbol_append(def_symbol_in_progress, symbol_lastP, &symbol_rootP, &symbol_lastP);
+			} /* if not already in place */
+		} /* if function */
+	} /* normal or mergable */
+
+	if (SF_GET_TAG(def_symbol_in_progress)
+	    && symbol_find_base(S_GET_NAME(def_symbol_in_progress), DO_NOT_STRIP) == NULL) {
+		tag_insert(S_GET_NAME(def_symbol_in_progress), def_symbol_in_progress);
+	} /* If symbol is a {structure,union} tag, associate symbol to its name. */
+
+	if (SF_GET_FUNCTION(def_symbol_in_progress)) {
+		know(sizeof(def_symbol_in_progress) <= sizeof(long));
+		function_lineoff = c_line_new((long) def_symbol_in_progress, 0, &zero_address_frag);
+		SF_SET_PROCESS(def_symbol_in_progress);
+
+		if (symbolP == NULL) {
+			/* That is, if this is the first
+			   time we've seen the function... */
+			symbol_table_insert(def_symbol_in_progress);
+		} /* definition follows debug */
+	} /* Create the line number entry pointing to the function being defined */
+
+	def_symbol_in_progress = NULL;
+	demand_empty_rest_of_line();
+	return;
+} /* obj_coff_endef() */
+#if 0
+This code expects all the dims to be after one another, and that is not true
+for gcc960
+sac@cygnus.com
+static void obj_coff_dim() {
+	register int dim_index;
+
+	if (def_symbol_in_progress == NULL) {
+		as_warn(".dim pseudo-op used outside of .def/.endef: ignored.");
+		demand_empty_rest_of_line();
+		return;
+	} /* if not inside .def/.endef */
+
+	S_SET_NUMBER_AUXILIARY(def_symbol_in_progress, 1);
+
+	for (dim_index = 0; dim_index < DIMNUM; dim_index++) {
+		SKIP_WHITESPACES();
+		SA_SET_SYM_DIMEN(def_symbol_in_progress, dim_index, get_absolute_expression());
+
+		switch (*input_line_pointer) {
+
+		case ',':
+			input_line_pointer++;
+			break;
+
+		default:
+			as_warn("badly formed .dim directive ignored");
+			/* intentional fallthrough */
+		case ';':
+			dim_index = DIMNUM;
+			break;
+		} /* switch on following character */
+	} /* for each dimension */
+
+	demand_empty_rest_of_line();
+	return;
+} /* obj_coff_dim() */
+#else
+
+static void 
+obj_coff_dim() 
+{
+    if (def_symbol_in_progress == NULL) {
+	as_warn(".dim pseudo-op used outside of .def/.endef: ignored.");
+	demand_empty_rest_of_line();
+	return;
+    } /* if not inside .def/.endef */
+
+
+    S_SET_NUMBER_AUXILIARY(def_symbol_in_progress, 1);
+
+    /*  Grab as many dims as we can fit, until ; or full */
+    while (dim_index < DIMNUM) 
+	{
+	    SKIP_WHITESPACES();
+	    SA_SET_SYM_DIMEN(def_symbol_in_progress, dim_index, get_absolute_expression());
+	    dim_index++;
+	    if (*input_line_pointer == ';') break;
+	    if (*input_line_pointer != ',') {
+		as_warn("badly formed .dim directive ignored");
+		break;
+	    }
+	    input_line_pointer++;
+	}
+    demand_empty_rest_of_line();
+    return;
+} /* obj_coff_dim() */
+#endif
+
+static void obj_coff_line() {
+	if (def_symbol_in_progress == NULL) {
+		obj_coff_ln();
+		return;
+	} /* if it looks like a stabs style line */
+
+	S_SET_NUMBER_AUXILIARY(def_symbol_in_progress, 1);
+	SA_SET_SYM_LNNO(def_symbol_in_progress, get_absolute_expression());
+
+	demand_empty_rest_of_line();
+	return;
+} /* obj_coff_line() */
+
+static void obj_coff_size() {
+	if (def_symbol_in_progress == NULL) {
+		as_warn(".size pseudo-op used outside of .def/.endef ignored.");
+		demand_empty_rest_of_line();
+		return;
+	} /* if not inside .def/.endef */
+
+	S_SET_NUMBER_AUXILIARY(def_symbol_in_progress, 1);
+	SA_SET_SYM_SIZE(def_symbol_in_progress, get_absolute_expression());
+	demand_empty_rest_of_line();
+	return;
+} /* obj_coff_size() */
+
+static void obj_coff_scl() {
+	if (def_symbol_in_progress == NULL) {
+		as_warn(".scl pseudo-op used outside of .def/.endef ignored.");
+		demand_empty_rest_of_line();
+		return;
+	} /* if not inside .def/.endef */
+
+	S_SET_STORAGE_CLASS(def_symbol_in_progress, get_absolute_expression());
+	demand_empty_rest_of_line();
+	return;
+} /* obj_coff_scl() */
+
+static void obj_coff_tag() {
+	char *symbol_name;
+	char name_end;
+
+	if (def_symbol_in_progress == NULL) {
+		as_warn(".tag pseudo-op used outside of .def/.endef ignored.");
+		demand_empty_rest_of_line();
+		return;
+	} /* if not inside .def/.endef */
+
+	S_SET_NUMBER_AUXILIARY(def_symbol_in_progress, 1);
+	symbol_name = input_line_pointer;
+	name_end = get_symbol_end();
+
+	/* Assume that the symbol referred to by .tag is always defined. */
+	/* This was a bad assumption.  I've added find_or_make. xoxorich. */
+	SA_SET_SYM_TAGNDX(def_symbol_in_progress, (long) tag_find_or_make(symbol_name));
+	if (SA_GET_SYM_TAGNDX(def_symbol_in_progress) == 0L) {
+		as_warn("tag not found for .tag %s", symbol_name);
+	} /* not defined */
+
+	SF_SET_TAGGED(def_symbol_in_progress);
+	*input_line_pointer = name_end;
+
+	demand_empty_rest_of_line();
+	return;
+} /* obj_coff_tag() */
+
+static void obj_coff_type() {
+	if (def_symbol_in_progress == NULL) {
+		as_warn(".type pseudo-op used outside of .def/.endef ignored.");
+		demand_empty_rest_of_line();
+		return;
+	} /* if not inside .def/.endef */
+
+	S_SET_DATA_TYPE(def_symbol_in_progress, get_absolute_expression());
+
+	if (ISFCN(S_GET_DATA_TYPE(def_symbol_in_progress)) &&
+	    S_GET_STORAGE_CLASS(def_symbol_in_progress) != C_TPDEF) {
+		SF_SET_FUNCTION(def_symbol_in_progress);
+	} /* is a function */
+
+	demand_empty_rest_of_line();
+	return;
+} /* obj_coff_type() */
+
+static void obj_coff_val() {
+	if (def_symbol_in_progress == NULL) {
+		as_warn(".val pseudo-op used outside of .def/.endef ignored.");
+		demand_empty_rest_of_line();
+		return;
+	} /* if not inside .def/.endef */
+
+	if (is_name_beginner(*input_line_pointer)) {
+		char *symbol_name = input_line_pointer;
+		char name_end = get_symbol_end();
+
+		if (!strcmp(symbol_name, ".")) {
+			def_symbol_in_progress->sy_frag = frag_now;
+			S_SET_VALUE(def_symbol_in_progress, obstack_next_free(&frags) - frag_now->fr_literal);
+			/* If the .val is != from the .def (e.g. statics) */
+		} else if (strcmp(S_GET_NAME(def_symbol_in_progress), symbol_name)) {
+			def_symbol_in_progress->sy_forward = symbol_find_or_make(symbol_name);
+
+			/* If the segment is undefined when the forward
+			   reference is solved, then copy the segment id
+			   from the forward symbol. */
+			SF_SET_GET_SEGMENT(def_symbol_in_progress);
+		}
+		/* Otherwise, it is the name of a non debug symbol and its value will be calculated later. */
+		*input_line_pointer = name_end;
+	} else {
+		S_SET_VALUE(def_symbol_in_progress, get_absolute_expression());
+	} /* if symbol based */
+
+	demand_empty_rest_of_line();
+	return;
+} /* obj_coff_val() */
+
+/*
+ * Maintain a list of the tagnames of the structres.
+ */
+
+static void tag_init() {
+    tag_hash = hash_new();
+    return ;
+} /* tag_init() */
+
+static void tag_insert(name, symbolP)
+char *name;
+symbolS *symbolP;
+{
+	register char *	error_string;
+
+	if (*(error_string = hash_jam(tag_hash, name, (char *)symbolP))) {
+		as_fatal("Inserting \"%s\" into structure table failed: %s",
+			 name, error_string);
+	}
+	return ;
+} /* tag_insert() */
+
+static symbolS *tag_find_or_make(name)
+char *name;
+{
+	symbolS *symbolP;
+
+	if ((symbolP = tag_find(name)) == NULL) {
+		symbolP = symbol_new(name,
+				     SEG_UNKNOWN,
+				     0,
+				     &zero_address_frag);
+
+		tag_insert(S_GET_NAME(symbolP), symbolP);
+		symbol_table_insert(symbolP);
+	} /* not found */
+
+	return(symbolP);
+} /* tag_find_or_make() */
+
+static symbolS *tag_find(name)
+char *name;
+{
+#if STRIP_UNDERSCORE
+	if (*name == '_') name++;
+#endif /* STRIP_UNDERSCORE */
+	return((symbolS*)hash_find(tag_hash, name));
+} /* tag_find() */
+
+void obj_read_begin_hook() {
+ /* These had better be the same.  Usually 18 bytes. */
+	know(sizeof(SYMENT) == sizeof(AUXENT));
+	know(SYMESZ == AUXESZ);
+
+	tag_init();
+
+	return;
+} /* obj_read_begin_hook() */
+
+void obj_crawl_symbol_chain(headers)
+object_headers *headers;
+{
+	int symbol_number = 0;
+	lineno *lineP;
+	symbolS *last_functionP = NULL;
+	symbolS *last_tagP;
+	symbolS *symbolP;
+	symbolS *symbol_externP = NULL;
+	symbolS *symbol_extern_lastP = NULL;
+
+	/* Initialize the stack used to keep track of the matching .bb .be */
+	stack* block_stack = stack_init(512, sizeof(symbolS*));
+
+	/* JF deal with forward references first... */
+	for (symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+		if (symbolP->sy_forward) {
+			S_SET_VALUE(symbolP, (S_GET_VALUE(symbolP)
+					      + S_GET_VALUE(symbolP->sy_forward)
+					      + symbolP->sy_forward->sy_frag->fr_address));
+
+			if (SF_GET_GET_SEGMENT(symbolP)) {
+				S_SET_SEGMENT(symbolP, S_GET_SEGMENT(symbolP->sy_forward));
+			} /* forward segment also */
+
+			symbolP->sy_forward=0;
+		} /* if it has a forward reference */
+	} /* walk the symbol chain */
+
+	tc_crawl_symbol_chain(headers);
+
+	/* The symbol list should be ordered according to the following sequence
+	 * order :
+	 * . .file symbol
+	 * . debug entries for functions
+	 * . fake symbols for .text .data and .bss
+	 * . defined symbols
+	 * . undefined symbols
+	 * But this is not mandatory. The only important point is to put the
+	 * undefined symbols at the end of the list.
+	 */
+
+	if (symbol_rootP == NULL
+	    || S_GET_STORAGE_CLASS(symbol_rootP) != C_FILE) {
+		know(!previous_file_symbol);
+		c_dot_file_symbol("fake");
+	} /* Is there a .file symbol ? If not insert one at the beginning. */
+
+	/*
+	 * Build up static symbols for .text, .data and .bss
+	 */
+	dot_text_symbol = (symbolS*)
+	    c_section_symbol(".text",
+			     0,
+			     H_GET_TEXT_SIZE(headers),
+			     0/*text_relocation_number */,
+			     0/*text_lineno_number */);
+
+	dot_data_symbol = (symbolS*)
+	    c_section_symbol(".data",
+			     H_GET_TEXT_SIZE(headers),
+			     H_GET_DATA_SIZE(headers),
+			     0/*data_relocation_number */,
+			     0); /* There are no data lineno entries */
+
+	dot_bss_symbol = (symbolS*)
+	    c_section_symbol(".bss",
+			     H_GET_TEXT_SIZE(headers) + H_GET_DATA_SIZE(headers),
+			     H_GET_BSS_SIZE(headers),
+			     0, /* No relocation for a bss section. */
+			     0); /* There are no bss lineno entries */
+
+#if defined(DEBUG)
+	verify_symbol_chain(symbol_rootP, symbol_lastP);
+#endif /* DEBUG */
+
+	/* Three traversals of symbol chains here.  The
+	   first traversal yanks externals into a temporary
+	   chain, removing the externals from the global
+	   chain, numbers symbols, and does some other guck.
+	   The second traversal is on the temporary chain of
+	   externals and just appends them to the global
+	   chain again, numbering them as we go.  The third
+	   traversal patches pointers to symbols (using sym
+	   indexes).  The last traversal was once done as
+	   part of the first pass, but that fails when a
+	   reference preceeds a definition as the definition
+	   has no number at the time we process the
+	   reference. */
+
+	/* Note that symbolP will be NULL at the end of a loop
+	   if an external was at the beginning of the list (it
+	   gets moved off the list).  Hence the weird check in
+	   the loop control.
+	   */
+	for (symbolP = symbol_rootP; symbolP; symbolP = symbolP ? symbol_next(symbolP) : symbol_rootP) {
+
+		if (!SF_GET_DEBUG(symbolP)) {
+			/* Debug symbols do not need all this rubbish */
+			symbolS* real_symbolP;
+
+			/* L* and C_EFCN symbols never merge. */
+			if (!SF_GET_LOCAL(symbolP)
+			    && (real_symbolP = symbol_find_base(S_GET_NAME(symbolP), DO_NOT_STRIP))
+			    && real_symbolP != symbolP) {
+				/* FIXME-SOON: where do dups come from?  Maybe tag references before definitions? xoxorich. */
+				/* Move the debug data from the debug symbol to the
+				   real symbol. Do NOT do the oposite (i.e. move from
+				   real symbol to debug symbol and remove real symbol from the
+				   list.) Because some pointers refer to the real symbol
+				   whereas no pointers refer to the debug symbol. */
+				c_symbol_merge(symbolP, real_symbolP);
+				/* Replace the current symbol by the real one */
+				/* The symbols will never be the last or the first
+				   because : 1st symbol is .file and 3 last symbols are
+				   .text, .data, .bss */
+				symbol_remove(real_symbolP, &symbol_rootP, &symbol_lastP);
+				symbol_insert(real_symbolP, symbolP, &symbol_rootP, &symbol_lastP);
+				symbol_remove(symbolP, &symbol_rootP, &symbol_lastP);
+				symbolP = real_symbolP;
+			} /* if not local but dup'd */
+
+			if (flagseen['R'] && (S_GET_SEGMENT(symbolP) == SEG_DATA)) {
+				S_SET_SEGMENT(symbolP, SEG_TEXT);
+			} /* push data into text */
+
+			S_SET_VALUE(symbolP, S_GET_VALUE(symbolP) + symbolP->sy_frag->fr_address);
+
+			if (!S_IS_DEFINED(symbolP) && !SF_GET_LOCAL(symbolP)) {
+				S_SET_EXTERNAL(symbolP);
+			} else if (S_GET_STORAGE_CLASS(symbolP) == C_NULL) {
+				if (S_GET_SEGMENT(symbolP) == SEG_TEXT){
+					S_SET_STORAGE_CLASS(symbolP, C_LABEL);
+				} else {
+					S_SET_STORAGE_CLASS(symbolP, C_STAT);
+				}
+			} /* no storage class yet */
+
+			/* Mainly to speed up if not -g */
+			if (SF_GET_PROCESS(symbolP)) {
+				/* Handle the nested blocks auxiliary info. */
+				if (S_GET_STORAGE_CLASS(symbolP) == C_BLOCK) {
+					if (!strcmp(S_GET_NAME(symbolP), ".bb"))
+					    stack_push(block_stack, (char *) &symbolP);
+					else { /* .eb */
+						register symbolS* begin_symbolP;
+						begin_symbolP = *(symbolS**)stack_pop(block_stack);
+						if (begin_symbolP == (symbolS*)0)
+						    as_warn("mismatched .eb");
+						else
+						    SA_SET_SYM_ENDNDX(begin_symbolP, symbol_number+2);
+					}
+				}
+				/* If we are able to identify the type of a function, and we
+				   are out of a function (last_functionP == 0) then, the
+				   function symbol will be associated with an auxiliary
+				   entry. */
+				if (last_functionP == (symbolS*)0 &&
+				    SF_GET_FUNCTION(symbolP)) {
+					last_functionP = symbolP;
+
+					if (S_GET_NUMBER_AUXILIARY(symbolP) < 1) {
+						S_SET_NUMBER_AUXILIARY(symbolP, 1);
+					} /* make it at least 1 */
+
+					/* Clobber possible stale .dim information. */
+					bzero(symbolP->sy_symbol.ost_auxent[0].x_sym.x_fcnary.x_ary.x_dimen,
+					      sizeof(symbolP->sy_symbol.ost_auxent[0].x_sym.x_fcnary.x_ary.x_dimen));
+				}
+				/* The C_FCN doesn't need any additional information.
+				   I don't even know if this is needed for sdb. But the
+				   standard assembler generates it, so...
+				   */
+				if (S_GET_STORAGE_CLASS(symbolP) == C_EFCN) {
+					if (last_functionP == (symbolS*)0)
+					    as_fatal("C_EFCN symbol out of scope");
+					SA_SET_SYM_FSIZE(last_functionP,
+							 (long)(S_GET_VALUE(symbolP) -
+								S_GET_VALUE(last_functionP)));
+					SA_SET_SYM_ENDNDX(last_functionP, symbol_number);
+					last_functionP = (symbolS*)0;
+				}
+			}
+		} else if (SF_GET_TAG(symbolP)) {
+			/* First descriptor of a structure must point to
+			   the first slot after the structure description. */
+			last_tagP = symbolP;
+
+		} else if (S_GET_STORAGE_CLASS(symbolP) == C_EOS) {
+			/* +2 take in account the current symbol */
+			SA_SET_SYM_ENDNDX(last_tagP, symbol_number + 2);
+		} else if (S_GET_STORAGE_CLASS(symbolP) == C_FILE) {
+			if (S_GET_VALUE(symbolP)) {
+				S_SET_VALUE((symbolS *) S_GET_VALUE(symbolP), symbol_number);
+				S_SET_VALUE(symbolP, 0);
+			} /* no one points at the first .file symbol */
+		} /* if debug or tag or eos or file */
+
+		/* We must put the external symbols apart. The loader
+		   does not bomb if we do not. But the references in
+		   the endndx field for a .bb symbol are not corrected
+		   if an external symbol is removed between .bb and .be.
+		   I.e in the following case :
+		   [20] .bb endndx = 22
+		   [21] foo external
+		   [22] .be
+		   ld will move the symbol 21 to the end of the list but
+		   endndx will still be 22 instead of 21. */
+
+		if (SF_GET_LOCAL(symbolP)) {
+			/* remove C_EFCN and LOCAL (L...) symbols */
+			/* next pointer remains valid */
+			symbol_remove(symbolP, &symbol_rootP, &symbol_lastP);
+
+		} else if (!S_IS_DEFINED(symbolP) && !S_IS_DEBUG(symbolP) && !SF_GET_STATICS(symbolP)) {
+/* S_GET_STORAGE_CLASS(symbolP) == C_EXT && !SF_GET_FUNCTION(symbolP)) { */
+			/* if external, Remove from the list */
+			symbolS *hold = symbol_previous(symbolP);
+
+			symbol_remove(symbolP, &symbol_rootP, &symbol_lastP);
+			symbol_clear_list_pointers(symbolP);
+			symbol_append(symbolP, symbol_extern_lastP, &symbol_externP, &symbol_extern_lastP);
+			symbolP = hold;
+		} else {
+			if (SF_GET_STRING(symbolP)) {
+				symbolP->sy_name_offset = string_byte_count;
+				string_byte_count += strlen(S_GET_NAME(symbolP)) + 1;
+			} else {
+				symbolP->sy_name_offset = 0;
+			} /* fix "long" names */
+
+			symbolP->sy_number = symbol_number;
+			symbol_number += 1 + S_GET_NUMBER_AUXILIARY(symbolP);
+		} /* if local symbol */
+	} /* traverse the symbol list */
+
+	for (symbolP = symbol_externP; symbol_externP;) {
+		symbolS *tmp = symbol_externP;
+
+		/* append */
+		symbol_remove(tmp, &symbol_externP, &symbol_extern_lastP);
+		symbol_append(tmp, symbol_lastP, &symbol_rootP, &symbol_lastP);
+
+		/* and process */
+		if (SF_GET_STRING(tmp)) {
+			tmp->sy_name_offset = string_byte_count;
+			string_byte_count += strlen(S_GET_NAME(tmp)) + 1;
+		} else {
+			tmp->sy_name_offset = 0;
+		} /* fix "long" names */
+
+		tmp->sy_number = symbol_number;
+		symbol_number += 1 + S_GET_NUMBER_AUXILIARY(tmp);
+	} /* append the entire extern chain */
+
+	/* When a tag reference preceeds the tag definition,
+	   the definition will not have a number at the time
+	   we process the reference during the first
+	   traversal.  Thus, a second traversal. */
+
+	for (symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+		if (SF_GET_TAGGED(symbolP)) {
+			SA_SET_SYM_TAGNDX(symbolP, ((symbolS*) SA_GET_SYM_TAGNDX(symbolP))->sy_number);
+		} /* If the symbol has a tagndx entry, resolve it */
+	} /* second traversal */
+
+	know(symbol_externP == NULL);
+	know(symbol_extern_lastP  == NULL);
+
+	/* FIXME-SOMEDAY I'm counting line no's here so we know what to put in the section
+	   headers, and I'm resolving the addresses since I'm not sure how to
+	   do it later. I am NOT resolving the linno's representing functions.
+	   Their symbols need a fileptr pointing to this linno when emitted.
+	   Thus, I resolve them on emit.  xoxorich. */
+
+	for (lineP = lineno_rootP; lineP; lineP = lineP->next) {
+		if (lineP->line.l_lnno > 0) {
+			lineP->line.l_addr.l_paddr += ((fragS*)lineP->frag)->fr_address;
+		} else {
+			;
+		}
+		text_lineno_number++;
+	} /* for each line number */
+
+	H_SET_SYMBOL_TABLE_SIZE(headers, symbol_number);
+
+	return;
+} /* obj_crawl_symbol_chain() */
+
+/*
+ * Find strings by crawling along symbol table chain.
+ */
+
+void obj_emit_strings(where)
+char **where;
+{
+	symbolS *symbolP;
+
+#ifdef CROSS_ASSEMBLE
+	/* Gotta do md_ byte-ordering stuff for string_byte_count first - KWK */
+	md_number_to_chars(*where, string_byte_count, sizeof(string_byte_count));
+	where += sizeof(string_byte_count);
+#else /* CROSS_ASSEMBLE */
+	append(where, (char *) &string_byte_count, (unsigned long) sizeof(string_byte_count));
+#endif /* CROSS_ASSEMBLE */
+
+	for (symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+		if (SF_GET_STRING(symbolP)) {
+			append(where, S_GET_NAME(symbolP), (unsigned long)(strlen(S_GET_NAME(symbolP)) + 1));
+		} /* if it has a string */
+	} /* walk the symbol chain */
+
+	return;
+} /* obj_emit_strings() */
+
+void obj_pre_write_hook(headers)
+object_headers *headers;
+{
+	register int text_relocation_number = 0;
+	register int data_relocation_number = 0;
+	register fixS *fixP;
+
+	/* FIXME-SOMEDAY this should be done at
+	   fixup_segment time but I'm going to wait until I
+	   do multiple segments.  xoxorich. */
+	/* Count the number of relocation entries for text and data */
+	for (fixP = text_fix_root; fixP; fixP = fixP->fx_next) {
+		if (fixP->fx_addsy) {
+			++text_relocation_number;
+#ifdef TC_I960
+			/* two relocs per callj under coff. */
+			if (fixP->fx_callj) {
+				++text_relocation_number;
+			} /* if callj and not already fixed. */
+#endif /* TC_I960 */
+
+		} /* if not yet fixed */
+	} /* for each fix */
+
+	SA_SET_SCN_NRELOC(dot_text_symbol, text_relocation_number);
+	/* Assign the number of line number entries for the text section */
+	SA_SET_SCN_NLINNO(dot_text_symbol, text_lineno_number);
+	/* Assign the size of the section */
+	SA_SET_SCN_SCNLEN(dot_text_symbol, H_GET_TEXT_SIZE(headers));
+
+	for (fixP = data_fix_root; fixP; fixP = fixP->fx_next) {
+		if (fixP->fx_addsy) {
+			++data_relocation_number;
+		} /* if still relocatable */
+	} /* for each fix */
+
+	SA_SET_SCN_NRELOC(dot_data_symbol, data_relocation_number);
+	/* Assign the size of the section */
+	SA_SET_SCN_SCNLEN(dot_data_symbol, H_GET_DATA_SIZE(headers));
+
+	/* Assign the size of the section */
+	SA_SET_SCN_SCNLEN(dot_bss_symbol, H_GET_BSS_SIZE(headers));
+
+	/* Fill in extra coff fields */
+
+	/* Initialize general line number information. */
+	H_SET_LINENO_SIZE(headers, text_lineno_number * LINESZ);
+
+	/* filehdr */
+	H_SET_FILE_MAGIC_NUMBER(headers, FILE_HEADER_MAGIC);
+	H_SET_NUMBER_OF_SECTIONS(headers, 3); /* text+data+bss */
+	H_SET_TIME_STAMP(headers, (long)time((long*)0));
+	H_SET_SYMBOL_TABLE_POINTER(headers, H_GET_SYMBOL_TABLE_FILE_OFFSET(headers));
+	/* symbol table size allready set */
+	H_SET_SIZEOF_OPTIONAL_HEADER(headers, OBJ_COFF_AOUTHDRSZ);
+#ifndef OBJ_COFF_IGNORE_EXEC_FLAG
+	H_SET_FLAGS(headers, (text_lineno_number == 0 ? F_LNNO : 0)
+		    | ((text_relocation_number + data_relocation_number) ? 0 : F_EXEC)
+		    | BYTE_ORDERING);
+#else /* OBJ_COFF_IGNORE_EXEC_FLAG */
+	H_SET_FLAGS(headers, (text_lineno_number == 0 ? F_LNNO : 0)
+		    | BYTE_ORDERING);
+#endif /* OBJ_COFF_IGNORE_EXEC_FLAG */
+
+	/* aouthdr */
+	/* magic number allready set */
+	H_SET_VERSION_STAMP(headers, 0);
+	/* Text, data, bss size; entry point; text_start and data_start are already set */
+
+	/* Build section headers */
+
+	c_section_header(&text_section_header,
+			 ".text",
+			 0,
+			 H_GET_TEXT_SIZE(headers),
+			 H_GET_TEXT_FILE_OFFSET(headers),
+			 (SA_GET_SCN_NRELOC(dot_text_symbol)
+			  ? H_GET_RELOCATION_FILE_OFFSET(headers)
+			  : 0),
+			 (text_lineno_number
+			  ? H_GET_LINENO_FILE_OFFSET(headers)
+			  : 0),
+			 SA_GET_SCN_NRELOC(dot_text_symbol),
+			 text_lineno_number,
+			 section_alignment[(int) SEG_TEXT]);
+
+	c_section_header(&data_section_header,
+			 ".data",
+			 H_GET_TEXT_SIZE(headers),
+			 H_GET_DATA_SIZE(headers),
+			 (H_GET_DATA_SIZE(headers)
+			  ? H_GET_DATA_FILE_OFFSET(headers)
+			  : 0),
+			 (SA_GET_SCN_NRELOC(dot_data_symbol)
+			  ? (H_GET_RELOCATION_FILE_OFFSET(headers)
+			     + text_section_header.s_nreloc * RELSZ)
+			  : 0),
+			 0, /* No line number information */
+			 SA_GET_SCN_NRELOC(dot_data_symbol),
+			 0,  /* No line number information */
+			 section_alignment[(int) SEG_DATA]);
+
+	c_section_header(&bss_section_header,
+			 ".bss",
+			 H_GET_TEXT_SIZE(headers) + H_GET_DATA_SIZE(headers),
+			 H_GET_BSS_SIZE(headers),
+			 0, /* No file offset */
+			 0, /* No relocation information */
+			 0, /* No line number information */
+			 0, /* No relocation information */
+			 0, /* No line number information */
+			 section_alignment[(int) SEG_BSS]);
+
+	return;
+} /* obj_pre_write_hook() */
+
+/* This is a copy from aout.  All I do is neglect to actually build the symbol. */
+
+static void obj_coff_stab(what)
+int what;
+{
+	char *string;
+	expressionS e;
+	int goof = 0;	/* TRUE if we have aborted. */
+	int length;
+	int saved_type = 0;
+	long longint;
+	symbolS *symbolP = 0;
+
+	if (what == 's') {
+		string = demand_copy_C_string(&length);
+		SKIP_WHITESPACE();
+
+		if (*input_line_pointer == ',') {
+			input_line_pointer++;
+		} else {
+			as_bad("I need a comma after symbol's name");
+			goof = 1;
+		} /* better be a comma */
+	} /* skip the string */
+
+	/*
+	 * Input_line_pointer->after ','.  String->symbol name.
+	 */
+	if (!goof) {
+		if (get_absolute_expression_and_terminator(&longint) != ',') {
+			as_bad("I want a comma after the n_type expression");
+			goof = 1;
+			input_line_pointer--; /* Backup over a non-',' char. */
+		} /* on error */
+	} /* no error */
+
+	if (!goof) {
+		if (get_absolute_expression_and_terminator(&longint) != ',') {
+			as_bad("I want a comma after the n_other expression");
+			goof = 1;
+			input_line_pointer--; /* Backup over a non-',' char. */
+		} /* on error */
+	} /* no error */
+
+	if (!goof) {
+		get_absolute_expression();
+
+		if (what == 's' || what == 'n') {
+			if (*input_line_pointer != ',') {
+				as_bad("I want a comma after the n_desc expression");
+				goof = 1;
+			} else {
+				input_line_pointer++;
+			} /* on goof */
+		} /* not stabd */
+	} /* no error */
+
+	expression(&e);
+
+	if (goof) {
+		ignore_rest_of_line();
+	} else {
+		demand_empty_rest_of_line();
+	} /* on error */
+} /* obj_coff_stab() */
+
+#ifdef DEBUG
+ /* for debugging */
+char *s_get_name(s)
+symbolS *s;
+{
+	return((s == NULL) ? "(NULL)" : S_GET_NAME(s));
+} /* s_get_name() */
+
+void symbol_dump() {
+	symbolS *symbolP;
+
+	for (symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+		printf("%3ld: 0x%lx \"%s\" type = %ld, class = %d, segment = %d\n",
+		       symbolP->sy_number,
+		       (unsigned long) symbolP,
+		       S_GET_NAME(symbolP),
+		       (long) S_GET_DATA_TYPE(symbolP),
+		       S_GET_STORAGE_CLASS(symbolP),
+		       (int) S_GET_SEGMENT(symbolP));
+	} /* traverse symbols */
+
+	return;
+} /* symbol_dump() */
+#endif /* DEBUG */
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of obj-coff.c */
diff --git a/gas/config/obj-coff.h b/gas/config/obj-coff.h
new file mode 100644
index 0000000..6ed5c84
--- /dev/null
+++ b/gas/config/obj-coff.h
@@ -0,0 +1,494 @@
+/* coff object file format
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#define OBJ_COFF 1
+
+#include "targ-cpu.h"
+
+#include "coff.gnu.h"
+
+#ifdef USE_NATIVE_HEADERS
+#include <filehdr.h>
+#include <aouthdr.h>
+#include <scnhdr.h>
+#include <storclass.h>
+#include <linenum.h>
+#include <syms.h>
+#include <reloc.h>
+#include <sys/types.h>
+#endif /* USE_NATIVE_HEADERS */
+
+/* Define some processor dependent values according to the processor we are
+   on. */
+#ifdef TC_M68K
+
+#define BYTE_ORDERING		F_AR32W    /* See filehdr.h for more info. */
+#ifndef FILE_HEADER_MAGIC
+#define FILE_HEADER_MAGIC	MC68MAGIC  /* ... */
+#endif /* FILE_HEADER_MAGIC */
+
+#elif defined(TC_I386)
+
+#define BYTE_ORDERING		F_AR32WR   /* See filehdr.h for more info. */
+#ifndef FILE_HEADER_MAGIC
+#define FILE_HEADER_MAGIC	I386MAGIC  /* ... */
+#endif /* FILE_HEADER_MAGIC */
+
+#elif defined(TC_I960)
+
+#define BYTE_ORDERING		F_AR32WR   /* See filehdr.h for more info. */
+#ifndef FILE_HEADER_MAGIC
+#define FILE_HEADER_MAGIC	I960ROMAGIC  /* ... */
+#endif /* FILE_HEADER_MAGIC */
+
+#elif defined(TC_A29K)
+
+#define BYTE_ORDERING		F_AR32W	/* big endian. */
+#ifndef FILE_HEADER_MAGIC
+#define FILE_HEADER_MAGIC	SIPFBOMAGIC
+#endif /* FILE_HEADER_MAGIC */
+
+#else
+you lose
+#endif 
+
+#ifndef OBJ_COFF_MAX_AUXENTRIES
+#define OBJ_COFF_MAX_AUXENTRIES 1
+#endif /* OBJ_COFF_MAX_AUXENTRIES */
+
+extern const short seg_N_TYPE[];
+extern const segT  N_TYPE_seg[];
+
+/* Magic number of paged executable. */
+#define DEFAULT_MAGIC_NUMBER_FOR_OBJECT_FILE	(OMAGIC)
+
+/* Add these definitions to have a consistent convention for all the
+   types used in COFF format. */
+#define AOUTHDR			struct aouthdr
+#define AOUTHDRSZ		sizeof(AOUTHDR)
+
+/* SYMBOL TABLE */
+
+ /* targets may also set this */
+#ifndef SYMBOLS_NEED_BACKPOINTERS
+#define SYMBOLS_NEED_BACKPOINTERS 1
+#endif /* SYMBOLS_NEED_BACKPOINTERS */
+
+/* Symbol table entry data type */
+
+typedef struct {
+	SYMENT ost_entry;       /* Basic symbol */
+	AUXENT ost_auxent[OBJ_COFF_MAX_AUXENTRIES];      /* Auxiliary entry. */
+	unsigned int ost_flags; /* obj_coff internal use only flags */
+} obj_symbol_type;
+
+/* If compiler generate leading underscores, remove them. */
+
+#ifndef STRIP_UNDERSCORE
+#define STRIP_UNDERSCORE 0
+#endif /* STRIP_UNDERSCORE */
+#define DO_NOT_STRIP	0
+#define DO_STRIP	1
+
+/* Symbol table macros and constants */
+
+/* Possible and usefull section number in symbol table 
+ * The values of TEXT, DATA and BSS may not be portable.
+ */
+
+#define C_TEXT_SECTION		((short)1)
+#define C_DATA_SECTION		((short)2)
+#define C_BSS_SECTION		((short)3)
+#define C_ABS_SECTION		N_ABS
+#define C_UNDEF_SECTION		N_UNDEF
+#define C_DEBUG_SECTION		N_DEBUG
+#define C_NTV_SECTION		N_TV
+#define C_PTV_SECTION		P_TV
+
+/*
+ *  Macros to extract information from a symbol table entry.
+ *  This syntaxic indirection allows independence regarding a.out or coff.
+ *  The argument (s) of all these macros is a pointer to a symbol table entry.
+ */
+
+/* Predicates */
+/* True if the symbol is external */
+#define S_IS_EXTERNAL(s)        ((s)->sy_symbol.ost_entry.n_scnum == C_UNDEF_SECTION)
+/* True if symbol has been defined, ie :
+  section > 0 (DATA, TEXT or BSS)
+  section == 0 and value > 0 (external bss symbol) */
+#define S_IS_DEFINED(s)         ((s)->sy_symbol.ost_entry.n_scnum > C_UNDEF_SECTION || \
+				 ((s)->sy_symbol.ost_entry.n_scnum == C_UNDEF_SECTION && \
+				  (s)->sy_symbol.ost_entry.n_value > 0))
+/* True if a debug special symbol entry */
+#define S_IS_DEBUG(s)		((s)->sy_symbol.ost_entry.n_scnum == C_DEBUG_SECTION)
+/* True if a symbol is local symbol name */
+/* A symbol name whose name begin with ^A is a gas internal pseudo symbol */
+#define S_IS_LOCAL(s)		(S_GET_NAME(s)[0] == '\001' || \
+				 (S_LOCAL_NAME(s) && !flagseen['L']))
+/* True if a symbol is not defined in this file */
+#define S_IS_EXTERN(s)		((s)->sy_symbol.ost_entry.n_scnum == 0 && (s)->sy_symbol.ost_entry.n_value == 0)
+/*
+ * True if a symbol can be multiply defined (bss symbols have this def
+ * though it is bad practice)
+ */
+#define S_IS_COMMON(s)		((s)->sy_symbol.ost_entry.n_scnum == 0 && (s)->sy_symbol.ost_entry.n_value != 0)
+/* True if a symbol name is in the string table, i.e. its length is > 8. */
+#define S_IS_STRING(s)		(strlen(S_GET_NAME(s)) > 8 ? 1 : 0)
+
+/* Accessors */
+/* The name of the symbol */
+#define S_GET_NAME(s)		((char*)(s)->sy_symbol.ost_entry.n_offset)
+/* The pointer to the string table */
+#define S_GET_OFFSET(s)         ((s)->sy_symbol.ost_entry.n_offset)
+/* The zeroes if symbol name is longer than 8 chars */
+#define S_GET_ZEROES(s)		((s)->sy_symbol.ost_entry.n_zeroes)
+/* The value of the symbol */
+#define S_GET_VALUE(s)		((s)->sy_symbol.ost_entry.n_value)
+/* The numeric value of the segment */
+#define S_GET_SEGMENT(s)        (N_TYPE_seg[(s)->sy_symbol.ost_entry.n_scnum+4])
+/* The data type */
+#define S_GET_DATA_TYPE(s)	((s)->sy_symbol.ost_entry.n_type)
+/* The storage class */
+#define S_GET_STORAGE_CLASS(s)	((s)->sy_symbol.ost_entry.n_sclass)
+/* The number of auxiliary entries */
+#define S_GET_NUMBER_AUXILIARY(s)	((s)->sy_symbol.ost_entry.n_numaux)
+
+/* Modifiers */
+/* Set the name of the symbol */
+#define S_SET_NAME(s,v)		((s)->sy_symbol.ost_entry.n_offset = (unsigned long)(v))
+/* Set the offset of the symbol */
+#define S_SET_OFFSET(s,v)	((s)->sy_symbol.ost_entry.n_offset = (v))
+/* The zeroes if symbol name is longer than 8 chars */
+#define S_SET_ZEROES(s,v)		((s)->sy_symbol.ost_entry.n_zeroes = (v))
+/* Set the value of the symbol */
+#define S_SET_VALUE(s,v)	((s)->sy_symbol.ost_entry.n_value = (v))
+/* The numeric value of the segment */
+#define S_SET_SEGMENT(s,v)	((s)->sy_symbol.ost_entry.n_scnum = SEGMENT_TO_SYMBOL_TYPE(v))
+/* The data type */
+#define S_SET_DATA_TYPE(s,v)	((s)->sy_symbol.ost_entry.n_type = (v))
+/* The storage class */
+#define S_SET_STORAGE_CLASS(s,v)	((s)->sy_symbol.ost_entry.n_sclass = (v))
+/* The number of auxiliary entries */
+#define S_SET_NUMBER_AUXILIARY(s,v)	((s)->sy_symbol.ost_entry.n_numaux = (v))
+
+/* Additional modifiers */
+/* The symbol is external (does not mean undefined) */
+#define S_SET_EXTERNAL(s)       { S_SET_STORAGE_CLASS(s, C_EXT) ; SF_CLEAR_LOCAL(s); }
+
+/* Auxiliary entry macros. SA_ stands for symbol auxiliary */
+/* Omit the tv related fields */
+/* Accessors */
+#define SA_GET_SYM_TAGNDX(s)	((s)->sy_symbol.ost_auxent[0].x_sym.x_tagndx)
+#define SA_GET_SYM_LNNO(s)	((s)->sy_symbol.ost_auxent[0].x_sym.x_misc.x_lnsz.x_lnno)
+#define SA_GET_SYM_SIZE(s)	((s)->sy_symbol.ost_auxent[0].x_sym.x_misc.x_lnsz.x_size)
+#define SA_GET_SYM_FSIZE(s)	((s)->sy_symbol.ost_auxent[0].x_sym.x_misc.x_fsize)
+#define SA_GET_SYM_LNNOPTR(s)	((s)->sy_symbol.ost_auxent[0].x_sym.x_fcnary.x_fcn.x_lnnoptr)
+#define SA_GET_SYM_ENDNDX(s)	((s)->sy_symbol.ost_auxent[0].x_sym.x_fcnary.x_fcn.x_endndx)
+#define SA_GET_SYM_DIMEN(s,i)	((s)->sy_symbol.ost_auxent[0].x_sym.x_fcnary.x_ary.x_dimen[(i)])
+#define SA_GET_FILE_FNAME(s)	((s)->sy_symbol.ost_auxent[0].x_file.x_fname)
+#define SA_GET_SCN_SCNLEN(s)	((s)->sy_symbol.ost_auxent[0].x_scn.x_scnlen)
+#define SA_GET_SCN_NRELOC(s)	((s)->sy_symbol.ost_auxent[0].x_scn.x_nreloc)
+#define SA_GET_SCN_NLINNO(s)	((s)->sy_symbol.ost_auxent[0].x_scn.x_nlinno)
+
+/* Modifiers */
+#define SA_SET_SYM_TAGNDX(s,v)	((s)->sy_symbol.ost_auxent[0].x_sym.x_tagndx=(v))
+#define SA_SET_SYM_LNNO(s,v)	((s)->sy_symbol.ost_auxent[0].x_sym.x_misc.x_lnsz.x_lnno=(v))
+#define SA_SET_SYM_SIZE(s,v)	((s)->sy_symbol.ost_auxent[0].x_sym.x_misc.x_lnsz.x_size=(v))
+#define SA_SET_SYM_FSIZE(s,v)	((s)->sy_symbol.ost_auxent[0].x_sym.x_misc.x_fsize=(v))
+#define SA_SET_SYM_LNNOPTR(s,v)	((s)->sy_symbol.ost_auxent[0].x_sym.x_fcnary.x_fcn.x_lnnoptr=(v))
+#define SA_SET_SYM_ENDNDX(s,v)	((s)->sy_symbol.ost_auxent[0].x_sym.x_fcnary.x_fcn.x_endndx=(v))
+#define SA_SET_SYM_DIMEN(s,i,v)	((s)->sy_symbol.ost_auxent[0].x_sym.x_fcnary.x_ary.x_dimen[(i)]=(v))
+#define SA_SET_FILE_FNAME(s,v)	strncpy((s)->sy_symbol.ost_auxent[0].x_file.x_fname,(v),FILNMLEN)
+#define SA_SET_SCN_SCNLEN(s,v)	((s)->sy_symbol.ost_auxent[0].x_scn.x_scnlen=(v))
+#define SA_SET_SCN_NRELOC(s,v)	((s)->sy_symbol.ost_auxent[0].x_scn.x_nreloc=(v))
+#define SA_SET_SCN_NLINNO(s,v)	((s)->sy_symbol.ost_auxent[0].x_scn.x_nlinno=(v))
+
+/*
+ * Internal use only definitions. SF_ stands for symbol flags.
+ *
+ * These values can be assigned to sy_symbol.ost_flags field of a symbolS.
+ *
+ * You'll break i960 if you shift the SYSPROC bits anywhere else.  for
+ * more on the balname/callname hack, see tc-i960.h.  b.out is done
+ * differently.
+ */
+
+#define SF_I960_MASK	(0x000001ff) /* Bits 0-8 are used by the i960 port. */
+#define SF_SYSPROC	(0x0000003f) 	     /* bits 0-5 are used to store the sysproc number */
+#define SF_IS_SYSPROC	(0x00000040)	     /* bit 6 marks symbols that are sysprocs */
+#define SF_BALNAME	(0x00000080)	     /* bit 7 marks BALNAME symbols */
+#define SF_CALLNAME	(0x00000100)	     /* bit 8 marks CALLNAME symbols */
+
+#define SF_NORMAL_MASK	(0x0000ffff) /* bits 12-15 are general purpose. */
+
+#define SF_STATICS	(0x00001000)	     /* Mark the .text & all symbols */
+#define SF_DEFINED	(0x00002000)	     /* Symbol is defined in this file */
+#define SF_STRING	(0x00004000)	     /* Symbol name length > 8 */
+#define SF_LOCAL	(0x00008000)	     /* Symbol must not be emitted */
+
+#define SF_DEBUG_MASK	(0xffff0000) /* bits 16-31 are debug info */
+
+#define SF_FUNCTION	(0x00010000)	     /* The symbol is a function */
+#define SF_PROCESS	(0x00020000)	     /* Process symbol before write */
+#define SF_TAGGED	(0x00040000)	     /* Is associated with a tag */
+#define SF_TAG		(0x00080000)	     /* Is a tag */
+#define SF_DEBUG	(0x00100000)	     /* Is in debug or abs section */
+#define SF_GET_SEGMENT	(0x00200000)	     /* Get the section of the forward symbol. */
+ /* All other bits are unused. */
+
+/* Accessors */
+#define SF_GET(s)		((s)->sy_symbol.ost_flags)
+#define SF_GET_NORMAL_FIELD(s)	((s)->sy_symbol.ost_flags & SF_NORMAL_MASK)
+#define SF_GET_DEBUG_FIELD(s)	((s)->sy_symbol.ost_flags & SF_DEBUG_MASK)
+#define SF_GET_FILE(s)		((s)->sy_symbol.ost_flags & SF_FILE)
+#define SF_GET_STATICS(s)	((s)->sy_symbol.ost_flags & SF_STATICS)
+#define SF_GET_DEFINED(s)	((s)->sy_symbol.ost_flags & SF_DEFINED)
+#define SF_GET_STRING(s)	((s)->sy_symbol.ost_flags & SF_STRING)
+#define SF_GET_LOCAL(s)		((s)->sy_symbol.ost_flags & SF_LOCAL)
+#define SF_GET_FUNCTION(s)      ((s)->sy_symbol.ost_flags & SF_FUNCTION)
+#define SF_GET_PROCESS(s)	((s)->sy_symbol.ost_flags & SF_PROCESS)
+#define SF_GET_DEBUG(s)		((s)->sy_symbol.ost_flags & SF_DEBUG)
+#define SF_GET_TAGGED(s)	((s)->sy_symbol.ost_flags & SF_TAGGED)
+#define SF_GET_TAG(s)		((s)->sy_symbol.ost_flags & SF_TAG)
+#define SF_GET_GET_SEGMENT(s)	((s)->sy_symbol.ost_flags & SF_GET_SEGMENT)
+#define SF_GET_I960(s)		((s)->sy_symbol.ost_flags & SF_I960_MASK) /* used by i960 */
+#define SF_GET_BALNAME(s)	((s)->sy_symbol.ost_flags & SF_BALNAME) /* used by i960 */
+#define SF_GET_CALLNAME(s)	((s)->sy_symbol.ost_flags & SF_CALLNAME) /* used by i960 */
+#define SF_GET_IS_SYSPROC(s)	((s)->sy_symbol.ost_flags & SF_IS_SYSPROC) /* used by i960 */
+#define SF_GET_SYSPROC(s)	((s)->sy_symbol.ost_flags & SF_SYSPROC) /* used by i960 */
+
+/* Modifiers */
+#define SF_SET(s,v)		((s)->sy_symbol.ost_flags = (v))
+#define SF_SET_NORMAL_FIELD(s,v)((s)->sy_symbol.ost_flags |= ((v) & SF_NORMAL_MASK))
+#define SF_SET_DEBUG_FIELD(s,v)	((s)->sy_symbol.ost_flags |= ((v) & SF_DEBUG_MASK))
+#define SF_SET_FILE(s)		((s)->sy_symbol.ost_flags |= SF_FILE)
+#define SF_SET_STATICS(s)	((s)->sy_symbol.ost_flags |= SF_STATICS)
+#define SF_SET_DEFINED(s)	((s)->sy_symbol.ost_flags |= SF_DEFINED)
+#define SF_SET_STRING(s)	((s)->sy_symbol.ost_flags |= SF_STRING)
+#define SF_SET_LOCAL(s)		((s)->sy_symbol.ost_flags |= SF_LOCAL)
+#define SF_CLEAR_LOCAL(s)	((s)->sy_symbol.ost_flags &= ~SF_LOCAL)
+#define SF_SET_FUNCTION(s)      ((s)->sy_symbol.ost_flags |= SF_FUNCTION)
+#define SF_SET_PROCESS(s)	((s)->sy_symbol.ost_flags |= SF_PROCESS)
+#define SF_SET_DEBUG(s)		((s)->sy_symbol.ost_flags |= SF_DEBUG)
+#define SF_SET_TAGGED(s)	((s)->sy_symbol.ost_flags |= SF_TAGGED)
+#define SF_SET_TAG(s)		((s)->sy_symbol.ost_flags |= SF_TAG)
+#define SF_SET_GET_SEGMENT(s)	((s)->sy_symbol.ost_flags |= SF_GET_SEGMENT)
+#define SF_SET_I960(s,v)	((s)->sy_symbol.ost_flags |= ((v) & SF_I960_MASK)) /* used by i960 */
+#define SF_SET_BALNAME(s)	((s)->sy_symbol.ost_flags |= SF_BALNAME) /* used by i960 */
+#define SF_SET_CALLNAME(s)	((s)->sy_symbol.ost_flags |= SF_CALLNAME) /* used by i960 */
+#define SF_SET_IS_SYSPROC(s)	((s)->sy_symbol.ost_flags |= SF_IS_SYSPROC) /* used by i960 */
+#define SF_SET_SYSPROC(s,v)	((s)->sy_symbol.ost_flags |= ((v) & SF_SYSPROC)) /* used by i960 */
+
+/* File header macro and type definition */
+
+/*
+ * File position calculators. Beware to use them when all the
+ * appropriate fields are set in the header.
+ */
+
+#ifdef OBJ_COFF_OMIT_OPTIONAL_HEADER
+#define OBJ_COFF_AOUTHDRSZ (0)
+#else
+#define OBJ_COFF_AOUTHDRSZ (AOUTHDRSZ)
+#endif /* OBJ_COFF_OMIT_OPTIONAL_HEADER */
+
+#define H_GET_FILE_SIZE(h) \
+    (long)(FILHSZ + OBJ_COFF_AOUTHDRSZ + \
+	   H_GET_NUMBER_OF_SECTIONS(h) * SCNHSZ + \
+	   H_GET_TEXT_SIZE(h) + H_GET_DATA_SIZE(h) + \
+	   H_GET_RELOCATION_SIZE(h) + H_GET_LINENO_SIZE(h) + \
+	   H_GET_SYMBOL_TABLE_SIZE(h) * SYMESZ + \
+	   (h)->string_table_size)
+#define H_GET_TEXT_FILE_OFFSET(h) \
+    (long)(FILHSZ + OBJ_COFF_AOUTHDRSZ + \
+	   H_GET_NUMBER_OF_SECTIONS(h) * SCNHSZ)
+#define H_GET_DATA_FILE_OFFSET(h) \
+    (long)(FILHSZ + OBJ_COFF_AOUTHDRSZ + \
+	   H_GET_NUMBER_OF_SECTIONS(h) * SCNHSZ + \
+	   H_GET_TEXT_SIZE(h))
+#define H_GET_BSS_FILE_OFFSET(h) 0
+#define H_GET_RELOCATION_FILE_OFFSET(h) \
+    (long)(FILHSZ + OBJ_COFF_AOUTHDRSZ + \
+	   H_GET_NUMBER_OF_SECTIONS(h) * SCNHSZ + \
+	   H_GET_TEXT_SIZE(h) + H_GET_DATA_SIZE(h))
+#define H_GET_LINENO_FILE_OFFSET(h) \
+    (long)(FILHSZ + OBJ_COFF_AOUTHDRSZ + \
+	   H_GET_NUMBER_OF_SECTIONS(h) * SCNHSZ + \
+	   H_GET_TEXT_SIZE(h) + H_GET_DATA_SIZE(h) + \
+	   H_GET_RELOCATION_SIZE(h))
+#define H_GET_SYMBOL_TABLE_FILE_OFFSET(h) \
+    (long)(FILHSZ + OBJ_COFF_AOUTHDRSZ + \
+	   H_GET_NUMBER_OF_SECTIONS(h) * SCNHSZ + \
+	   H_GET_TEXT_SIZE(h) + H_GET_DATA_SIZE(h) + \
+	   H_GET_RELOCATION_SIZE(h) + H_GET_LINENO_SIZE(h))
+
+/* Accessors */
+/* aouthdr */
+#define H_GET_MAGIC_NUMBER(h)           ((h)->aouthdr.magic)
+#define H_GET_VERSION_STAMP(h)		((h)->aouthdr.vstamp)
+#define H_GET_TEXT_SIZE(h)              ((h)->aouthdr.tsize)
+#define H_GET_DATA_SIZE(h)              ((h)->aouthdr.dsize)
+#define H_GET_BSS_SIZE(h)               ((h)->aouthdr.bsize)
+#define H_GET_ENTRY_POINT(h)            ((h)->aouthdr.entry)
+#define H_GET_TEXT_START(h)		((h)->aouthdr.text_start)
+#define H_GET_DATA_START(h)		((h)->aouthdr.data_start)
+/* filehdr */
+#define H_GET_FILE_MAGIC_NUMBER(h)	((h)->filehdr.f_magic)
+#define H_GET_NUMBER_OF_SECTIONS(h)	((h)->filehdr.f_nscns)
+#define H_GET_TIME_STAMP(h)		((h)->filehdr.f_timdat)
+#define H_GET_SYMBOL_TABLE_POINTER(h)	((h)->filehdr.f_symptr)
+#define H_GET_SYMBOL_TABLE_SIZE(h)	((h)->filehdr.f_nsyms)
+#define H_GET_SIZEOF_OPTIONAL_HEADER(h)	((h)->filehdr.f_opthdr)
+#define H_GET_FLAGS(h)			((h)->filehdr.f_flags)
+/* Extra fields to achieve bsd a.out compatibility and for convenience */
+#define H_GET_RELOCATION_SIZE(h)   	((h)->relocation_size)
+#define H_GET_STRING_SIZE(h)            ((h)->string_table_size)
+#define H_GET_LINENO_SIZE(h)            ((h)->lineno_size)
+
+/* Modifiers */
+/* aouthdr */
+#define H_SET_MAGIC_NUMBER(h,v)         ((h)->aouthdr.magic = (v))
+#define H_SET_VERSION_STAMP(h,v)	((h)->aouthdr.vstamp = (v))
+#define H_SET_TEXT_SIZE(h,v)            ((h)->aouthdr.tsize = (v))
+#define H_SET_DATA_SIZE(h,v)            ((h)->aouthdr.dsize = (v))
+#define H_SET_BSS_SIZE(h,v)             ((h)->aouthdr.bsize = (v))
+#define H_SET_ENTRY_POINT(h,v)          ((h)->aouthdr.entry = (v))
+#define H_SET_TEXT_START(h,v)		((h)->aouthdr.text_start = (v))
+#define H_SET_DATA_START(h,v)		((h)->aouthdr.data_start = (v))
+/* filehdr */
+#define H_SET_FILE_MAGIC_NUMBER(h,v)	((h)->filehdr.f_magic = (v))
+#define H_SET_NUMBER_OF_SECTIONS(h,v)	((h)->filehdr.f_nscns = (v))
+#define H_SET_TIME_STAMP(h,v)		((h)->filehdr.f_timdat = (v))
+#define H_SET_SYMBOL_TABLE_POINTER(h,v)	((h)->filehdr.f_symptr = (v))
+#define H_SET_SYMBOL_TABLE_SIZE(h,v)    ((h)->filehdr.f_nsyms = (v))
+#define H_SET_SIZEOF_OPTIONAL_HEADER(h,v) ((h)->filehdr.f_opthdr = (v))
+#define H_SET_FLAGS(h,v)		((h)->filehdr.f_flags = (v))
+/* Extra fields to achieve bsd a.out compatibility and for convinience */
+#define H_SET_RELOCATION_SIZE(h,t,d) 	((h)->relocation_size = (t)+(d))
+#define H_SET_STRING_SIZE(h,v)          ((h)->string_table_size = (v))
+#define H_SET_LINENO_SIZE(h,v)          ((h)->lineno_size = (v))
+
+ /* Segment flipping */
+#define segment_name(v)	(seg_name[(int) (v)])
+
+typedef struct {
+    AOUTHDR	   aouthdr;             /* a.out header */
+    FILHDR	   filehdr;		/* File header, not machine dep. */
+    long       string_table_size;   /* names + '\0' + sizeof(int) */
+    long	   relocation_size;	/* Cumulated size of relocation
+					   information for all sections in
+					   bytes. */
+    long	   lineno_size;		/* Size of the line number information
+					   table in bytes */
+} object_headers;
+
+/* --------------  Line number handling ------- */
+extern int		text_lineno_number;
+
+/* line numbering stuff. */
+
+typedef struct internal_lineno {
+    LINENO line;			/* The lineno structure itself */
+    char* frag;				/* Frag to which the line number is related */
+    struct internal_lineno* next;	/* Forward chain pointer */
+} lineno;
+
+extern lineno *lineno_lastP;
+extern lineno *lineno_rootP;
+#define OBJ_EMIT_LINENO(a, b, c)	obj_emit_lineno((a),(b),(c))
+
+#ifdef __STDC__
+void obj_emit_lineno(char **where, lineno *line, char *file_start);
+#else /* __STDC__ */
+void obj_emit_lineno();
+#endif /* __STDC__ */
+
+ /* stack stuff */
+typedef struct {
+    unsigned long chunk_size;
+    unsigned long element_size;
+    unsigned long size;
+    char*	  data;
+    unsigned long pointer;
+} stack;
+
+#ifdef __STDC__
+
+char *stack_pop(stack *st);
+char *stack_push(stack *st, char *element);
+char *stack_top(stack *st);
+stack *stack_init(unsigned long chunk_size, unsigned long element_size);
+void c_dot_file_symbol(char *filename);
+void obj_extra_stuff(object_headers *headers);
+void stack_delete(stack *st);
+
+#ifndef tc_headers_hook
+void tc_headers_hook(object_headers *headers);
+#endif /* tc_headers_hook */
+
+#ifndef tc_coff_symbol_emit_hook
+void tc_coff_symbol_emit_hook(); /* really tc_coff_symbol_emit_hook(symbolS *symbolP) */
+#endif /* tc_coff_symbol_emit_hook */
+
+void c_section_header(SCNHDR *header,
+		      char *name,
+		      long core_address,
+		      long size,
+		      long data_ptr,
+		      long reloc_ptr,
+		      long lineno_ptr,
+		      long reloc_number,
+		      long lineno_number,
+		      long alignment);
+
+#else /* __STDC__ */
+
+char *stack_pop();
+char *stack_push();
+char *stack_top();
+stack *stack_init();
+void c_dot_file_symbol();
+void c_section_header();
+void obj_extra_stuff();
+void stack_delete();
+void tc_headers_hook();
+void tc_coff_symbol_emit_hook();
+
+#endif /* __STDC__ */
+
+
+ /* sanity check */
+
+#ifdef TC_I960
+#ifndef C_LEAFSTAT
+hey!  Where is the C_LEAFSTAT definition?  i960-coff support is depending on it.
+#endif /* no C_LEAFSTAT */
+#endif /* TC_I960 */
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of obj-coff.h */
diff --git a/gas/config/tc-a29k.c b/gas/config/tc-a29k.c
new file mode 100644
index 0000000..8bb6d2a
--- /dev/null
+++ b/gas/config/tc-a29k.c
@@ -0,0 +1,1157 @@
+/* tc-a29k.c -- Assemble for the AMD 29000.
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+/* John Gilmore has reorganized this module somewhat, to make it easier
+   to convert it to new machines' assemblers as desired.  There was too
+   much bloody rewriting required before.  There still probably is.  */
+ 
+#include "as.h"
+
+#include "a29k-opcode.h"
+
+/* Make it easier to clone this machine desc into another one.  */
+#define	machine_opcode	a29k_opcode
+#define	machine_opcodes	a29k_opcodes
+#define	machine_ip	a29k_ip
+#define	machine_it	a29k_it
+
+const relax_typeS md_relax_table[] = { 0 };
+
+#define	IMMEDIATE_BIT	0x01000000	/* Turns RB into Immediate */
+#define	ABSOLUTE_BIT	0x01000000	/* Turns PC-relative to Absolute */
+#define	CE_BIT		0x00800000	/* Coprocessor enable in LOAD */
+#define	UI_BIT		0x00000080	/* Unsigned integer in CONVERT */
+
+/* handle of the OPCODE hash table */
+static struct hash_control *op_hash = NULL;
+
+struct machine_it {
+    char    *error;
+    unsigned long opcode;
+    struct nlist *nlistp;
+    expressionS exp;
+    int pcrel;
+    int  reloc_offset;		/* Offset of reloc within insn */
+    enum reloc_type reloc;
+} the_insn;
+
+#ifdef __STDC__
+
+/* static int getExpression(char *str); */
+static void machine_ip(char *str);
+/* static void print_insn(struct machine_it *insn); */
+static void s_data1(void);
+static void s_use(void);
+
+#else /* __STDC__ */
+
+/* static int getExpression(); */
+static void machine_ip();
+/* static void print_insn(); */
+static void s_data1();
+static void s_use();
+
+#endif /* __STDC__ */
+
+const pseudo_typeS
+md_pseudo_table[] = {
+  { "align",	s_align_bytes,	4 },
+  { "block", 	s_space,	0 },
+  { "cputype",	s_ignore,	0 },	/* CPU as 29000 or 29050 */
+  { "file",	s_ignore,	0 },	/* COFF File name for debug info? */
+  { "line",	s_ignore,	0 },	/* Line number of coff symbol */
+  { "reg",	s_lsym,		0 },	/* Register equate, same as equ */
+  { "space",	s_ignore,	0 },	/* Listing control */
+  { "sect",	s_ignore,	0 },	/* Creation of coff sections */
+  { "use",	s_use,		0 },
+  { "word",	cons,		4 },
+  { NULL,	0,		0 },
+};
+
+int md_short_jump_size = 4;
+int md_long_jump_size = 4;
+int md_reloc_size = 12;
+
+/* This array holds the chars that always start a comment.  If the
+    pre-processor is disabled, these aren't very useful */
+char comment_chars[] = ";";
+
+/* This array holds the chars that only start a comment at the beginning of
+   a line.  If the line seems to have the form '# 123 filename'
+   .line and .file directives will appear in the pre-processed output */
+/* Note that input_file.c hand checks for '#' at the beginning of the
+   first line of the input file.  This is because the compiler outputs
+   #NO_APP at the beginning of its output. */
+/* Also note that comments like this one will always work */
+char line_comment_chars[] = "#";
+
+/* We needed an unused char for line separation to work around the
+   lack of macros, using sed and such.  */
+char line_separator_chars[] = "@";
+
+/* Chars that can be used to separate mant from exp in floating point nums */
+char EXP_CHARS[] = "eE";
+
+/* Chars that mean this number is a floating point constant */
+/* As in 0f12.456 */
+/* or    0d1.2345e12 */
+char FLT_CHARS[] = "rRsSfFdDxXpP";
+
+/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
+   changed in read.c .  Ideally it shouldn't have to know about it at all,
+   but nothing is ideal around here.
+ */
+
+static unsigned char octal[256];
+#define isoctal(c)  octal[c]
+static unsigned char toHex[256];
+
+/*
+ *  anull bit - causes the branch delay slot instructions to not be executed 
+ */
+#define ANNUL       (1 << 29)
+
+static void
+s_use()
+{
+
+    if (strncmp(input_line_pointer, ".text", 5) == 0) {
+	input_line_pointer += 5;
+	s_text();
+	return;
+    }
+    if (strncmp(input_line_pointer, ".data", 5) == 0) {
+	input_line_pointer += 5;
+	s_data();
+	return;
+    }
+    if (strncmp(input_line_pointer, ".data1", 6) == 0) {
+	input_line_pointer += 6;
+	s_data1();
+	return;
+    }
+    /* Literals can't go in the text segment because you can't read
+       from instruction memory on some 29k's.  So, into initialized data. */
+    if (strncmp(input_line_pointer, ".lit", 4) == 0) {
+	input_line_pointer += 4;
+	subseg_new(SEG_DATA, 200);
+	demand_empty_rest_of_line();
+	return;
+    }
+
+    as_bad("Unknown segment type");
+    demand_empty_rest_of_line();
+    return;
+}
+
+static void
+s_data1()
+{
+    subseg_new(SEG_DATA, 1);
+    demand_empty_rest_of_line();
+    return;
+}
+
+/* Install symbol definition that maps REGNAME to REGNO.
+   FIXME-SOON:  These are not recognized in mixed case.  */
+
+static void
+insert_sreg (regname, regnum)
+     char *regname;
+     int regnum;
+{
+	/* FIXME-SOON, put something in these syms so they won't be output to the symbol
+	   table of the resulting object file.  */
+	
+	/* Must be large enough to hold the names of the special registers.  */
+	char buf[80];
+	int i;
+	
+	symbol_table_insert(symbol_new(regname, SEG_REGISTER, regnum, &zero_address_frag));
+	for (i = 0; regname[i]; i++)
+	    buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
+	buf[i] = '\0';
+	
+	symbol_table_insert(symbol_new(buf, SEG_REGISTER, regnum, &zero_address_frag));
+} /* insert_sreg() */
+
+/* Install symbol definitions for assorted special registers.
+   See ASM29K Ref page 2-9.  */
+
+void define_some_regs() {
+#define SREG	256
+	
+	/* Protected special-purpose register names */
+	insert_sreg ("vab", SREG+0);
+	insert_sreg ("ops", SREG+1);
+	insert_sreg ("cps", SREG+2);
+	insert_sreg ("cfg", SREG+3);
+	insert_sreg ("cha", SREG+4);
+	insert_sreg ("chd", SREG+5);
+	insert_sreg ("chc", SREG+6);
+	insert_sreg ("rbp", SREG+7);
+	insert_sreg ("tmc", SREG+8);
+	insert_sreg ("tmr", SREG+9);
+	insert_sreg ("pc0", SREG+10);
+	insert_sreg ("pc1", SREG+11);
+	insert_sreg ("pc2", SREG+12);
+	insert_sreg ("mmu", SREG+13);
+	insert_sreg ("lru", SREG+14);
+	
+	/* Unprotected special-purpose register names */
+	insert_sreg ("ipc", SREG+128);
+	insert_sreg ("ipa", SREG+129);
+	insert_sreg ("ipb", SREG+130);
+	insert_sreg ("q",   SREG+131);
+	insert_sreg ("alu", SREG+132);
+	insert_sreg ("bp",  SREG+133);
+	insert_sreg ("fc",  SREG+134);
+	insert_sreg ("cr",  SREG+135);
+	insert_sreg ("fpe", SREG+160);
+	insert_sreg ("inte",SREG+161);
+	insert_sreg ("fps", SREG+162);
+	/*  "",    SREG+163);	  Reserved */
+	insert_sreg ("exop",SREG+164);
+} /* define_some_regs() */
+
+/* This function is called once, at assembler startup time.  It should
+   set up all the tables, etc. that the MD part of the assembler will need.  */
+void
+md_begin()
+{
+  register char *retval = NULL;
+  int lose = 0;
+  register int skipnext = 0;
+  register unsigned int i;
+  register char *strend, *strend2;
+
+  /* Hash up all the opcodes for fast use later.  */
+
+  op_hash = hash_new();
+  if (op_hash == NULL)
+    as_fatal("Virtual memory exhausted");
+
+  for (i = 0; i < num_opcodes; i++)
+    {
+      const char *name = machine_opcodes[i].name;
+
+      if (skipnext) {
+	skipnext = 0;
+	continue;
+      }
+
+      /* Hack to avoid multiple opcode entries.  We pre-locate all the
+	 variations (b/i field and P/A field) and handle them. */
+
+      if (!strcmp (name, machine_opcodes[i+1].name)) {
+	if ((machine_opcodes[i].opcode ^ machine_opcodes[i+1].opcode)
+	     != 0x01000000)
+	  goto bad_table;
+	strend =  machine_opcodes[i  ].args+strlen(machine_opcodes[i  ].args)-1;
+	strend2 = machine_opcodes[i+1].args+strlen(machine_opcodes[i+1].args)-1;
+	switch (*strend) {
+	  case 'b':
+	    if (*strend2 != 'i')  goto bad_table;
+	    break;
+	  case 'i':
+	    if (*strend2 != 'b')  goto bad_table;
+	    break;
+	  case 'P':
+	    if (*strend2 != 'A')  goto bad_table;
+	    break;
+	  case 'A':
+	    if (*strend2 != 'P')  goto bad_table;
+	    break;
+          default:
+	  bad_table:
+	    fprintf (stderr, "internal error: can't handle opcode %s\n", name);
+	    lose = 1;
+	}
+
+	/* OK, this is an i/b or A/P pair.  We skip the higher-valued one,
+	   and let the code for operand checking handle OR-ing in the bit.  */
+	if (machine_opcodes[i].opcode & 1)
+	  continue;
+	else
+	  skipnext = 1;
+      }
+
+      retval = hash_insert (op_hash, name, &machine_opcodes[i]);
+      if (retval != NULL && *retval != '\0')
+	{
+	  fprintf (stderr, "internal error: can't hash `%s': %s\n",
+		   machine_opcodes[i].name, retval);
+	  lose = 1;
+	}
+    }
+
+  if (lose)
+    as_fatal("Broken assembler.  No assembly attempted.");
+
+  for (i = '0'; i < '8'; ++i)
+    octal[i] = 1;
+  for (i = '0'; i <= '9'; ++i)
+    toHex[i] = i - '0';
+  for (i = 'a'; i <= 'f'; ++i)
+    toHex[i] = i + 10 - 'a';
+  for (i = 'A'; i <= 'F'; ++i)
+    toHex[i] = i + 10 - 'A';
+
+  define_some_regs ();
+}
+
+void md_end() {
+    return;
+}
+
+/* Assemble a single instruction.  Its label has already been handled
+   by the generic front end.  We just parse opcode and operands, and
+   produce the bytes of data and relocation.  */
+
+void md_assemble(str)
+    char *str;
+{
+    char *toP;
+/* !!!!    int rsd; */
+
+    know(str);
+    machine_ip(str);
+    toP = frag_more(4);
+    /* put out the opcode */
+    md_number_to_chars(toP, the_insn.opcode, 4);
+
+    /* put out the symbol-dependent stuff */
+    if (the_insn.reloc != NO_RELOC) {
+	fix_new(
+	    frag_now,                           /* which frag */
+	    (toP - frag_now->fr_literal + the_insn.reloc_offset), /* where */
+	    4,                                  /* size */
+	    the_insn.exp.X_add_symbol,
+	    the_insn.exp.X_subtract_symbol,
+	    the_insn.exp.X_add_number,
+	    the_insn.pcrel,
+	    the_insn.reloc
+	);
+    }
+}
+
+char *
+parse_operand (s, operandp)
+     char *s;
+     expressionS *operandp;
+{
+    char *save = input_line_pointer;
+    char *new;
+    segT seg;
+
+    input_line_pointer = s;
+    seg = expr (0, operandp);
+    new = input_line_pointer;
+    input_line_pointer = save;
+
+    switch (seg) {
+    case SEG_ABSOLUTE:
+    case SEG_TEXT:
+    case SEG_DATA:
+    case SEG_BSS:
+    case SEG_UNKNOWN:
+    case SEG_DIFFERENCE:
+    case SEG_BIG:
+    case SEG_REGISTER:
+	return new;
+
+    case SEG_ABSENT:
+	as_bad("Missing operand");
+	return new;
+
+    default:
+	as_bad("Don't understand operand of type %s", segment_name (seg));
+	return new;
+    }
+}
+
+/* Instruction parsing.  Takes a string containing the opcode.  
+   Operands are at input_line_pointer.  Output is in the_insn.
+   Warnings or errors are generated.  */
+ 
+static void
+machine_ip(str)
+    char *str;
+{
+    char *s;
+    const char *args;
+/* !!!!    char c; */
+/* !!!!    unsigned long i; */
+    struct machine_opcode *insn;
+    char *argsStart;
+    unsigned long   opcode;
+/* !!!!    unsigned int mask; */
+    expressionS the_operand;
+    expressionS *operand = &the_operand;
+    unsigned int reg;
+
+    /* Must handle `div0' opcode.  */
+    s = str;
+    if (isalpha(*s))
+      for (; isalnum(*s); ++s)
+	if (isupper (*s))
+	  *s = tolower (*s);
+
+    switch (*s) {
+    case '\0':
+	break;
+
+    case ' ':		/* FIXME-SOMEDAY more whitespace */
+	*s++ = '\0';
+	break;
+
+    default:
+	as_bad("Unknown opcode: `%s'", str);
+	return;
+    }
+    if ((insn = (struct machine_opcode *) hash_find(op_hash, str)) == NULL) {
+	as_bad("Unknown opcode `%s'.", str);
+	return;
+    }
+    argsStart = s;
+    opcode = insn->opcode;
+    bzero(&the_insn, sizeof(the_insn));
+    the_insn.reloc = NO_RELOC;
+
+    /*
+     * Build the opcode, checking as we go to make
+     * sure that the operands match.
+     *
+     * If an operand matches, we modify the_insn or opcode appropriately,
+     * and do a "continue".  If an operand fails to match, we "break".
+     */
+    if (insn->args[0] != '\0')
+	s = parse_operand (s, operand);	/* Prime the pump */
+
+    for (args = insn->args; ; ++args) {
+	switch (*args) {
+
+	case '\0':  /* end of args */
+	    if (*s == '\0') {
+		/* We are truly done. */
+		the_insn.opcode = opcode;
+		return;
+	    }
+	    as_bad("Too many operands: %s", s);
+	    break;
+
+	case ',':	/* Must match a comma */
+	    if (*s++ == ',') {
+		s = parse_operand (s, operand);	/* Parse next opnd */
+		continue;
+	    }
+	    break;
+
+	case 'v':		/* Trap numbers (immediate field) */
+	    if (operand->X_seg == SEG_ABSOLUTE) {
+		if (operand->X_add_number < 256) {
+		    opcode |= (operand->X_add_number << 16);
+		    continue;
+		} else {
+		    as_bad("Immediate value of %d is too large", 
+			    operand->X_add_number);
+		    continue;
+		}
+	    }
+	    the_insn.reloc = RELOC_8;
+	    the_insn.reloc_offset = 1;	/* BIG-ENDIAN Byte 1 of insn */
+	    the_insn.exp = *operand;
+	    continue;
+	    
+	case 'b':	/* A general register or 8-bit immediate */
+	case 'i':
+	    /* We treat the two cases identically since we mashed
+	       them together in the opcode table.  */
+	    if (operand->X_seg == SEG_REGISTER)
+		goto general_reg;
+
+	    opcode |= IMMEDIATE_BIT;
+	    if (operand->X_seg == SEG_ABSOLUTE) {
+		if (operand->X_add_number < 256) {
+		    opcode |= operand->X_add_number;
+		    continue;
+		} else {
+		    as_bad("Immediate value of %d is too large", 
+			    operand->X_add_number);
+		    continue;
+		}
+	    }
+	    the_insn.reloc = RELOC_8;
+	    the_insn.reloc_offset = 3;	/* BIG-ENDIAN Byte 3 of insn */
+	    the_insn.exp = *operand;
+	    continue;
+	    
+	case 'a':   /* next operand must be a register */
+	case 'c':
+	general_reg:
+	    /* lrNNN or grNNN or %%expr or a user-def register name */
+	    if (operand->X_seg != SEG_REGISTER)
+		break;		/* Only registers */
+	    know (operand->X_add_symbol == 0);
+	    know (operand->X_subtract_symbol == 0);
+	    reg = operand->X_add_number;
+	    if (reg >= SREG)
+		break;		/* No special registers */
+
+	    /*
+	     * Got the register, now figure out where
+	     * it goes in the opcode.
+	     */
+	    switch (*args) {
+	    case 'a':
+		opcode |= reg << 8;
+		continue;
+
+	    case 'b':
+	    case 'i':
+		opcode |= reg;
+		continue;
+
+	    case 'c':
+		opcode |= reg << 16;
+		continue;
+	    }
+	    abort();
+	    break;
+
+	case 'x':		/* 16 bit constant, zero-extended */
+	case 'X':		/* 16 bit constant, one-extended */
+	    if (operand->X_seg == SEG_ABSOLUTE) {
+		opcode |=  (operand->X_add_number & 0xFF)   << 0 |
+			  ((operand->X_add_number & 0xFF00) << 8);
+		continue;
+	    }
+	    the_insn.reloc = RELOC_CONST;
+	    the_insn.exp = *operand;
+	    continue;
+
+	case 'h':
+	    if (operand->X_seg == SEG_ABSOLUTE) {
+		opcode |=  (operand->X_add_number & 0x00FF0000) >> 16 |
+			  (((unsigned long)operand->X_add_number
+			  /* avoid sign ext */	  & 0xFF000000) >> 8);
+		continue;
+	    }
+	    the_insn.reloc = RELOC_CONSTH;
+	    the_insn.exp = *operand;
+	    continue;
+
+	case 'P':		/* PC-relative jump address */
+	case 'A':		/* Absolute jump address */
+	    /* These two are treated together since we folded the
+	       opcode table entries together.  */
+	    if (operand->X_seg == SEG_ABSOLUTE) {
+		opcode |= ABSOLUTE_BIT |
+			  (operand->X_add_number & 0x0003FC00) << 6 |
+			 ((operand->X_add_number & 0x000003FC) >> 2);
+		continue;
+	    }
+	    the_insn.reloc = RELOC_JUMPTARG;
+	    the_insn.exp = *operand;
+	    the_insn.pcrel = 1;		/* Assume PC-relative jump */
+	    /* FIXME-SOON, Do we figure out whether abs later, after know sym val? */
+	    continue;
+
+	case 'e':		/* Coprocessor enable bit for LOAD/STORE insn */
+	    if (operand->X_seg == SEG_ABSOLUTE) {
+		if (operand->X_add_number == 0)
+		    continue;
+		if (operand->X_add_number == 1) {
+		    opcode |= CE_BIT;
+		    continue;
+		}
+	    }
+	    break;
+
+	case 'n':		/* Control bits for LOAD/STORE instructions */
+	    if (operand->X_seg == SEG_ABSOLUTE &&
+		operand->X_add_number < 128) {
+		opcode |= (operand->X_add_number << 16);
+		continue;
+	    }
+	    break;
+	    
+	case 's':		/* Special register number */
+	    if (operand->X_seg != SEG_REGISTER)
+		break;		/* Only registers */
+	    if (operand->X_add_number < SREG)
+		break;		/* Not a special register */
+	    opcode |= (operand->X_add_number & 0xFF) << 8;
+	    continue;
+
+	case 'u':		/* UI bit of CONVERT */
+	    if (operand->X_seg == SEG_ABSOLUTE) {
+		if (operand->X_add_number == 0)
+		    continue;
+		if (operand->X_add_number == 1) {
+		    opcode |= UI_BIT;
+		    continue;
+		}
+	    }
+	    break;
+
+	case 'r':		/* RND bits of CONVERT */
+	    if (operand->X_seg == SEG_ABSOLUTE &&
+		operand->X_add_number < 8) {
+		opcode |= operand->X_add_number << 4;
+		continue;
+	    }
+	    break;
+
+	case 'd':		/* FD bits of CONVERT */
+	    if (operand->X_seg == SEG_ABSOLUTE &&
+		operand->X_add_number < 4) {
+		opcode |= operand->X_add_number << 2;
+		continue;
+	    }
+	    break;
+
+
+	case 'f':		/* FS bits of CONVERT */
+	    if (operand->X_seg == SEG_ABSOLUTE &&
+		operand->X_add_number < 4) {
+		opcode |= operand->X_add_number << 0;
+		continue;
+	    }
+	    break;
+
+	  case 'C':
+	    if (operand->X_seg == SEG_ABSOLUTE &&
+		operand->X_add_number < 4) {
+		opcode |= operand->X_add_number << 16;
+		continue;
+	    }
+	    break;
+
+	  case 'F':
+	    if (operand->X_seg == SEG_ABSOLUTE &&
+		operand->X_add_number < 16) {
+		opcode |= operand->X_add_number << 18;
+		continue;
+	    }
+	    break;
+
+	default:
+	    BAD_CASE (*args);
+	}
+	/* Types or values of args don't match.  */
+	as_bad("Invalid operands");
+	return;
+    }
+}
+
+/*
+    This is identical to the md_atof in m68k.c.  I think this is right,
+    but I'm not sure.
+
+   Turn a string in input_line_pointer into a floating point constant of type
+   type, and store the appropriate bytes in *litP.  The number of LITTLENUMS
+   emitted is stored in *sizeP .  An error message is returned, or NULL on OK.
+ */
+
+/* Equal to MAX_PRECISION in atof-ieee.c */
+#define MAX_LITTLENUMS 6
+
+char *
+md_atof(type,litP,sizeP)
+    char type;
+    char *litP;
+    int *sizeP;
+{
+    int	prec;
+    LITTLENUM_TYPE words[MAX_LITTLENUMS];
+    LITTLENUM_TYPE *wordP;
+    char	*t;
+
+    switch(type) {
+
+    case 'f':
+    case 'F':
+    case 's':
+    case 'S':
+	prec = 2;
+	break;
+
+    case 'd':
+    case 'D':
+    case 'r':
+    case 'R':
+	prec = 4;
+	break;
+
+    case 'x':
+    case 'X':
+	prec = 6;
+	break;
+
+    case 'p':
+    case 'P':
+	prec = 6;
+	break;
+
+    default:
+	*sizeP=0;
+	return "Bad call to MD_ATOF()";
+    }
+    t=atof_ieee(input_line_pointer,type,words);
+    if(t)
+	input_line_pointer=t;
+    *sizeP=prec * sizeof(LITTLENUM_TYPE);
+    for(wordP=words;prec--;) {
+	md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
+	litP+=sizeof(LITTLENUM_TYPE);
+    }
+    return "";	/* Someone should teach Dean about null pointers */
+}
+
+/*
+ * Write out big-endian.
+ */
+void
+md_number_to_chars(buf,val,n)
+    char *buf;
+    long val;
+    int n;
+{
+
+    switch(n) {
+
+    case 4:
+	*buf++ = val >> 24;
+	*buf++ = val >> 16;
+    case 2:
+	*buf++ = val >> 8;
+    case 1:
+	*buf = val;
+	break;
+
+    default:
+	abort();
+    }
+    return;
+}
+
+void md_apply_fix(fixP, val)
+    fixS *fixP;
+    long val;
+{
+    char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
+
+    fixP->fx_addnumber = val;	/* Remember value for emit_reloc */
+
+    if (fixP->fx_r_type == NO_RELOC) {
+	abort();		/* FIXME-SOON, if this is never used, remove */
+	switch (fixP->fx_size) {
+	case 1:
+		*buf = val;
+		break;
+	case 2:
+		*buf++ = (val>>8);
+		*buf = val;
+		break;
+	case 4:
+		*buf++ = (val>>24);
+		*buf++ = (val>>16);
+		*buf++ = (val>>8);
+		*buf = val;
+		break;
+	default:
+		abort();
+	}
+	return;
+    }
+
+    know(fixP->fx_size == 4);
+    know(fixP->fx_r_type < NO_RELOC);
+
+    /*
+     * This is a hack.  There should be a better way to
+     * handle this.
+     */
+    if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) {
+	    val += fixP->fx_where + fixP->fx_frag->fr_address;
+    }
+
+    switch (fixP->fx_r_type) {
+
+    case RELOC_32:
+	buf[0] = val >> 24;
+	buf[1] = val >> 16;
+	buf[2] = val >> 8;
+	buf[3] = val;
+	break;
+
+    case RELOC_8:
+	buf[0] = val;
+	break;
+
+    case RELOC_WDISP30:
+	val = (val >>= 2) + 1;
+	buf[0] |= (val >> 24) & 0x3f;
+	buf[1]= (val >> 16);
+	buf[2] = val >> 8;
+	buf[3] = val;
+	break;
+
+    case RELOC_HI22:
+	buf[1] |= (val >> 26) & 0x3f;
+	buf[2] = val >> 18;
+	buf[3] = val >> 10;
+	break;
+
+    case RELOC_LO10:
+	buf[2] |= (val >> 8) & 0x03;
+	buf[3] = val;
+	break;
+
+    case RELOC_BASE13:
+	buf[2] |= (val >> 8) & 0x1f;
+	buf[3] = val;
+	break;
+
+    case RELOC_WDISP22:
+	val = (val >>= 2) + 1;
+	/* FALLTHROUGH */
+    case RELOC_BASE22:
+	buf[1] |= (val >> 16) & 0x3f;
+	buf[2] = val >> 8;
+	buf[3] = val;
+	break;
+
+#if 0
+    case RELOC_PC10: 
+    case RELOC_PC22: 
+    case RELOC_JMP_TBL:
+    case RELOC_SEGOFF16:
+    case RELOC_GLOB_DAT:
+    case RELOC_JMP_SLOT: 
+    case RELOC_RELATIVE:
+#endif
+    case RELOC_JUMPTARG:	/* 00XX00XX pattern in a word */
+	buf[1] = val >> 10;	/* Holds bits 0003FFFC of address */
+	buf[3] = val >> 2;
+	break;
+
+    case RELOC_CONST:		/* 00XX00XX pattern in a word */
+	buf[1] = val >> 8;	/* Holds bits 0000XXXX */
+	buf[3] = val;
+	break;
+
+    case RELOC_CONSTH:		/* 00XX00XX pattern in a word */
+	buf[1] = val >> 24;	/* Holds bits XXXX0000 */
+	buf[3] = val >> 16;
+	break;
+
+    case NO_RELOC:
+    default:
+	as_bad("bad relocation type: 0x%02x", fixP->fx_r_type);
+	break;
+    }
+    return;
+}
+
+#ifdef OBJ_COFF
+short tc_coff_fix2rtype(fixP)
+fixS *fixP;
+{
+
+	/* FIXME-NOW: relocation type handling is not yet written for
+	   a29k. */
+
+	know(0);
+	switch (fixP->fx_r_type) {
+	case RELOC_32:	return(R_WORD);
+	case RELOC_8:	return(R_BYTE);
+	default:	know(0);
+	} /* switch on type */
+
+	return(0);
+} /* tc_coff_fix2rtype() */
+#endif /* OBJ_COFF */
+
+/* should never be called for sparc */
+void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
+    char *ptr;
+    long from_addr, to_addr;
+fragS *frag;
+symbolS *to_symbol;
+{
+    fprintf(stderr, "a29k_create_short_jmp\n");
+    abort();
+}
+
+/* Translate internal representation of relocation info to target format.
+
+   On sparc/29k: first 4 bytes are normal unsigned long address, next three
+   bytes are index, most sig. byte first.  Byte 7 is broken up with
+   bit 7 as external, bits 6 & 5 unused, and the lower
+   five bits as relocation type.  Next 4 bytes are long addend. */
+/* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
+void
+md_ri_to_chars(the_bytes, ri)
+     char *the_bytes;
+     struct reloc_info_generic *ri;
+{
+  /* this is easy */
+  md_number_to_chars(the_bytes, ri->r_address, 4);
+  /* now the fun stuff */
+  the_bytes[4] = (ri->r_index >> 16) & 0x0ff;
+  the_bytes[5] = (ri->r_index >> 8) & 0x0ff;
+  the_bytes[6] = ri->r_index & 0x0ff;
+  the_bytes[7] = ((ri->r_extern << 7)  & 0x80) | (0 & 0x60) | (ri->r_type & 0x1F);
+  /* Also easy */
+  md_number_to_chars(&the_bytes[8], ri->r_addend, 4);
+}
+
+/* should never be called for 29k */
+void md_convert_frag(fragP)
+    register fragS *fragP;
+{
+    fprintf(stderr, "sparc_convert_frag\n");
+    abort();
+}
+
+/* should never be called for 29k */
+void md_create_long_jump(ptr, from_addr, to_addr, frag, to_symbol)
+    char	*ptr;
+    long	from_addr,
+	        to_addr;
+    fragS	*frag;
+    symbolS	*to_symbol;
+{
+    fprintf(stderr, "sparc_create_long_jump\n");
+    abort();
+}
+
+/* should never be called for sparc */
+int md_estimate_size_before_relax(fragP, segtype)
+    register fragS *fragP;
+segT segtype;
+{
+    fprintf(stderr, "sparc_estimate_size_before_relax\n");
+    abort();
+    return 0;
+}
+
+#if 0
+/* for debugging only */
+static void
+print_insn(insn)
+    struct machine_it *insn;
+{
+    char *Reloc[] = {
+    "RELOC_8",
+    "RELOC_16",
+    "RELOC_32",
+    "RELOC_DISP8",
+    "RELOC_DISP16",
+    "RELOC_DISP32",
+    "RELOC_WDISP30",
+    "RELOC_WDISP22",
+    "RELOC_HI22",
+    "RELOC_22",
+    "RELOC_13",
+    "RELOC_LO10",
+    "RELOC_SFA_BASE",
+    "RELOC_SFA_OFF13",
+    "RELOC_BASE10",
+    "RELOC_BASE13",
+    "RELOC_BASE22",
+    "RELOC_PC10",
+    "RELOC_PC22",
+    "RELOC_JMP_TBL",
+    "RELOC_SEGOFF16",
+    "RELOC_GLOB_DAT",
+    "RELOC_JMP_SLOT",
+    "RELOC_RELATIVE",
+    "NO_RELOC"
+    };
+
+    if (insn->error) {
+	fprintf(stderr, "ERROR: %s\n");
+    }
+    fprintf(stderr, "opcode=0x%08x\n", insn->opcode);
+    fprintf(stderr, "reloc = %s\n", Reloc[insn->reloc]);
+    fprintf(stderr, "exp =  {\n");
+    fprintf(stderr, "\t\tX_add_symbol = %s\n",
+	insn->exp.X_add_symbol ?
+	(S_GET_NAME(insn->exp.X_add_symbol) ? 
+	S_GET_NAME(insn->exp.X_add_symbol) : "???") : "0");
+    fprintf(stderr, "\t\tX_sub_symbol = %s\n",
+	insn->exp.X_subtract_symbol ?
+	    (S_GET_NAME(insn->exp.X_subtract_symbol) ? 
+	        S_GET_NAME(insn->exp.X_subtract_symbol) : "???") : "0");
+    fprintf(stderr, "\t\tX_add_number = %d\n",
+	insn->exp.X_add_number);
+    fprintf(stderr, "}\n");
+    return;
+}
+#endif
+
+/*
+ * Sparc/A29K relocations are completely different, so it needs
+ * this machine dependent routine to emit them.
+ */
+#ifdef OBJ_AOUT
+static void emit_machine_reloc(fixP, segment_address_in_file)
+register fixS *fixP;
+relax_addressT segment_address_in_file;
+{
+    struct reloc_info_generic ri;
+    register symbolS *symbolP;
+    extern char *next_object_file_charP;
+/* !!!!    long add_number; */
+
+    bzero((char *) &ri, sizeof(ri));
+    for (; fixP; fixP = fixP->fx_next) {
+
+	if (fixP->fx_r_type >= NO_RELOC) {
+	    fprintf(stderr, "fixP->fx_r_type = %d\n", fixP->fx_r_type);
+	    abort();
+	}
+
+	if ((symbolP = fixP->fx_addsy) != NULL) {
+	    ri.r_address = fixP->fx_frag->fr_address +
+	        fixP->fx_where - segment_address_in_file;
+	    ri.r_addend = fixP->fx_addnumber;
+	    if (!S_IS_DEFINED(symbolP)) {
+		ri.r_extern = 1;
+		ri.r_index = symbolP->sy_number;
+	    } else {
+		ri.r_extern = 0;
+		ri.r_index = S_GET_TYPE(symbolP);
+	    }
+	    ri.r_type = fixP->fx_r_type;
+
+	    md_ri_to_chars (next_object_file_charP, &ri);
+	    next_object_file_charP += md_reloc_size;
+	}
+    }
+} /* emit_machine_reloc() */
+
+void (*md_emit_relocations)() = emit_machine_reloc;
+
+#endif /* OBJ_AOUT */
+
+int
+md_parse_option(argP,cntP,vecP)
+    char **argP;
+    int *cntP;
+    char ***vecP;
+{
+    return 1;
+}
+
+
+/* Default the values of symbols known that should be "predefined".  We
+   don't bother to predefine them unless you actually use one, since there
+   are a lot of them.  */
+
+symbolS *md_undefined_symbol (name)
+     char *name;
+{
+  long regnum;
+  char testbuf[5+ /*SLOP*/ 5];
+
+  if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L')
+    {
+      /* Perhaps a global or local register name */
+      if (name[1] == 'r' || name[1] == 'R')
+	{
+	  /* Parse the number, make sure it has no extra zeroes or trailing
+	     chars */
+	  regnum = atol(&name[2]);
+	  if (regnum > 127)
+	    return 0;
+	  sprintf(testbuf, "%ld", regnum);
+	  if (strcmp (testbuf, &name[2]) != 0)
+	    return 0;	/* gr007 or lr7foo or whatever */
+
+	  /* We have a wiener!  Define and return a new symbol for it.  */
+	  if (name[0] == 'l' || name[0] == 'L')
+	    regnum += 128;
+	  return(symbol_new(name, SEG_REGISTER, regnum, &zero_address_frag));
+	}
+    }
+
+  return 0;
+}
+
+/* Parse an operand that is machine-specific.  */
+
+void md_operand(expressionP)
+     expressionS *expressionP;
+{
+
+  if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%')
+    {
+      /* We have a numeric register expression.  No biggy.  */
+      input_line_pointer += 2;	/* Skip %% */
+      (void)expression (expressionP);
+      if (expressionP->X_seg != SEG_ABSOLUTE
+	  || expressionP->X_add_number > 255)
+	as_bad("Invalid expression after %%%%\n");
+      expressionP->X_seg = SEG_REGISTER;
+    }
+  else if (input_line_pointer[0] == '&')
+    {
+      /* We are taking the 'address' of a register...this one is not
+         in the manual, but it *is* in traps/fpsymbol.h!  What they
+	 seem to want is the register number, as an absolute number.  */
+      input_line_pointer++;		/* Skip & */
+      (void)expression (expressionP);
+      if (expressionP->X_seg != SEG_REGISTER)
+	as_bad("Invalid register in & expression");
+      else
+        expressionP->X_seg = SEG_ABSOLUTE;
+    }
+}
+
+/* Round up a section size to the appropriate boundary.  */
+long
+md_section_align (segment, size)
+     segT segment;
+     long size;
+{
+  return size;		/* Byte alignment is fine */
+}
+
+/* Exactly what point is a PC-relative offset relative TO?
+   On the 29000, they're relative to the address of the instruction,
+   which we have set up as the address of the fixup too.  */
+long md_pcrel_from (fixP)
+     fixS *fixP;
+{
+  return fixP->fx_where + fixP->fx_frag->fr_address;
+}
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * End:
+ */
+
+/* end of tc-a29k.c */
diff --git a/gas/config/tc-a29k.h b/gas/config/tc-a29k.h
new file mode 100644
index 0000000..e689cfc
--- /dev/null
+++ b/gas/config/tc-a29k.h
@@ -0,0 +1,29 @@
+/* tc-a29k.h -- Assemble for the AMD 29000.
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#define TC_A29K
+
+#define tc_headers_hook(a)		; /* not used */
+#define tc_headers_hook(a)		; /* not used */
+#define tc_crawl_symbol_chain(a)	; /* not used */
+#define tc_coff_symbol_emit_hook(a)	; /* not used */
+
+/* end of tc-a29k.h */
diff --git a/gas/config/tc-generic.c b/gas/config/tc-generic.c
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/gas/config/tc-generic.c
diff --git a/gas/config/tc-generic.h b/gas/config/tc-generic.h
new file mode 100644
index 0000000..aa63410
--- /dev/null
+++ b/gas/config/tc-generic.h
@@ -0,0 +1,15 @@
+/*
+ * This file is tc-generic.h and is intended to be a template for
+ * target cpu specific header files. 
+ */
+
+#define TC_GENERIC 1
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of tc-generic.h */
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
new file mode 100644
index 0000000..cff66a4
--- /dev/null
+++ b/gas/config/tc-i386.c
@@ -0,0 +1,1983 @@
+/* i386.c -- Assemble code for the Intel 80386
+   Copyright (C) 1989, 1991 Free Software Foundation.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+/*
+  Intel 80386 machine specific gas.
+  Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
+  Bugs & suggestions are completely welcome.  This is free software.
+  Please help us make it better.
+*/
+
+#include "as.h"
+
+#include "obstack.h"
+#include "i386-opcode.h"
+
+/* 'md_assemble ()' gathers together information and puts it into a
+   i386_insn. */
+
+typedef struct {
+  /* TM holds the template for the insn were currently assembling. */
+  template          tm;
+  /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
+  char              suffix;
+  /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
+
+  /* OPERANDS gives the number of given operands. */
+  unsigned int               operands;
+
+  /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number of
+     given register, displacement, memory operands and immediate operands. */
+  unsigned int               reg_operands, disp_operands, mem_operands, imm_operands;
+
+  /* TYPES [i] is the type (see above #defines) which tells us how to
+     search through DISPS [i] & IMMS [i] & REGS [i] for the required
+     operand. */
+  unsigned int               types [MAX_OPERANDS];
+
+  /* Displacements (if given) for each operand. */
+  expressionS       * disps [MAX_OPERANDS];
+
+  /* Immediate operands (if given) for each operand. */
+  expressionS       * imms [MAX_OPERANDS];
+
+  /* Register operands (if given) for each operand. */
+  reg_entry         * regs [MAX_OPERANDS];
+
+  /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
+     the base index byte below.  */
+  reg_entry         * base_reg;
+  reg_entry         * index_reg;
+  unsigned int                log2_scale_factor;
+
+  /* SEG gives the seg_entry of this insn.  It is equal to zero unless
+     an explicit segment override is given. */
+  seg_entry         * seg;	/* segment for memory operands (if given) */
+
+  /* PREFIX holds all the given prefix opcodes (usually null).
+     PREFIXES is the size of PREFIX. */
+  char              prefix [MAX_PREFIXES];
+  unsigned int              prefixes;
+
+  /* RM and IB are the modrm byte and the base index byte where the addressing
+     modes of this insn are encoded. */
+
+  modrm_byte        rm;
+  base_index_byte   bi;
+} i386_insn;
+
+char FLT_CHARS[] = "fFdDxX";
+char EXP_CHARS[] = "eE";
+char line_comment_chars[] = "#";
+char comment_chars[] = "#/";
+
+/* tables for lexical analysis */
+static char opcode_chars[256];
+static char register_chars[256];
+static char operand_chars[256];
+static char space_chars[256];
+static char identifier_chars[256];
+static char digit_chars[256];
+
+/* lexical macros */
+#define is_opcode_char(x) (opcode_chars[(unsigned char) x])
+#define is_operand_char(x) (operand_chars[(unsigned char) x])
+#define is_register_char(x) (register_chars[(unsigned char) x])
+#define is_space_char(x) (space_chars[(unsigned char) x])
+#define is_identifier_char(x) (identifier_chars[(unsigned char) x])
+#define is_digit_char(x) (digit_chars[(unsigned char) x])
+
+/* put here all non-digit non-letter charcters that may occur in an operand */
+static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:";
+
+static char *ordinal_names[] = { "first", "second", "third" };	/* for printfs */
+
+/* md_assemble() always leaves the strings it's passed unaltered.  To
+   effect this we maintain a stack of saved characters that we've smashed
+   with '\0's (indicating end of strings for various sub-fields of the
+   assembler instruction). */
+static char save_stack[32];
+static char *save_stack_p;	/* stack pointer */
+#define END_STRING_AND_SAVE(s)      *save_stack_p++ = *s; *s = '\0'
+#define RESTORE_END_STRING(s)       *s = *--save_stack_p
+
+/* The instruction we're assembling. */
+static i386_insn i;
+
+/* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
+static expressionS disp_expressions[2], im_expressions[2];
+
+/* pointers to ebp & esp entries in reg_hash hash table */
+static reg_entry *ebp, *esp;
+
+static int this_operand;	/* current operand we are working on */
+
+/*
+Interface to relax_segment.
+There are 2 relax states for 386 jump insns: one for conditional & one
+for unconditional jumps.  This is because the these two types of jumps
+add different sizes to frags when we're figuring out what sort of jump
+to choose to reach a given label.  */
+
+/* types */
+#define COND_JUMP 1		/* conditional jump */
+#define UNCOND_JUMP 2		/* unconditional jump */
+/* sizes */
+#define BYTE 0
+#define WORD 1
+#define DWORD 2
+#define UNKNOWN_SIZE 3
+
+#define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size))
+#define SIZE_FROM_RELAX_STATE(s) \
+  ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
+
+const relax_typeS md_relax_table[] = {
+/*
+  The fields are:
+   1) most positive reach of this state,
+   2) most negative reach of this state,
+   3) how many bytes this mode will add to the size of the current frag
+   4) which index into the table to try if we can't fit into this one.
+*/
+  {1, 1, 0, 0},
+  {1, 1, 0, 0},
+  {1, 1, 0, 0},
+  {1, 1, 0, 0},
+
+  /* For now we don't use word displacement jumps:  they may be
+     untrustworthy. */
+  {127+1, -128+1, 0, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
+  /* word conditionals add 3 bytes to frag:
+         2 opcode prefix; 1 displacement bytes */
+  {32767+2, -32768+2, 3, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
+  /* dword conditionals adds 4 bytes to frag:
+         1 opcode prefix; 3 displacement bytes */
+  {0, 0, 4, 0},
+  {1, 1, 0, 0},
+
+  {127+1, -128+1, 0, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
+  /* word jmp adds 2 bytes to frag:
+         1 opcode prefix; 1 displacement bytes */
+  {32767+2, -32768+2, 2, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
+  /* dword jmp adds 3 bytes to frag:
+         0 opcode prefix; 3 displacement bytes */
+  {0, 0, 3, 0},
+  {1, 1, 0, 0},
+
+};
+
+#ifdef __STDC__
+
+static char *output_invalid(int c);
+static int i386_operand(char *operand_string);
+static reg_entry *parse_register(char *reg_string);
+
+#else /* __STDC__ */
+
+static char *output_invalid();
+static int i386_operand();
+static reg_entry *parse_register();
+
+#endif /* __STDC__ */
+
+
+/* Ignore certain directives generated by gcc. This probably should
+   not be here. */
+void dummy ()
+{
+  while (*input_line_pointer && *input_line_pointer != '\n')
+    input_line_pointer++;
+}
+
+const pseudo_typeS md_pseudo_table[] = {
+	{ "ffloat",	float_cons,	'f' },
+	{ "dfloat",	float_cons,	'd' },
+	{ "tfloat",	float_cons,	'x' },
+	{ "value",      cons,           2 },
+	{ "ident",      dummy,          0   }, /* ignore these directives */
+#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
+	{ "def",        dummy,          0   },
+#endif				/* OBJ_AOUT or OBJ_BOUT */
+	{ "def",        dummy,          0   },
+	{ "optim",	dummy,		0   }, /* For sun386i cc */
+	{ "version",    dummy,          0   },
+#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
+	{ "ln",    dummy,          0   },
+#endif				/* OBJ_AOUT or OBJ_BOUT */
+	{ "ln",    dummy,          0   },
+	{ 0, 0, 0 }
+};
+
+/* for interface with expression () */
+extern char * input_line_pointer;
+
+/* obstack for constructing various things in md_begin */
+struct obstack o;
+
+/* hash table for opcode lookup */
+static struct hash_control *op_hash = (struct hash_control *) 0;
+/* hash table for register lookup */
+static struct hash_control *reg_hash = (struct hash_control *) 0;
+/* hash table for prefix lookup */
+static struct hash_control *prefix_hash = (struct hash_control *) 0;
+
+
+void md_begin ()
+{
+  char * hash_err;
+
+  obstack_begin (&o,4096);
+
+  /* initialize op_hash hash table */
+  op_hash = hash_new();		/* xmalloc handles error */
+
+  {
+    register const template *optab;
+    register templates *core_optab;
+    char *prev_name;
+
+    optab = i386_optab;		/* setup for loop */
+    prev_name = optab->name;
+    obstack_grow (&o, optab, sizeof(template));
+    core_optab = (templates *) xmalloc (sizeof (templates));
+
+    for (optab++; optab < i386_optab_end; optab++) {
+      if (! strcmp (optab->name, prev_name)) {
+	/* same name as before --> append to current template list */
+	obstack_grow (&o, optab, sizeof(template));
+      } else {
+	/* different name --> ship out current template list;
+	   add to hash table; & begin anew */
+	/* Note: end must be set before start! since obstack_next_free changes
+	   upon opstack_finish */
+	core_optab->end = (template *) obstack_next_free(&o);
+	core_optab->start = (template *) obstack_finish(&o);
+	hash_err = hash_insert (op_hash, prev_name, (char *) core_optab);
+	if (hash_err && *hash_err) {
+	hash_error:
+	  as_fatal("Internal Error:  Can't hash %s: %s", prev_name, hash_err);
+	}
+	prev_name = optab->name;
+	core_optab = (templates *) xmalloc (sizeof(templates));
+	obstack_grow (&o, optab, sizeof(template));
+      }
+    }
+  }
+  
+  /* initialize reg_hash hash table */
+  reg_hash = hash_new();
+  {
+    register const reg_entry *regtab;
+
+    for (regtab = i386_regtab; regtab < i386_regtab_end; regtab++) {
+      hash_err = hash_insert (reg_hash, regtab->reg_name, regtab);
+      if (hash_err && *hash_err) goto hash_error;
+    }
+  }
+
+  esp = (reg_entry *) hash_find (reg_hash, "esp");
+  ebp = (reg_entry *) hash_find (reg_hash, "ebp");
+  
+  /* initialize reg_hash hash table */
+  prefix_hash = hash_new();
+  {
+    register const prefix_entry *prefixtab;
+
+    for (prefixtab = i386_prefixtab;
+	 prefixtab < i386_prefixtab_end; prefixtab++) {
+      hash_err = hash_insert (prefix_hash, prefixtab->prefix_name, prefixtab);
+      if (hash_err && *hash_err) goto hash_error;
+    }
+  }
+
+  /* fill in lexical tables:  opcode_chars, operand_chars, space_chars */
+  {  
+    register unsigned int c;
+    
+    bzero (opcode_chars, sizeof(opcode_chars));
+    bzero (operand_chars, sizeof(operand_chars));
+    bzero (space_chars, sizeof(space_chars));
+    bzero (identifier_chars, sizeof(identifier_chars));
+    bzero (digit_chars, sizeof(digit_chars));
+
+    for (c = 0; c < 256; c++) {
+      if (islower(c) || isdigit(c)) {
+	opcode_chars[c] = c;
+	register_chars[c] = c;
+      } else if (isupper(c)) {
+	opcode_chars[c] = tolower(c);
+	register_chars[c] = opcode_chars[c];
+      } else if (c == PREFIX_SEPERATOR) {
+	opcode_chars[c] = c;
+      } else if (c == ')' || c == '(') {
+	register_chars[c] = c;
+      }
+      
+      if (isupper(c) || islower(c) || isdigit(c))
+	operand_chars[c] = c;
+      else if (c && strchr(operand_special_chars, c))
+	  operand_chars[c] = c;
+      
+      if (isdigit(c) || c == '-') digit_chars[c] = c;
+
+      if (isalpha(c) || c == '_' || c == '.' || isdigit(c))
+	identifier_chars[c] = c;
+
+      if (c == ' ' || c == '\t') space_chars[c] = c;
+    }
+  }
+}
+
+void md_end() {}		/* not much to do here. */
+
+
+#ifdef DEBUG386
+
+/* debugging routines for md_assemble */
+/* static void pi (), pte (), pt (), pe (), ps (); */
+
+static void pi (line, x)
+     char * line;
+     i386_insn *x;
+{
+  register template *p;
+  int i;
+
+  fprintf (stdout, "%s: template ", line);
+  pte (&x->tm);
+  fprintf (stdout, "  modrm:  mode %x  reg %x  reg/mem %x",
+	   x->rm.mode, x->rm.reg, x->rm.regmem);
+  fprintf (stdout, " base %x  index %x  scale %x\n",
+	   x->bi.base, x->bi.index, x->bi.scale);
+  for (i = 0; i < x->operands; i++) {
+    fprintf (stdout, "    #%d:  ", i+1);
+    pt (x->types[i]);
+    fprintf (stdout, "\n");
+    if (x->types[i] & Reg) fprintf (stdout, "%s\n", x->regs[i]->reg_name);
+    if (x->types[i] & Imm) pe (x->imms[i]);
+    if (x->types[i] & (Disp|Abs)) pe (x->disps[i]);
+  }
+}
+
+static void pte (t)
+     template *t;
+{
+  int i;
+  fprintf (stdout, " %d operands ", t->operands);
+  fprintf (stdout, "opcode %x ",
+	   t->base_opcode);
+  if (t->extension_opcode != None)
+    fprintf (stdout, "ext %x ", t->extension_opcode);
+  if (t->opcode_modifier&D)
+    fprintf (stdout, "D");
+  if (t->opcode_modifier&W)
+    fprintf (stdout, "W");
+  fprintf (stdout, "\n");
+  for (i = 0; i < t->operands; i++) {
+    fprintf (stdout, "    #%d type ", i+1);
+    pt (t->operand_types[i]);
+    fprintf (stdout, "\n");
+  }
+}
+
+static void pe (e)
+     expressionS *e;
+{
+  fprintf (stdout, "    segment       %s\n", segment_name (e->X_seg));
+  fprintf (stdout, "    add_number    %d (%x)\n",
+	   e->X_add_number, e->X_add_number);
+  if (e->X_add_symbol) {
+    fprintf (stdout, "    add_symbol    ");
+    ps (e->X_add_symbol);
+    fprintf (stdout, "\n");
+  }
+  if (e->X_subtract_symbol) {
+    fprintf (stdout, "    sub_symbol    ");
+    ps (e->X_subtract_symbol);
+    fprintf (stdout, "\n");
+  }
+}
+
+static void ps (s)
+     symbolS *s;
+{
+  fprintf (stdout, "%s type %s%s",
+	   S_GET_NAME(s),
+	   S_IS_EXTERNAL(s) ? "EXTERNAL " : "",
+	   segment_name(S_GET_SEGMENT(s)));
+}
+
+struct type_name {
+  unsigned int mask;
+  char *tname;
+} type_names[] = {
+  { Reg8, "r8" }, { Reg16, "r16" }, { Reg32, "r32" }, { Imm8, "i8" },
+  { Imm8S, "i8s" },
+  { Imm16, "i16" }, { Imm32, "i32" }, { Mem8, "Mem8"}, { Mem16, "Mem16"},
+  { Mem32, "Mem32"}, { BaseIndex, "BaseIndex" },
+  { Abs8, "Abs8" }, { Abs16, "Abs16" }, { Abs32, "Abs32" },
+  { Disp8, "d8" }, { Disp16, "d16" },
+  { Disp32, "d32" }, { SReg2, "SReg2" }, { SReg3, "SReg3" }, { Acc, "Acc" },
+  { InOutPortReg, "InOutPortReg" }, { ShiftCount, "ShiftCount" },
+  { Imm1, "i1" }, { Control, "control reg" }, {Test, "test reg"},
+  { FloatReg, "FReg"}, {FloatAcc, "FAcc"},
+  { JumpAbsolute, "Jump Absolute"},
+  { 0, "" }
+};
+
+static void pt (t)
+     unsigned int t;
+{
+  register struct type_name *ty;
+
+  if (t == Unknown) {
+    fprintf (stdout, "Unknown");
+  } else {
+    for (ty = type_names; ty->mask; ty++)
+      if (t & ty->mask) fprintf (stdout, "%s, ", ty->tname);
+  }
+  fflush (stdout);
+}
+
+#endif /* DEBUG386 */
+
+/*
+  This is the guts of the machine-dependent assembler.  LINE points to a
+  machine dependent instruction.  This funciton is supposed to emit
+  the frags/bytes it assembles to.
+ */
+void md_assemble (line)
+     char *line;
+{
+  /* Holds temlate once we've found it. */
+  register template * t;
+
+  /* Possible templates for current insn */
+  templates *current_templates = (templates *) 0;
+
+  /* Initialize globals. */
+  bzero (&i, sizeof(i));
+  bzero (disp_expressions, sizeof(disp_expressions));
+  bzero (im_expressions, sizeof(im_expressions));
+  save_stack_p = save_stack;	/* reset stack pointer */
+  
+  /* Fist parse an opcode & call i386_operand for the operands.
+     We assume that the scrubber has arranged it so that line[0] is the valid 
+     start of a (possibly prefixed) opcode. */
+  {
+    register char *l = line;		/* Fast place to put LINE. */
+
+    /* 1 if operand is pending after ','. */
+    unsigned int expecting_operand = 0;
+    /* 1 if we found a prefix only acceptable with string insns. */
+    unsigned int expecting_string_instruction = 0;
+    /* Non-zero if operand parens not balenced. */
+    unsigned int paren_not_balenced;
+    char * token_start = l;
+
+    while (! is_space_char(*l) && *l != END_OF_INSN) {
+      if (! is_opcode_char(*l)) {
+	as_bad("invalid character %s in opcode", output_invalid(*l));
+	return;
+      } else if (*l != PREFIX_SEPERATOR) {
+	*l = opcode_chars[(unsigned char) *l];	/* fold case of opcodes */
+	l++;
+      } else {      /* this opcode's got a prefix */
+	register unsigned int q;
+	register prefix_entry * prefix;
+
+	if (l == token_start) {
+	  as_bad("expecting prefix; got nothing");
+	  return;
+	}
+	END_STRING_AND_SAVE (l);
+	prefix = (prefix_entry *) hash_find (prefix_hash, token_start);
+	if (! prefix) {
+	  as_bad("no such opcode prefix ('%s')", token_start);
+	  return;
+	}
+	RESTORE_END_STRING (l);
+	/* check for repeated prefix */
+	for (q = 0; q < i.prefixes; q++)
+	  if (i.prefix[q] == prefix->prefix_code) {
+	    as_bad("same prefix used twice; you don't really want this!");
+	    return;
+	  }
+	if (i.prefixes == MAX_PREFIXES) {
+	  as_bad("too many opcode prefixes");
+	  return;
+	}
+	i.prefix[i.prefixes++] = prefix->prefix_code;
+	if (prefix->prefix_code == REPE || prefix->prefix_code == REPNE)
+	  expecting_string_instruction = 1;
+	/* skip past PREFIX_SEPERATOR and reset token_start */
+	token_start = ++l;
+      }
+    }
+    END_STRING_AND_SAVE (l);
+    if (token_start == l) {
+      as_bad("expecting opcode; got nothing");
+      return;
+    }
+
+    /* Lookup insn in hash; try intel & att naming conventions if appropriate;
+       that is:  we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
+    current_templates = (templates *) hash_find (op_hash, token_start);
+    if (! current_templates) {
+      int last_index = strlen(token_start) - 1;
+      char last_char = token_start[last_index];
+      switch (last_char) {
+      case DWORD_OPCODE_SUFFIX:
+      case WORD_OPCODE_SUFFIX:
+      case BYTE_OPCODE_SUFFIX:
+	token_start[last_index] = '\0';
+	current_templates = (templates *) hash_find (op_hash, token_start);
+	token_start[last_index] = last_char;
+	i.suffix = last_char;
+      }
+      if (!current_templates) {
+	as_bad("no such 386 instruction: `%s'", token_start); return;
+      }
+    }
+    RESTORE_END_STRING (l);
+
+    /* check for rep/repne without a string instruction */
+    if (expecting_string_instruction &&
+	! IS_STRING_INSTRUCTION (current_templates->
+				 start->base_opcode)) {
+      as_bad("expecting string instruction after rep/repne");
+      return;
+    }
+
+    /* There may be operands to parse. */
+    if (*l != END_OF_INSN &&
+	/* For string instructions, we ignore any operands if given.  This
+	   kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
+	   the operands are always going to be the same, and are not really
+	   encoded in machine code. */
+	! IS_STRING_INSTRUCTION (current_templates->
+				 start->base_opcode)) {
+      /* parse operands */
+      do {
+	/* skip optional white space before operand */
+	while (! is_operand_char(*l) && *l != END_OF_INSN) {
+	  if (! is_space_char(*l)) {
+	    as_bad("invalid character %s before %s operand",
+		     output_invalid(*l),
+		     ordinal_names[i.operands]);
+	    return;
+	  }
+	  l++;
+	}
+	token_start = l;		/* after white space */
+	paren_not_balenced = 0;
+	while (paren_not_balenced || *l != ',') {
+	  if (*l == END_OF_INSN) {
+	    if (paren_not_balenced) {
+	      as_bad("unbalenced parenthesis in %s operand.",
+		       ordinal_names[i.operands]);
+	      return;
+	    } else break;		/* we are done */
+	  } else if (! is_operand_char(*l)) {
+	    as_bad("invalid character %s in %s operand",
+		     output_invalid(*l),
+		     ordinal_names[i.operands]);
+	    return;
+	  }
+	  if (*l == '(') ++paren_not_balenced;
+	  if (*l == ')') --paren_not_balenced;
+	  l++;
+	}
+	if (l != token_start) {	/* yes, we've read in another operand */
+	  unsigned int operand_ok;
+	  this_operand = i.operands++;
+	  if (i.operands > MAX_OPERANDS) {
+	    as_bad("spurious operands; (%d operands/instruction max)",
+		     MAX_OPERANDS);
+	    return;
+	  }
+	  /* now parse operand adding info to 'i' as we go along */
+	  END_STRING_AND_SAVE (l);
+	  operand_ok = i386_operand (token_start);
+	  RESTORE_END_STRING (l);	/* restore old contents */
+	  if (!operand_ok) return;
+	} else {
+	  if (expecting_operand) {
+	  expecting_operand_after_comma:
+	    as_bad("expecting operand after ','; got nothing");
+	    return;
+	  }
+	  if (*l == ',') {
+	    as_bad("expecting operand before ','; got nothing");
+	    return;
+	  }
+	}
+      
+	/* now *l must be either ',' or END_OF_INSN */
+	if (*l == ',') {
+	  if (*++l == END_OF_INSN) {		/* just skip it, if it's \n complain */
+	    goto expecting_operand_after_comma;
+	  }
+	  expecting_operand = 1;
+	}
+      } while (*l != END_OF_INSN);		/* until we get end of insn */
+    }
+  }
+
+  /* Now we've parsed the opcode into a set of templates, and have the
+     operands at hand.
+     Next, we find a template that matches the given insn,
+     making sure the overlap of the given operands types is consistent
+     with the template operand types. */
+
+#define MATCH(overlap,given_type) \
+  (overlap && \
+   (overlap & (JumpAbsolute|BaseIndex|Mem8)) \
+   == (given_type & (JumpAbsolute|BaseIndex|Mem8)))
+  
+    /* If m0 and m1 are register matches they must be consistent
+       with the expected operand types t0 and t1.
+     That is, if both m0 & m1 are register matches
+         i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
+     then, either 1. or 2. must be true:
+         1. the expected operand type register overlap is null:
+	             (t0 & t1 & Reg) == 0
+	 AND
+	    the given register overlap is null:
+                     (m0 & m1 & Reg) == 0
+	 2. the expected operand type register overlap == the given
+	    operand type overlap:  (t0 & t1 & m0 & m1 & Reg).
+     */
+#define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
+    ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
+      ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
+        ((t0 & t1) & (m0 & m1) & (Reg)) \
+       ) : 1)
+  {
+    register unsigned int overlap0, overlap1;
+    expressionS * exp;
+    unsigned int overlap2;
+    unsigned int found_reverse_match;
+
+    overlap0 = overlap1 = overlap2 = found_reverse_match = 0;
+    for (t = current_templates->start;
+	 t < current_templates->end;
+	 t++) {
+
+      /* must have right number of operands */
+      if (i.operands != t->operands) continue;
+      else if (!t->operands) break;	/* 0 operands always matches */
+
+      overlap0 = i.types[0] & t->operand_types[0];
+      switch (t->operands) {
+      case 1:
+	if (! MATCH (overlap0,i.types[0])) continue;
+	break;
+      case 2: case 3:
+	overlap1 = i.types[1] & t->operand_types[1];
+	if (! MATCH (overlap0,i.types[0]) ||
+	    ! MATCH (overlap1,i.types[1]) ||
+	    ! CONSISTENT_REGISTER_MATCH(overlap0, overlap1,
+					t->operand_types[0],
+					t->operand_types[1])) {
+
+	  /* check if other direction is valid ... */
+	  if (! (t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS))
+	    continue;
+	  
+	  /* try reversing direction of operands */
+	  overlap0 = i.types[0] & t->operand_types[1];
+	  overlap1 = i.types[1] & t->operand_types[0];
+	  if (! MATCH (overlap0,i.types[0]) ||
+	      ! MATCH (overlap1,i.types[1]) ||
+	      ! CONSISTENT_REGISTER_MATCH (overlap0, overlap1, 
+					   t->operand_types[0],
+					   t->operand_types[1])) {
+	    /* does not match either direction */
+	    continue;
+	  }
+	  /* found a reverse match here -- slip through */
+	  /* found_reverse_match holds which of D or FloatD we've found */
+	  found_reverse_match = t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS;
+	}				/* endif: not forward match */
+	/* found either forward/reverse 2 operand match here */
+	if (t->operands == 3) {
+	  overlap2 = i.types[2] & t->operand_types[2];
+	  if (! MATCH (overlap2,i.types[2]) ||
+	      ! CONSISTENT_REGISTER_MATCH (overlap0, overlap2,
+					   t->operand_types[0],
+					   t->operand_types[2]) ||
+	      ! CONSISTENT_REGISTER_MATCH (overlap1, overlap2, 
+					   t->operand_types[1],
+					   t->operand_types[2]))
+	    continue;
+	}
+	/* found either forward/reverse 2 or 3 operand match here:
+	   slip through to break */
+      }
+      break;			/* we've found a match; break out of loop */
+    }				/* for (t = ... */
+    if (t == current_templates->end) { /* we found no match */
+      as_bad("operands given don't match any known 386 instruction");
+      return;
+    }
+
+    /* Copy the template we found (we may change it!). */
+    bcopy (t, &i.tm, sizeof (template));
+    t = &i.tm;			/* alter new copy of template */
+
+    /* If there's no opcode suffix we try to invent one based on register
+       operands. */
+    if (! i.suffix && i.reg_operands) {
+      /* We take i.suffix from the LAST register operand specified.  This
+	 assumes that the last register operands is the destination register
+	 operand. */
+      int o;
+      for (o = 0; o < MAX_OPERANDS; o++)
+	if (i.types[o] & Reg) {
+	  i.suffix = (i.types[o] == Reg8) ? BYTE_OPCODE_SUFFIX :
+	    (i.types[o] == Reg16) ? WORD_OPCODE_SUFFIX :
+	      DWORD_OPCODE_SUFFIX;
+	}
+    }
+
+    /* Make still unresolved immediate matches conform to size of immediate
+       given in i.suffix. Note:  overlap2 cannot be an immediate!
+       We assume this. */
+    if ((overlap0 & (Imm8|Imm8S|Imm16|Imm32))
+	&& overlap0 != Imm8 && overlap0 != Imm8S
+	&& overlap0 != Imm16 && overlap0 != Imm32) {
+      if (! i.suffix) {
+	as_bad("no opcode suffix given; can't determine immediate size");
+	return;
+      }
+      overlap0 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
+		   (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
+    }
+    if ((overlap1 & (Imm8|Imm8S|Imm16|Imm32))
+	&& overlap1 != Imm8 && overlap1 != Imm8S
+	&& overlap1 != Imm16 && overlap1 != Imm32) {
+      if (! i.suffix) {
+	as_bad("no opcode suffix given; can't determine immediate size");
+	return;
+      }
+      overlap1 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
+		   (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
+    }
+
+    i.types[0] = overlap0;
+    i.types[1] = overlap1;
+    i.types[2] = overlap2;
+
+    if (overlap0 & ImplicitRegister) i.reg_operands--;
+    if (overlap1 & ImplicitRegister) i.reg_operands--;
+    if (overlap2 & ImplicitRegister) i.reg_operands--;
+    if (overlap0 & Imm1) i.imm_operands = 0; /* kludge for shift insns */
+
+    if (found_reverse_match) {
+      unsigned int save;
+      save = t->operand_types[0];
+      t->operand_types[0] = t->operand_types[1];
+      t->operand_types[1] = save;
+    }
+
+    /* Finalize opcode.  First, we change the opcode based on the operand
+       size given by i.suffix: we never have to change things for byte insns,
+       or when no opcode suffix is need to size the operands. */
+
+    if (! i.suffix && (t->opcode_modifier & W)) {
+      as_bad("no opcode suffix given and no register operands; can't size instruction");
+      return;
+    }
+
+    if (i.suffix && i.suffix != BYTE_OPCODE_SUFFIX) {
+      /* Select between byte and word/dword operations. */
+      if (t->opcode_modifier & W)
+	t->base_opcode |= W;
+      /* Now select between word & dword operations via the
+	 operand size prefix. */
+      if (i.suffix == WORD_OPCODE_SUFFIX) {
+	if (i.prefixes == MAX_PREFIXES) {
+	  as_bad("%d prefixes given and 'w' opcode suffix gives too many prefixes",
+		   MAX_PREFIXES);
+	  return;
+	}
+	i.prefix[i.prefixes++] = WORD_PREFIX_OPCODE;
+      }
+    }
+
+    /* For insns with operands there are more diddles to do to the opcode. */
+    if (i.operands) {
+      /* If we found a reverse match we must alter the opcode direction bit
+	 found_reverse_match holds bit to set (different for int &
+	 float insns). */
+
+      if (found_reverse_match) {
+	t->base_opcode |= found_reverse_match;
+      }
+
+      /*
+	The imul $imm, %reg instruction is converted into
+	imul $imm, %reg, %reg. */
+      if (t->opcode_modifier & imulKludge) {
+	  i.regs[2] = i.regs[1]; /* Pretend we saw the 3 operand case. */
+	  i.reg_operands = 2;
+      }
+
+      /* Certain instructions expect the destination to be in the i.rm.reg
+	 field.  This is by far the exceptional case.  For these instructions,
+	 if the source operand is a register, we must reverse the i.rm.reg
+	 and i.rm.regmem fields.  We accomplish this by faking that the
+	 two register operands were given in the reverse order. */
+      if ((t->opcode_modifier & ReverseRegRegmem) && i.reg_operands == 2) {
+	unsigned int first_reg_operand = (i.types[0] & Reg) ? 0 : 1;
+	unsigned int second_reg_operand = first_reg_operand + 1;
+	reg_entry *tmp = i.regs[first_reg_operand];
+	i.regs[first_reg_operand] = i.regs[second_reg_operand];
+	i.regs[second_reg_operand] = tmp;
+      }
+
+      if (t->opcode_modifier & ShortForm) {
+	/* The register or float register operand is in operand 0 or 1. */
+	unsigned int o = (i.types[0] & (Reg|FloatReg)) ? 0 : 1;
+	/* Register goes in low 3 bits of opcode. */
+	t->base_opcode |= i.regs[o]->reg_num;
+      } else if (t->opcode_modifier & ShortFormW) {
+	/* Short form with 0x8 width bit.  Register is always dest. operand */
+	t->base_opcode |= i.regs[1]->reg_num;
+	if (i.suffix == WORD_OPCODE_SUFFIX ||
+	    i.suffix == DWORD_OPCODE_SUFFIX)
+	  t->base_opcode |= 0x8;
+      } else if (t->opcode_modifier & Seg2ShortForm) {
+	if (t->base_opcode == POP_SEG_SHORT && i.regs[0]->reg_num == 1) {
+	  as_bad("you can't 'pop cs' on the 386.");
+	  return;
+	}
+	t->base_opcode |= (i.regs[0]->reg_num << 3);
+      } else if (t->opcode_modifier & Seg3ShortForm) {
+	/* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
+	   'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
+	   So, only if i.regs[0]->reg_num == 5 (%gs) do we need
+	   to change the opcode. */
+	if (i.regs[0]->reg_num == 5)
+	  t->base_opcode |= 0x08;
+      } else if (t->opcode_modifier & Modrm) {
+	/* The opcode is completed (modulo t->extension_opcode which must
+	   be put into the modrm byte.
+	   Now, we make the modrm & index base bytes based on all the info
+	   we've collected. */
+
+	/* i.reg_operands MUST be the number of real register operands;
+	   implicit registers do not count. */
+	if (i.reg_operands == 2) {
+	  unsigned int source, dest;
+	  source = (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 : 1;
+	  dest = source + 1;
+	  i.rm.mode = 3;
+	  /* We must be careful to make sure that all segment/control/test/
+	     debug registers go into the i.rm.reg field (despite the whether
+	     they are source or destination operands). */
+	  if (i.regs[dest]->reg_type & (SReg2|SReg3|Control|Debug|Test)) {
+	    i.rm.reg = i.regs[dest]->reg_num;
+	    i.rm.regmem = i.regs[source]->reg_num;
+	  } else {
+	    i.rm.reg = i.regs[source]->reg_num;
+	    i.rm.regmem = i.regs[dest]->reg_num;
+	  }
+	} else {		/* if it's not 2 reg operands... */
+	  if (i.mem_operands) {
+	    unsigned int fake_zero_displacement = 0;
+	    unsigned int o = (i.types[0] & Mem) ? 0 : ((i.types[1] & Mem) ? 1 : 2);
+	    
+	    /* Encode memory operand into modrm byte and base index byte. */
+
+	    if (i.base_reg == esp && ! i.index_reg) {
+	      /* <disp>(%esp) becomes two byte modrm with no index register. */
+	      i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
+	      i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
+	      i.bi.base = ESP_REG_NUM;
+	      i.bi.index = NO_INDEX_REGISTER;
+	      i.bi.scale = 0;		/* Must be zero! */
+	    } else if (i.base_reg == ebp && !i.index_reg) {
+	      if (! (i.types[o] & Disp)) {
+		/* Must fake a zero byte displacement.
+		   There is no direct way to code '(%ebp)' directly. */
+		fake_zero_displacement = 1;
+		/* fake_zero_displacement code does not set this. */
+		i.types[o] |= Disp8;
+	      }
+	      i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
+	      i.rm.regmem = EBP_REG_NUM;
+	    } else if (! i.base_reg && (i.types[o] & BaseIndex)) {
+	      /* There are three cases here.
+		 Case 1:  '<32bit disp>(,1)' -- indirect absolute.
+		 (Same as cases 2 & 3 with NO index register)
+		 Case 2:  <32bit disp> (,<index>) -- no base register with disp
+		 Case 3:  (, <index>)       --- no base register;
+		 no disp (must add 32bit 0 disp). */
+	      i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
+	      i.rm.mode = 0;		/* 32bit mode */
+	      i.bi.base = NO_BASE_REGISTER;
+	      i.types[o] &= ~Disp;
+	      i.types[o] |= Disp32;	/* Must be 32bit! */
+	      if (i.index_reg) {		/* case 2 or case 3 */
+		i.bi.index = i.index_reg->reg_num;
+		i.bi.scale = i.log2_scale_factor;
+		if (i.disp_operands == 0)
+		  fake_zero_displacement = 1; /* case 3 */
+	      } else {
+		i.bi.index = NO_INDEX_REGISTER;
+		i.bi.scale = 0;
+	      }
+	    } else if (i.disp_operands && !i.base_reg && !i.index_reg) {
+	      /* Operand is just <32bit disp> */
+	      i.rm.regmem = EBP_REG_NUM;
+	      i.rm.mode = 0;
+	      i.types[o] &= ~Disp;
+	      i.types[o] |= Disp32;
+	    } else {
+	      /* It's not a special case; rev'em up. */
+	      i.rm.regmem = i.base_reg->reg_num;
+	      i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
+	      if (i.index_reg) {
+		i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
+		i.bi.base = i.base_reg->reg_num;
+		i.bi.index = i.index_reg->reg_num;
+		i.bi.scale = i.log2_scale_factor;
+		if (i.base_reg == ebp && i.disp_operands == 0) { /* pace */
+		  fake_zero_displacement = 1;
+		  i.types[o] |= Disp8;
+		  i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
+		}
+	      }
+	    }
+	    if (fake_zero_displacement) {
+	      /* Fakes a zero displacement assuming that i.types[o] holds
+		 the correct displacement size. */
+	      exp = &disp_expressions[i.disp_operands++];
+	      i.disps[o] = exp;
+	      exp->X_seg = SEG_ABSOLUTE;
+	      exp->X_add_number = 0;
+	      exp->X_add_symbol = (symbolS *) 0;
+	      exp->X_subtract_symbol = (symbolS *) 0;
+	    }
+
+	    /* Select the correct segment for the memory operand. */
+	    if (i.seg) {
+	      const unsigned int seg_index;
+	      const seg_entry * default_seg;
+
+	      if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING) {
+		seg_index = (i.rm.mode<<3) | i.bi.base;
+		default_seg = two_byte_segment_defaults [seg_index];
+	      } else {
+		seg_index = (i.rm.mode<<3) | i.rm.regmem;
+		default_seg = one_byte_segment_defaults [seg_index];
+	      }
+	      /* If the specified segment is not the default, use an
+		 opcode prefix to select it */
+	      if (i.seg != default_seg) {
+		if (i.prefixes == MAX_PREFIXES) {
+		  as_bad("%d prefixes given and %s segment override gives too many prefixes",
+			   MAX_PREFIXES, i.seg->seg_name);
+		  return;
+		}
+		i.prefix[i.prefixes++] = i.seg->seg_prefix;
+	      }
+	    }
+	  }
+
+	  /* Fill in i.rm.reg or i.rm.regmem field with register operand
+	     (if any) based on t->extension_opcode. Again, we must be careful
+	     to make sure that segment/control/debug/test registers are coded
+	     into the i.rm.reg field. */
+	  if (i.reg_operands) {
+	    unsigned int o =
+	      (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 :
+		(i.types[1] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 1 : 2;
+	    /* If there is an extension opcode to put here, the register number
+	       must be put into the regmem field. */
+	    if (t->extension_opcode != None)
+	      i.rm.regmem = i.regs[o]->reg_num;
+	    else i.rm.reg = i.regs[o]->reg_num;
+
+	    /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
+	       we must set it to 3 to indicate this is a register operand
+	       int the regmem field */
+	    if (! i.mem_operands) i.rm.mode = 3;
+	  }
+
+	  /* Fill in i.rm.reg field with extension opcode (if any). */
+	  if (t->extension_opcode != None)
+	    i.rm.reg = t->extension_opcode;
+	}
+      }
+    }
+  }
+
+  /* Handle conversion of 'int $3' --> special int3 insn. */
+  if (t->base_opcode == INT_OPCODE && i.imms[0]->X_add_number == 3) {
+    t->base_opcode = INT3_OPCODE;
+    i.imm_operands = 0;
+  }
+
+  /* We are ready to output the insn. */
+  {
+    register char * p;
+    
+    /* Output jumps. */
+    if (t->opcode_modifier & Jump) {
+      int n = i.disps[0]->X_add_number;
+      
+      switch (i.disps[0]->X_seg) {
+      case SEG_ABSOLUTE:
+	if (FITS_IN_SIGNED_BYTE (n)) {
+	  p = frag_more (2);
+	  p[0] = t->base_opcode;
+	  p[1] = n;
+#if 0 /* leave out 16 bit jumps - pace */
+	} else if (FITS_IN_SIGNED_WORD (n)) {
+	  p = frag_more (4);
+	  p[0] = WORD_PREFIX_OPCODE;
+	  p[1] = t->base_opcode;
+	  md_number_to_chars (&p[2], n, 2);
+#endif
+	} else {		/* It's an absolute dword displacement. */
+	  if (t->base_opcode == JUMP_PC_RELATIVE) { /* pace */
+	    /* unconditional jump */
+	    p = frag_more (5);
+	    p[0] = 0xe9;
+	    md_number_to_chars (&p[1], n, 4);
+	  } else {
+	    /* conditional jump */
+	    p = frag_more (6);
+	    p[0] = TWO_BYTE_OPCODE_ESCAPE;
+	    p[1] = t->base_opcode + 0x10;
+	    md_number_to_chars (&p[2], n, 4);
+	  }
+	}
+	break;
+      default:
+	/* It's a symbol; end frag & setup for relax.
+	   Make sure there are 6 chars left in the current frag; if not
+	   we'll have to start a new one. */
+	/* I caught it failing with obstack_room == 6,
+	   so I changed to <=   pace */
+	if (obstack_room (&frags) <= 6) {
+		frag_wane(frag_now);
+		frag_new (0);
+	}
+	p = frag_more (1);
+	p[0] = t->base_opcode;
+	frag_var (rs_machine_dependent,
+		  6,		/* 2 opcode/prefix + 4 displacement */
+		  1,
+		  ((unsigned char) *p == JUMP_PC_RELATIVE
+		   ? ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE)
+		   : ENCODE_RELAX_STATE (COND_JUMP, BYTE)),
+		  i.disps[0]->X_add_symbol,
+		  n, p);
+	break;
+      }
+    } else if (t->opcode_modifier & (JumpByte|JumpDword)) {
+      int size = (t->opcode_modifier & JumpByte) ? 1 : 4;
+      int n = i.disps[0]->X_add_number;
+      
+      if (FITS_IN_UNSIGNED_BYTE(t->base_opcode)) {
+	FRAG_APPEND_1_CHAR (t->base_opcode);
+      } else {
+	p = frag_more (2);	/* opcode can be at most two bytes */
+	/* put out high byte first: can't use md_number_to_chars! */
+	*p++ = (t->base_opcode >> 8) & 0xff;
+	*p = t->base_opcode & 0xff;
+      }
+
+      p =  frag_more (size);
+      switch (i.disps[0]->X_seg) {
+      case SEG_ABSOLUTE:
+	md_number_to_chars (p, n, size);
+	if (size == 1 && ! FITS_IN_SIGNED_BYTE (n)) {
+	  as_bad("loop/jecx only takes byte displacement; %d shortened to %d",
+		   n, *p);
+	}
+	break;
+      default:
+	fix_new (frag_now, p - frag_now->fr_literal, size,
+		 i.disps[0]->X_add_symbol, i.disps[0]->X_subtract_symbol,
+		 i.disps[0]->X_add_number, 1, NO_RELOC);
+	break;
+      }
+    } else if (t->opcode_modifier & JumpInterSegment) {
+      p =  frag_more (1 + 2 + 4);	/* 1 opcode; 2 segment; 4 offset */
+      p[0] = t->base_opcode;
+      if (i.imms[1]->X_seg == SEG_ABSOLUTE)
+	md_number_to_chars (p + 1, i.imms[1]->X_add_number, 4);
+      else
+	fix_new (frag_now, p + 1 -  frag_now->fr_literal, 4,
+		 i.imms[1]->X_add_symbol,
+		 i.imms[1]->X_subtract_symbol,
+		 i.imms[1]->X_add_number, 0, NO_RELOC);
+      if (i.imms[0]->X_seg != SEG_ABSOLUTE)
+	as_bad("can't handle non absolute segment in long call/jmp");
+      md_number_to_chars (p + 5, i.imms[0]->X_add_number, 2);
+    } else {
+      /* Output normal instructions here. */
+      register char *q;
+      
+      /* First the prefix bytes. */
+      for (q = i.prefix; q < i.prefix + i.prefixes; q++) {
+	p =  frag_more (1);
+	md_number_to_chars (p, (unsigned int) *q, 1);
+      }
+      
+      /* Now the opcode; be careful about word order here! */
+      if (FITS_IN_UNSIGNED_BYTE(t->base_opcode)) {
+	FRAG_APPEND_1_CHAR (t->base_opcode);
+      } else if (FITS_IN_UNSIGNED_WORD(t->base_opcode)) {
+	p =  frag_more (2);
+	/* put out high byte first: can't use md_number_to_chars! */
+	*p++ = (t->base_opcode >> 8) & 0xff;
+	*p = t->base_opcode & 0xff;
+      } else {			/* opcode is either 3 or 4 bytes */
+	if (t->base_opcode & 0xff000000) {
+	  p = frag_more (4);
+	  *p++ = (t->base_opcode >> 24) & 0xff;
+	} else p = frag_more (3);
+	*p++ = (t->base_opcode >> 16) & 0xff;
+	*p++ = (t->base_opcode >>  8) & 0xff;
+	*p =   (t->base_opcode      ) & 0xff;
+      }
+
+      /* Now the modrm byte and base index byte (if present). */
+      if (t->opcode_modifier & Modrm) {
+	p =  frag_more (1);
+	/* md_number_to_chars (p, i.rm, 1); */
+	md_number_to_chars (p, (i.rm.regmem<<0 | i.rm.reg<<3 | i.rm.mode<<6), 1);
+	/* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
+	   ==> need second modrm byte. */
+	if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING && i.rm.mode != 3) {
+	  p =  frag_more (1);
+	  /* md_number_to_chars (p, i.bi, 1); */
+	  md_number_to_chars (p,(i.bi.base<<0 | i.bi.index<<3 | i.bi.scale<<6), 1);
+	}
+      }
+      
+      if (i.disp_operands) {
+	register unsigned int n;
+	
+	for (n = 0; n < i.operands; n++) {
+	  if (i.disps[n]) {
+	    if (i.disps[n]->X_seg == SEG_ABSOLUTE) {
+	      if (i.types[n] & (Disp8|Abs8)) {
+		p =  frag_more (1);
+		md_number_to_chars (p, i.disps[n]->X_add_number, 1);
+	      } else if (i.types[n] & (Disp16|Abs16)) {
+		p =  frag_more (2);
+		md_number_to_chars (p, i.disps[n]->X_add_number, 2);
+	      } else {		/* Disp32|Abs32 */
+		p =  frag_more (4);
+		md_number_to_chars (p, i.disps[n]->X_add_number, 4);
+	      }
+	    } else {			/* not SEG_ABSOLUTE */
+	      /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
+	      p =  frag_more (4);
+	      fix_new (frag_now, p -  frag_now->fr_literal, 4,
+		       i.disps[n]->X_add_symbol, i.disps[n]->X_subtract_symbol,
+		       i.disps[n]->X_add_number, 0, NO_RELOC);
+	    }
+	  }
+	}
+      }				/* end displacement output */
+      
+      /* output immediate */
+      if (i.imm_operands) {
+	register unsigned int n;
+	
+	for (n = 0; n < i.operands; n++) {
+	  if (i.imms[n]) {
+	    if (i.imms[n]->X_seg == SEG_ABSOLUTE) {
+	      if (i.types[n] & (Imm8|Imm8S)) {
+		p =  frag_more (1);
+		md_number_to_chars (p, i.imms[n]->X_add_number, 1);
+	      } else if (i.types[n] & Imm16) {
+		p =  frag_more (2);
+		md_number_to_chars (p, i.imms[n]->X_add_number, 2);
+	      } else {
+		p =  frag_more (4);
+		md_number_to_chars (p, i.imms[n]->X_add_number, 4);
+	      }
+	    } else {			/* not SEG_ABSOLUTE */
+	      /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
+	      /* try to support other sizes ... */
+	      int size;
+	      if (i.types[n] & (Imm8|Imm8S))
+		size = 1;
+	      else if (i.types[n] & Imm16)
+		size = 2;
+	      else
+		size = 4;
+	      p = frag_more (size);
+	      fix_new (frag_now, p - frag_now->fr_literal, size,
+		       i.imms[n]->X_add_symbol, i.imms[n]->X_subtract_symbol,
+		       i.imms[n]->X_add_number, 0, NO_RELOC);
+	    }
+	  }
+	}
+      }				/* end immediate output */
+    }
+
+#ifdef DEBUG386
+    if (flagseen ['D']) {
+      pi (line, &i);
+    }
+#endif /* DEBUG386 */
+
+  }
+  return;
+}
+
+/* Parse OPERAND_STRING into the i386_insn structure I.  Returns non-zero
+   on error. */
+
+static int i386_operand (operand_string)
+     char *operand_string;
+{
+  register char *op_string = operand_string;
+
+  /* Address of '\0' at end of operand_string. */
+  char * end_of_operand_string = operand_string + strlen(operand_string);
+
+  /* Start and end of displacement string expression (if found). */
+  char * displacement_string_start = 0;
+  char * displacement_string_end;
+
+  /* We check for an absolute prefix (differentiating,
+     for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
+  if (*op_string == ABSOLUTE_PREFIX) {
+    op_string++;
+    i.types[this_operand] |= JumpAbsolute;
+  }
+
+  /* Check if operand is a register. */
+  if (*op_string == REGISTER_PREFIX) {
+    register reg_entry * r;
+    if (! (r = parse_register (op_string))) {
+      as_bad("bad register name ('%s')", op_string);
+      return 0;
+    }
+    /* Check for segment override, rather than segment register by
+       searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
+    if ((r->reg_type & (SReg2|SReg3)) && op_string[3] == ':') {
+      switch (r->reg_num) {
+      case 0:
+	i.seg = &es; break;
+      case 1:
+	i.seg = &cs; break;
+      case 2:
+	i.seg = &ss; break;
+      case 3:
+	i.seg = &ds; break;
+      case 4:
+	i.seg = &fs; break;
+      case 5:
+	i.seg = &gs; break;
+      }
+      op_string += 4;		/* skip % <x> s : */
+      operand_string = op_string; /* Pretend given string starts here. */
+      if (!is_digit_char(*op_string) && !is_identifier_char(*op_string)
+	  && *op_string != '(' && *op_string != ABSOLUTE_PREFIX) {
+	as_bad("bad memory operand after segment override");
+	return 0;
+      }
+      /* Handle case of %es:*foo. */
+      if (*op_string == ABSOLUTE_PREFIX) {
+	op_string++;
+	i.types[this_operand] |= JumpAbsolute;
+      }
+      goto do_memory_reference;
+    }
+    i.types[this_operand] |= r->reg_type;
+    i.regs[this_operand] = r;
+    i.reg_operands++;
+  } else if (*op_string == IMMEDIATE_PREFIX) { /* ... or an immediate */
+    char * save_input_line_pointer;
+    register expressionS *exp;
+    segT exp_seg;
+    if (i.imm_operands == MAX_IMMEDIATE_OPERANDS) {
+      as_bad("only 1 or 2 immediate operands are allowed");
+      return 0;
+    }
+    exp = &im_expressions[i.imm_operands++];
+    i.imms [this_operand] = exp;
+    save_input_line_pointer = input_line_pointer;
+    input_line_pointer = ++op_string;        /* must advance op_string! */
+    exp_seg = expression (exp);
+    input_line_pointer = save_input_line_pointer;
+    switch (exp_seg) {
+    case SEG_ABSENT:    /* missing or bad expr becomes absolute 0 */
+      as_bad("missing or invalid immediate expression '%s' taken as 0",
+	       operand_string);
+      exp->X_seg = SEG_ABSOLUTE;
+      exp->X_add_number = 0;
+      exp->X_add_symbol = (symbolS *) 0;
+      exp->X_subtract_symbol = (symbolS *) 0;
+      i.types[this_operand] |= Imm;
+      break;
+    case SEG_ABSOLUTE:
+      i.types[this_operand] |= SMALLEST_IMM_TYPE (exp->X_add_number);
+      break;
+    case SEG_TEXT: case SEG_DATA: case SEG_BSS: case SEG_UNKNOWN:
+      i.types[this_operand] |= Imm32; /* this is an address ==> 32bit */
+      break;
+    default:
+seg_unimplemented:
+      as_bad("Unimplemented segment type %d in parse_operand", exp_seg);
+      return 0;
+    }
+    /* shorten this type of this operand if the instruction wants
+     * fewer bits than are present in the immediate.  The bit field
+     * code can put out 'andb $0xffffff, %al', for example.   pace
+     * also 'movw $foo,(%eax)'
+     */
+    switch (i.suffix) {
+    case WORD_OPCODE_SUFFIX:
+      i.types[this_operand] |= Imm16;
+      break;
+    case BYTE_OPCODE_SUFFIX:
+      i.types[this_operand] |= Imm16 | Imm8 | Imm8S;
+      break;
+    }
+  } else if (is_digit_char(*op_string) || is_identifier_char(*op_string)
+	     || *op_string == '(') {
+    /* This is a memory reference of some sort. */
+    register char * base_string;
+    unsigned int found_base_index_form;
+
+  do_memory_reference:
+    if (i.mem_operands == MAX_MEMORY_OPERANDS) {
+      as_bad("more than 1 memory reference in instruction");
+      return 0;
+    }
+    i.mem_operands++;
+
+    /* Determine type of memory operand from opcode_suffix;
+       no opcode suffix implies general memory references. */
+    switch (i.suffix) {
+    case BYTE_OPCODE_SUFFIX:
+      i.types[this_operand] |= Mem8;
+      break;
+    case WORD_OPCODE_SUFFIX:
+      i.types[this_operand] |= Mem16;
+      break;
+    case DWORD_OPCODE_SUFFIX:
+    default:
+      i.types[this_operand] |= Mem32;
+    }
+
+    /*  Check for base index form.  We detect the base index form by
+	looking for an ')' at the end of the operand, searching
+	for the '(' matching it, and finding a REGISTER_PREFIX or ','
+	after it. */
+    base_string = end_of_operand_string - 1;
+    found_base_index_form = 0;
+    if (*base_string == ')') {
+      unsigned int parens_balenced = 1;
+      /* We've already checked that the number of left & right ()'s are equal,
+	 so this loop will not be infinite. */
+      do {
+	base_string--;
+	if (*base_string == ')') parens_balenced++;
+	if (*base_string == '(') parens_balenced--;
+      } while (parens_balenced);
+      base_string++;			/* Skip past '('. */
+      if (*base_string == REGISTER_PREFIX || *base_string == ',')
+	found_base_index_form = 1;
+    }
+
+    /* If we can't parse a base index register expression, we've found
+       a pure displacement expression.  We set up displacement_string_start
+       and displacement_string_end for the code below. */
+    if (! found_base_index_form) {
+	displacement_string_start = op_string;
+	displacement_string_end = end_of_operand_string;
+    } else {
+      char *base_reg_name, *index_reg_name, *num_string;
+      int num;
+
+      i.types[this_operand] |= BaseIndex;
+
+      /* If there is a displacement set-up for it to be parsed later. */
+      if (base_string != op_string + 1) {
+	displacement_string_start = op_string;
+	displacement_string_end = base_string - 1;
+      }
+
+      /* Find base register (if any). */
+      if (*base_string != ',') {
+	base_reg_name = base_string++;
+	/* skip past register name & parse it */
+	while (isalpha(*base_string)) base_string++;
+	if (base_string == base_reg_name+1) {
+	  as_bad("can't find base register name after '(%c'",
+		   REGISTER_PREFIX);
+	  return 0;
+	}
+	END_STRING_AND_SAVE (base_string);
+	if (! (i.base_reg = parse_register (base_reg_name))) {
+	  as_bad("bad base register name ('%s')", base_reg_name);
+	  return 0;
+	}
+	RESTORE_END_STRING (base_string);
+      }
+
+      /* Now check seperator; must be ',' ==> index reg
+	 OR num ==> no index reg. just scale factor
+	 OR ')' ==> end. (scale factor = 1) */
+      if (*base_string != ',' && *base_string != ')') {
+	as_bad("expecting ',' or ')' after base register in `%s'",
+		 operand_string);
+	return 0;
+      }
+
+      /* There may index reg here; and there may be a scale factor. */
+      if (*base_string == ',' && *(base_string+1) == REGISTER_PREFIX) {
+	index_reg_name = ++base_string;
+	while (isalpha(*++base_string));
+	END_STRING_AND_SAVE (base_string);
+	if (! (i.index_reg = parse_register(index_reg_name))) {
+	  as_bad("bad index register name ('%s')", index_reg_name);
+	  return 0;
+	}
+	RESTORE_END_STRING (base_string);
+      }
+
+      /* Check for scale factor. */
+      if (*base_string == ',' && isdigit(*(base_string+1))) {
+	num_string = ++base_string;
+	while (is_digit_char(*base_string)) base_string++;
+	if (base_string == num_string) {
+	  as_bad("can't find a scale factor after ','");
+	  return 0;
+	}
+	END_STRING_AND_SAVE (base_string);
+	/* We've got a scale factor. */
+	if (! sscanf (num_string, "%d", &num)) {
+	  as_bad("can't parse scale factor from '%s'", num_string);
+	  return 0;
+	}
+	RESTORE_END_STRING (base_string);
+	switch (num) {	/* must be 1 digit scale */
+	case 1: i.log2_scale_factor = 0; break;
+	case 2: i.log2_scale_factor = 1; break;
+	case 4: i.log2_scale_factor = 2; break;
+	case 8: i.log2_scale_factor = 3; break;
+	default:
+	  as_bad("expecting scale factor of 1, 2, 4, 8; got %d", num);
+	  return 0;
+	}
+      } else {
+	if (! i.index_reg && *base_string == ',') {
+	  as_bad("expecting index register or scale factor after ','; got '%c'",
+		   *(base_string+1));
+	  return 0;
+	}
+      }
+    }
+
+    /* If there's an expression begining the operand, parse it,
+       assuming displacement_string_start and displacement_string_end
+       are meaningful. */
+    if (displacement_string_start) {
+      register expressionS * exp;
+      segT exp_seg;
+      char * save_input_line_pointer;
+      exp = &disp_expressions[i.disp_operands];
+      i.disps [this_operand] = exp;
+      i.disp_operands++;
+      save_input_line_pointer = input_line_pointer;
+      input_line_pointer = displacement_string_start;
+      END_STRING_AND_SAVE (displacement_string_end);
+      exp_seg = expression (exp);
+      if(*input_line_pointer)
+	as_bad("Ignoring junk '%s' after expression",input_line_pointer);
+      RESTORE_END_STRING (displacement_string_end);
+      input_line_pointer = save_input_line_pointer;
+      switch (exp_seg) {
+      case SEG_ABSENT:
+	/* missing expr becomes absolute 0 */
+	as_bad("missing or invalid displacement '%s' taken as 0",
+		 operand_string);
+	i.types[this_operand] |= (Disp|Abs);
+	exp->X_seg = SEG_ABSOLUTE;
+	exp->X_add_number = 0;
+	exp->X_add_symbol = (symbolS *) 0;
+	exp->X_subtract_symbol = (symbolS *) 0;
+	break;
+      case SEG_ABSOLUTE:
+	i.types[this_operand] |= SMALLEST_DISP_TYPE (exp->X_add_number);
+	break;
+      case SEG_TEXT: case SEG_DATA: case SEG_BSS:
+      case SEG_UNKNOWN:	/* must be 32 bit displacement (i.e. address) */
+	i.types[this_operand] |= Disp32;
+	break;
+      default:
+	goto seg_unimplemented;
+      }
+    }
+
+    /* Make sure the memory operand we've been dealt is valid. */
+    if (i.base_reg && i.index_reg &&
+	! (i.base_reg->reg_type & i.index_reg->reg_type & Reg)) {
+      as_bad("register size mismatch in (base,index,scale) expression");
+      return 0;
+    }
+    if ((i.base_reg && (i.base_reg->reg_type & Reg32) == 0) ||
+	(i.index_reg && (i.index_reg->reg_type & Reg32) == 0)) {
+      as_bad("base/index register must be 32 bit register");
+      return 0;
+    }
+    if (i.index_reg && i.index_reg == esp) {
+      as_bad("%s may not be used as an index register", esp->reg_name);
+      return 0;
+    }
+  } else {			/* it's not a memory operand; argh! */
+    as_bad("invalid char %s begining %s operand '%s'",
+	     output_invalid(*op_string), ordinal_names[this_operand],
+	     op_string);
+    return 0;
+  }
+  return 1;			/* normal return */
+}
+
+/*
+ *			md_estimate_size_before_relax()
+ *
+ * Called just before relax().
+ * Any symbol that is now undefined will not become defined.
+ * Return the correct fr_subtype in the frag.
+ * Return the initial "guess for fr_var" to caller.
+ * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
+ * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
+ * Although it may not be explicit in the frag, pretend fr_var starts with a
+ * 0 value.
+ */
+int
+md_estimate_size_before_relax (fragP, segment)
+     register fragS *	fragP;
+     register segT	segment;
+{
+  register unsigned char *	opcode;
+  register int		old_fr_fix;
+
+  old_fr_fix = fragP -> fr_fix;
+  opcode = (unsigned char *) fragP -> fr_opcode;
+  /* We've already got fragP->fr_subtype right;  all we have to do is check
+     for un-relaxable symbols. */
+  if (S_GET_SEGMENT(fragP -> fr_symbol) != segment) {
+    /* symbol is undefined in this segment */
+    switch (opcode[0]) {
+    case JUMP_PC_RELATIVE:	/* make jmp (0xeb) a dword displacement jump */
+      opcode[0] = 0xe9;		/* dword disp jmp */
+      fragP -> fr_fix += 4;
+      fix_new (fragP, old_fr_fix, 4,
+	       fragP -> fr_symbol,
+	       (symbolS *) 0,
+	       fragP -> fr_offset, 1, NO_RELOC);
+      break;
+
+    default:
+      /* This changes the byte-displacement jump 0x7N -->
+	 the dword-displacement jump 0x0f8N */
+      opcode[1] = opcode[0] + 0x10;
+      opcode[0] = TWO_BYTE_OPCODE_ESCAPE;		/* two-byte escape */
+      fragP -> fr_fix += 1 + 4;	/* we've added an opcode byte */
+      fix_new (fragP, old_fr_fix + 1, 4,
+	       fragP -> fr_symbol,
+	       (symbolS *) 0,
+	       fragP -> fr_offset, 1, NO_RELOC);
+      break;
+    }
+    frag_wane (fragP);
+  }
+  return (fragP -> fr_var + fragP -> fr_fix - old_fr_fix);
+}				/* md_estimate_size_before_relax() */
+
+/*
+ *			md_convert_frag();
+ *
+ * Called after relax() is finished.
+ * In:	Address of frag.
+ *	fr_type == rs_machine_dependent.
+ *	fr_subtype is what the address relaxed to.
+ *
+ * Out:	Any fixSs and constants are set up.
+ *	Caller will turn frag into a ".space 0".
+ */
+void
+md_convert_frag (fragP)
+     register fragS *	fragP;
+{
+  register unsigned char * opcode;
+  unsigned char * where_to_put_displacement;
+  unsigned int target_address, opcode_address;
+  unsigned int extension;
+  int displacement_from_opcode_start;
+
+  opcode = (unsigned char *) fragP -> fr_opcode;
+
+  /* Address we want to reach in file space. */
+  target_address = S_GET_VALUE(fragP->fr_symbol) + fragP->fr_offset;
+
+  /* Address opcode resides at in file space. */
+  opcode_address = fragP->fr_address + fragP->fr_fix;
+
+  /* Displacement from opcode start to fill into instruction. */
+  displacement_from_opcode_start = target_address - opcode_address;
+
+  switch (fragP->fr_subtype) {
+  case ENCODE_RELAX_STATE (COND_JUMP, BYTE):
+  case ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE):
+    /* don't have to change opcode */
+    extension = 1;		/* 1 opcode + 1 displacement */
+    where_to_put_displacement = &opcode[1];
+    break;
+
+  case ENCODE_RELAX_STATE (COND_JUMP, WORD):
+    opcode[1] = TWO_BYTE_OPCODE_ESCAPE;
+    opcode[2] = opcode[0] + 0x10;
+    opcode[0] = WORD_PREFIX_OPCODE;
+    extension = 4;		/* 3 opcode + 2 displacement */
+    where_to_put_displacement = &opcode[3];
+    break;
+
+  case ENCODE_RELAX_STATE (UNCOND_JUMP, WORD):
+    opcode[1] = 0xe9;
+    opcode[0] = WORD_PREFIX_OPCODE;
+    extension = 3;		/* 2 opcode + 2 displacement */
+    where_to_put_displacement = &opcode[2];
+    break;
+
+  case ENCODE_RELAX_STATE (COND_JUMP, DWORD):
+    opcode[1] = opcode[0] + 0x10;
+    opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
+    extension = 5;		/* 2 opcode + 4 displacement */
+    where_to_put_displacement = &opcode[2];
+    break;
+
+  case ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD):
+    opcode[0] = 0xe9;
+    extension = 4;		/* 1 opcode + 4 displacement */
+    where_to_put_displacement = &opcode[1];
+    break;
+
+  default:
+    BAD_CASE(fragP -> fr_subtype);
+    break;
+  }
+  /* now put displacement after opcode */
+  md_number_to_chars (where_to_put_displacement,
+		      displacement_from_opcode_start - extension,
+		      SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
+  fragP -> fr_fix += extension;
+}
+
+
+int md_short_jump_size = 2;	/* size of byte displacement jmp */
+int md_long_jump_size  = 5;	/* size of dword displacement jmp */
+int md_reloc_size = 8;		/* Size of relocation record */
+
+void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
+     char	*ptr;
+     long	from_addr, to_addr;
+fragS *frag;
+symbolS *to_symbol;
+{
+  long offset;
+
+  offset = to_addr - (from_addr + 2);
+  md_number_to_chars (ptr, (long) 0xeb, 1); /* opcode for byte-disp jump */
+  md_number_to_chars (ptr + 1, offset, 1);
+}
+
+void md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
+     char	*ptr;
+     long	from_addr, to_addr;
+     fragS	*frag;
+     symbolS	*to_symbol;
+{
+  long offset;
+
+  if (flagseen['m']) {
+    offset = to_addr - S_GET_VALUE(to_symbol);
+    md_number_to_chars (ptr, 0xe9, 1); /* opcode for long jmp */
+    md_number_to_chars (ptr + 1, offset, 4);
+    fix_new (frag, (ptr+1) - frag->fr_literal, 4,
+	     to_symbol, (symbolS *) 0, (long) 0, 0, NO_RELOC);
+  } else {
+    offset = to_addr - (from_addr + 5);
+    md_number_to_chars(ptr, (long) 0xe9, 1);
+    md_number_to_chars(ptr + 1, offset, 4);
+  }
+}
+
+int
+md_parse_option(argP,cntP,vecP)
+char **argP;
+int *cntP;
+char ***vecP;
+{
+	return 1;
+}
+
+void				/* Knows about order of bytes in address. */
+md_number_to_chars (con, value, nbytes)
+     char	con [];	/* Return 'nbytes' of chars here. */
+     long	value;		/* The value of the bits. */
+     int	nbytes;		/* Number of bytes in the output. */
+{
+  register char * p = con;
+
+  switch (nbytes) {
+  case 1:
+    p[0] = value & 0xff;
+    break;
+  case 2:
+    p[0] = value & 0xff;
+    p[1] = (value >> 8) & 0xff;
+    break;
+  case 4:
+    p[0] = value & 0xff;
+    p[1] = (value>>8) & 0xff;
+    p[2] = (value>>16) & 0xff;
+    p[3] = (value>>24) & 0xff;
+    break;
+  default:
+    BAD_CASE (nbytes);
+  }
+}
+
+
+/* Apply a fixup (fixS) to segment data, once it has been determined
+   by our caller that we have all the info we need to fix it up. 
+
+   On the 386, immediates, displacements, and data pointers are all in
+   the same (little-endian) format, so we don't need to care about which
+   we are handling.  */
+
+void
+md_apply_fix (fixP, value)
+     fixS * fixP;		/* The fix we're to put in */
+     long	value;		/* The value of the bits. */
+{
+  register char * p = fixP->fx_where + fixP->fx_frag->fr_literal;
+ 
+  switch (fixP->fx_size) {
+  case 1:
+    *p = value;
+    break;
+  case 2:
+    *p++ = value;
+    *p = (value>>8);
+    break;
+  case 4:
+    *p++ = value;
+    *p++ = (value>>8);
+    *p++ = (value>>16);
+    *p = (value>>24);
+    break;
+  default:
+    BAD_CASE (fixP->fx_size);
+  }
+}
+
+long			/* Knows about the byte order in a word. */
+md_chars_to_number (con, nbytes)
+unsigned     char	con[];	/* Low order byte 1st. */
+     int	nbytes;		/* Number of bytes in the input. */
+{
+  long	retval;
+  for (retval=0, con+=nbytes-1; nbytes--; con--)
+    {
+      retval <<= BITS_PER_CHAR;
+      retval |= *con;
+    }
+  return retval;
+}
+
+/* Not needed for coff since relocation structure does not 
+   contain bitfields. */
+#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
+/* Output relocation information in the target's format.  */
+void
+md_ri_to_chars(the_bytes, ri)
+     char *the_bytes;
+     struct reloc_info_generic *ri;
+{
+  /* this is easy */
+  md_number_to_chars(the_bytes, ri->r_address, 4);
+  /* now the fun stuff */
+  the_bytes[6] = (ri->r_symbolnum >> 16) & 0x0ff;
+  the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
+  the_bytes[4] = ri->r_symbolnum & 0x0ff;
+  the_bytes[7] = (((ri->r_extern << 3)  & 0x08) | ((ri->r_length << 1) & 0x06) | 
+    ((ri->r_pcrel << 0)  & 0x01)) & 0x0F; 
+}
+#endif				/* OBJ_AOUT or OBJ_BOUT */
+
+
+#define MAX_LITTLENUMS 6
+
+/* Turn the string pointed to by litP into a floating point constant of type
+   type, and emit the appropriate bytes.  The number of LITTLENUMS emitted
+   is stored in *sizeP .  An error message is returned, or NULL on OK.
+ */
+char *
+md_atof(type,litP,sizeP)
+     char type;
+     char *litP;
+     int *sizeP;
+{
+  int	prec;
+  LITTLENUM_TYPE words[MAX_LITTLENUMS];
+  LITTLENUM_TYPE *wordP;
+  char	*t;
+
+  switch(type) {
+  case 'f':
+  case 'F':
+    prec = 2;
+    break;
+
+  case 'd':
+  case 'D':
+    prec = 4;
+    break;
+
+  case 'x':
+  case 'X':
+    prec = 5;
+    break;
+
+  default:
+    *sizeP=0;
+    return "Bad call to md_atof ()";
+  }
+  t = atof_ieee (input_line_pointer,type,words);
+  if(t)
+    input_line_pointer=t;
+
+  *sizeP = prec * sizeof(LITTLENUM_TYPE);
+  /* this loops outputs the LITTLENUMs in REVERSE order; in accord with
+     the bigendian 386 */
+  for(wordP = words + prec - 1;prec--;) {
+    md_number_to_chars (litP, (long) (*wordP--), sizeof(LITTLENUM_TYPE));
+    litP += sizeof(LITTLENUM_TYPE);
+  }
+  return "";	/* Someone should teach Dean about null pointers */
+}
+
+char output_invalid_buf[8];
+
+static char * output_invalid (c)
+     char c;
+{
+  if (isprint(c)) sprintf (output_invalid_buf, "'%c'", c);
+  else sprintf (output_invalid_buf, "(0x%x)", (unsigned) c);
+  return output_invalid_buf;
+}
+
+static reg_entry *parse_register (reg_string)
+    char *reg_string;          /* reg_string starts *before* REGISTER_PREFIX */
+{
+  register char *s = reg_string;
+  register char *p;
+  char reg_name_given[MAX_REG_NAME_SIZE];
+
+  s++;				/* skip REGISTER_PREFIX */
+  for (p = reg_name_given; is_register_char (*s); p++, s++) {
+    *p = register_chars [*s];
+    if (p >= reg_name_given + MAX_REG_NAME_SIZE)
+      return (reg_entry *) 0;
+  }
+  *p = '\0';
+  return (reg_entry *) hash_find (reg_hash, reg_name_given);
+}
+
+
+/* We have no need to default values of symbols.  */
+
+/* ARGSUSED */
+symbolS *
+md_undefined_symbol (name)
+     char *name;
+{
+  return 0;
+}
+
+/* Parse an operand that is machine-specific.  
+   We just return without modifying the expression if we have nothing
+   to do.  */
+
+/* ARGSUSED */
+void
+md_operand (expressionP)
+     expressionS *expressionP;
+{
+}
+
+/* Round up a section size to the appropriate boundary.  */
+long
+md_section_align (segment, size)
+     segT segment;
+     long size;
+{
+  return size;		/* Byte alignment is fine */
+}
+
+/* Exactly what point is a PC-relative offset relative TO?
+   On the i386, they're relative to the address of the offset, plus
+   its size. (??? Is this right?  FIXME-SOON!) */
+long
+md_pcrel_from (fixP)
+     fixS *fixP;
+{
+  return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
+}
+
+/*
+ * $Log$
+ * Revision 1.1  1991/04/04 18:16:41  rich
+ * Initial revision
+ *
+ * Revision 1.2  1991/03/30  17:11:30  rich
+ * Updated md_create_short_jump calling protocol.
+ *
+ *
+ */
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * End:
+ */
+
+/* end of tc-i386.c */
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
new file mode 100644
index 0000000..a2b853e
--- /dev/null
+++ b/gas/config/tc-i386.h
@@ -0,0 +1,247 @@
+/* i386.h -- Header file for i386.c
+   Copyright (C) 1989, Free Software Foundation.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+   
+#define TC_I386 1
+
+#define tc_crawl_symbol_chain(a)	; /* not used */
+#define tc_headers_hook(a)		; /* not used */
+
+#define MAX_OPERANDS 3		/* max operands per insn */
+#define MAX_PREFIXES 4		/* max prefixes per opcode */
+#define MAX_IMMEDIATE_OPERANDS 2 /* max immediates per insn */
+#define MAX_MEMORY_OPERANDS 2	/* max memory ref per insn
+				 * lcall uses 2
+				 */
+/* we define the syntax here (modulo base,index,scale syntax) */
+#define REGISTER_PREFIX '%'
+#define IMMEDIATE_PREFIX '$'
+#define ABSOLUTE_PREFIX '*'
+#define PREFIX_SEPERATOR '/'
+
+#define TWO_BYTE_OPCODE_ESCAPE 0x0f
+
+/* register numbers */
+#define EBP_REG_NUM 5
+#define ESP_REG_NUM 4
+
+/* modrm_byte.regmem for twobyte escape */
+#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
+/* index_base_byte.index for no index register addressing */
+#define NO_INDEX_REGISTER ESP_REG_NUM
+/* index_base_byte.base for no base register addressing */
+#define NO_BASE_REGISTER EBP_REG_NUM
+
+/* these are the att as opcode suffixes, making movl --> mov, for example */
+#define DWORD_OPCODE_SUFFIX 'l'
+#define WORD_OPCODE_SUFFIX  'w'
+#define BYTE_OPCODE_SUFFIX  'b'
+
+/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
+#define REGMEM_FIELD_HAS_REG 0x3                /* always = 0x3 */
+#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
+
+#define END_OF_INSN '\0'
+
+/*
+When an operand is read in it is classified by its type.  This type includes
+all the possible ways an operand can be used.  Thus, '%eax' is both 'register
+# 0' and 'The Accumulator'.  In our language this is expressed by OR'ing
+'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
+Operands are classified so that we can match given operand types with
+the opcode table in i386-opcode.h.
+ */
+#define Unknown 0x0
+/* register */
+#define Reg8    0x1		/* 8 bit reg */
+#define Reg16   0x2		/* 16 bit reg */
+#define Reg32   0x4		/* 32 bit reg */
+#define Reg     (Reg8|Reg16|Reg32)    /* gen'l register */
+#define WordReg (Reg16|Reg32)	/* for push/pop operands */
+/* immediate */
+#define Imm8    0x8		/* 8 bit immediate */
+#define Imm8S	0x10		/* 8 bit immediate sign extended */
+#define Imm16   0x20		/* 16 bit immediate */
+#define Imm32   0x40		/* 32 bit immediate */
+#define Imm1    0x80    	/* 1 bit immediate */
+#define ImmUnknown Imm32	/* for unknown expressions */
+#define Imm     (Imm8|Imm8S|Imm16|Imm32)    /* gen'l immediate */
+/* memory */
+#define Disp8   0x200		/* 8 bit displacement (for jumps) */
+#define Disp16  0x400		/* 16 bit displacement */
+#define Disp32  0x800		/* 32 bit displacement */
+#define Disp    (Disp8|Disp16|Disp32) /* General displacement */
+#define DispUnknown Disp32	/* for unknown size displacements */
+#define Mem8    0x1000
+#define Mem16   0x2000
+#define Mem32   0x4000
+#define BaseIndex 0x8000
+#define Mem     (Disp|Mem8|Mem16|Mem32|BaseIndex) /* General memory */
+#define WordMem   (Mem16|Mem32|Disp|BaseIndex)
+#define ByteMem   (Mem8|Disp|BaseIndex)
+/* specials */
+#define InOutPortReg 0x10000	/* register to hold in/out port addr = dx */
+#define ShiftCount 0x20000	/* register to hold shift cound = cl */
+#define Control 0x40000		/* Control register */
+#define Debug   0x80000		/* Debug register */
+#define Test    0x100000		/* Test register */
+#define FloatReg 0x200000	/* Float register */
+#define FloatAcc 0x400000	/* Float stack top %st(0) */
+#define SReg2   0x800000		/* 2 bit segment register */
+#define SReg3   0x1000000		/* 3 bit segment register */
+#define Acc     0x2000000		/* Accumulator %al or %ax or %eax */
+#define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc)
+#define JumpAbsolute 0x4000000
+#define Abs8  0x08000000
+#define Abs16 0x10000000
+#define Abs32 0x20000000
+#define Abs (Abs8|Abs16|Abs32)
+
+#define MODE_FROM_DISP_SIZE(t) \
+      ((t&(Disp8)) ? 1 : \
+       ((t&(Disp32)) ? 2 : 0))
+
+#define Byte (Reg8|Imm8|Imm8S)
+#define Word (Reg16|Imm16)
+#define DWord (Reg32|Imm32)
+
+/* convert opcode suffix ('b' 'w' 'l' typically) into type specifyer */
+#define OPCODE_SUFFIX_TO_TYPE(s)                 \
+  (s == BYTE_OPCODE_SUFFIX ? Byte : \
+   (s == WORD_OPCODE_SUFFIX ? Word : DWord))
+
+#define FITS_IN_SIGNED_BYTE(num) ((num) >= -128 && (num) <= 127)
+#define FITS_IN_UNSIGNED_BYTE(num) ((num) >= 0 && (num) <= 255)
+#define FITS_IN_UNSIGNED_WORD(num) ((num) >= 0 && (num) <= 65535)
+#define FITS_IN_SIGNED_WORD(num) ((num) >= -32768 && (num) <= 32767)
+
+#define SMALLEST_DISP_TYPE(num) \
+  FITS_IN_SIGNED_BYTE(num) ? (Disp8|Disp32|Abs8|Abs32) : (Disp32|Abs32)
+
+#define SMALLEST_IMM_TYPE(num) \
+  (num == 1) ? (Imm1|Imm8|Imm8S|Imm16|Imm32): \
+  FITS_IN_SIGNED_BYTE(num) ? (Imm8S|Imm8|Imm16|Imm32) : \
+  FITS_IN_UNSIGNED_BYTE(num) ? (Imm8|Imm16|Imm32): \
+  (FITS_IN_SIGNED_WORD(num)||FITS_IN_UNSIGNED_WORD(num)) ? (Imm16|Imm32) : \
+  (Imm32)
+
+typedef struct {
+  /* instruction name sans width suffix ("mov" for movl insns) */
+  char          *name;
+
+  /* how many operands */
+  unsigned int    operands;
+
+  /* base_opcode is the fundamental opcode byte with a optional prefix(es). */
+  unsigned int    base_opcode;
+
+  /* extension_opcode is the 3 bit extension for group <n> insns.
+     If this template has no extension opcode (the usual case) use None */
+  unsigned char    extension_opcode;
+#define None 0xff		/* If no extension_opcode is possible. */
+
+  /* the bits in opcode_modifier are used to generate the final opcode from
+     the base_opcode.  These bits also are used to detect alternate forms of
+     the same instruction */
+  unsigned int    opcode_modifier;
+
+/* opcode_modifier bits: */
+#define W        0x1	/* set if operands are words or dwords */
+#define D        0x2	/* D = 0 if Reg --> Regmem; D = 1 if Regmem --> Reg */
+/* direction flag for floating insns:  MUST BE 0x400 */
+#define FloatD 0x400
+/* shorthand */
+#define DW (D|W)
+#define ShortForm 0x10		/* register is in low 3 bits of opcode */
+#define ShortFormW 0x20		/* ShortForm and W bit is 0x8 */
+#define Seg2ShortForm 0x40	/* encoding of load segment reg insns */
+#define Seg3ShortForm 0x80	/* fs/gs segment register insns. */
+#define Jump 0x100		/* special case for jump insns. */
+#define JumpInterSegment 0x200	/* special case for intersegment leaps/calls */
+/* 0x400 CANNOT BE USED since it's already used by FloatD above */
+#define DONT_USE 0x400
+#define NoModrm 0x800
+#define Modrm 0x1000
+#define imulKludge 0x2000
+#define JumpByte 0x4000
+#define JumpDword 0x8000
+#define ReverseRegRegmem 0x10000
+
+  /* (opcode_modifier & COMES_IN_ALL_SIZES) is true if the
+     instuction comes in byte, word, and dword sizes and is encoded into
+     machine code in the canonical way. */
+#define COMES_IN_ALL_SIZES (W)
+
+  /* (opcode_modifier & COMES_IN_BOTH_DIRECTIONS) indicates that the
+     source and destination operands can be reversed by setting either
+     the D (for integer insns) or the FloatD (for floating insns) bit
+     in base_opcode. */
+#define COMES_IN_BOTH_DIRECTIONS (D|FloatD)
+
+  /* operand_types[i] describes the type of operand i.  This is made
+     by OR'ing together all of the possible type masks.  (e.g.
+     'operand_types[i] = Reg|Imm' specifies that operand i can be
+     either a register or an immediate operand */
+  unsigned int operand_types[3];
+} template;
+
+/*
+  'templates' is for grouping together 'template' structures for opcodes
+  of the same name.  This is only used for storing the insns in the grand
+  ole hash table of insns.
+  The templates themselves start at START and range up to (but not including)
+  END.
+*/
+typedef struct {
+  template      *start;
+  template      *end;
+} templates;
+
+/* these are for register name --> number & type hash lookup */
+typedef struct {
+  char * reg_name;
+  unsigned int   reg_type;
+  unsigned int   reg_num;
+} reg_entry;
+
+typedef struct {
+  char * seg_name;
+  unsigned int   seg_prefix;
+} seg_entry;
+
+/* these are for prefix name --> prefix code hash lookup */
+typedef struct {
+  char * prefix_name;
+  unsigned char  prefix_code;
+} prefix_entry;
+
+/* 386 operand encoding bytes:  see 386 book for details of this. */
+typedef struct {
+  unsigned regmem:3;	     /* codes register or memory operand */
+  unsigned reg:3;	     /* codes register operand (or extended opcode) */
+  unsigned mode:2;	     /* how to interpret regmem & reg */
+} modrm_byte;
+
+/* 386 opcode byte to code indirect addressing. */
+typedef struct {
+  unsigned base:3;
+  unsigned index:3;
+  unsigned scale:2;
+} base_index_byte;
+
+/* end of tc-i386.h */
diff --git a/gas/config/tc-i860.c b/gas/config/tc-i860.c
new file mode 100644
index 0000000..d9dd84c
--- /dev/null
+++ b/gas/config/tc-i860.c
@@ -0,0 +1,1255 @@
+/* i860.c -- Assemble for the I860
+   Copyright (C) 1989 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+#include "as.h"
+
+#include "i860-opcode.h"
+
+/* incorporated from i860.h */
+enum reloc_type /* NOTE: three bits max, see struct reloc_info_i860.r_type */
+{
+    NO_RELOC = 0, BRADDR, LOW0, LOW1, LOW2, LOW3, LOW4, SPLIT0, SPLIT1, SPLIT2, RELOC_32,
+};
+      
+enum highlow_type       /* NOTE: two bits max, see reloc_info_i860.r_type */
+{
+    NO_SPEC = 0, PAIR, HIGH, HIGHADJ,
+};
+	   
+struct reloc_info_i860
+{
+    unsigned long r_address;
+/*
+ * Using bit fields here is a bad idea because the order is not portable. :-(
+ */
+    unsigned int r_symbolnum: 24;
+    unsigned int r_pcrel    : 1;
+    unsigned int r_extern   : 1;
+    /* combining the two field simplifies the argument passing in "new_fix()" */
+    /* and is compatible with the existing Sparc #ifdef's */
+    /* r_type:  highlow_type - bits 5,4; reloc_type - bits 3-0 */
+    unsigned int r_type     : 6;
+    long r_addend;
+};
+
+#define relocation_info reloc_info_i860
+
+
+void md_begin();
+void md_end();
+void md_number_to_chars();
+void md_assemble();
+char *md_atof();
+void md_convert_frag();
+void md_create_short_jump();
+void md_create_long_jump();
+int  md_estimate_size_before_relax();
+void md_number_to_imm();
+void md_number_to_disp();
+void md_number_to_field();
+void md_ri_to_chars();
+static void i860_ip();
+void emit_machine_reloc();
+
+int md_reloc_size = sizeof(struct relocation_info);
+
+void (*md_emit_relocations)() = emit_machine_reloc;
+
+const relax_typeS md_relax_table[] = { 0 };
+
+/* handle of the OPCODE hash table */
+static struct hash_control *op_hash = NULL;
+
+static void s_dual(), s_enddual();
+static void s_atmp();
+
+const pseudo_typeS
+md_pseudo_table[] = {
+    { "dual",       s_dual,     4 },
+    { "enddual",    s_enddual,  4 },
+    { "atmp",	    s_atmp,	4 },
+    { NULL,         0,          0 },
+};
+
+int md_short_jump_size = 4;
+int md_long_jump_size = 4;
+
+/* This array holds the chars that always start a comment.  If the
+    pre-processor is disabled, these aren't very useful */
+char comment_chars[] = "!/";	/* JF removed '|' from comment_chars */
+
+/* This array holds the chars that only start a comment at the beginning of
+   a line.  If the line seems to have the form '# 123 filename'
+   .line and .file directives will appear in the pre-processed output */
+/* Note that input_file.c hand checks for '#' at the beginning of the
+   first line of the input file.  This is because the compiler outputs
+   #NO_APP at the beginning of its output. */
+/* Also note that comments like this one will always work. */
+char line_comment_chars[] = "#/";
+
+/* Chars that can be used to separate mant from exp in floating point nums */
+char EXP_CHARS[] = "eE";
+
+/* Chars that mean this number is a floating point constant */
+/* As in 0f12.456 */
+/* or    0d1.2345e12 */
+char FLT_CHARS[] = "rRsSfFdDxXpP";
+
+/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
+   changed in read.c .  Ideally it shouldn't have to know about it at all,
+   but nothing is ideal around here.
+ */
+int size_reloc_info = sizeof(struct relocation_info);
+
+static unsigned char octal[256];
+#define isoctal(c)  octal[c]
+static unsigned char toHex[256];
+
+struct i860_it {
+    char    *error;
+    unsigned long opcode;
+    struct nlist *nlistp;
+    expressionS exp;
+    int pcrel;
+    enum expand_type expand;
+    enum highlow_type highlow;
+    enum reloc_type reloc;
+} the_insn;
+
+#ifdef __STDC__
+static void print_insn(struct i860_it *insn);
+static int getExpression(char *str);
+#else
+static void print_insn();
+static int getExpression();
+#endif
+static char *expr_end;
+static char last_expand;	/* error if expansion after branch */
+
+enum dual
+{
+    DUAL_OFF = 0, DUAL_ON, DUAL_DDOT, DUAL_ONDDOT,
+};
+static enum dual dual_mode = DUAL_OFF;	/* dual-instruction mode */
+
+static void
+s_dual()	/* floating point instructions have dual set */
+{
+    dual_mode = DUAL_ON;
+}
+
+static void
+s_enddual()	/* floating point instructions have dual set */
+{
+    dual_mode = DUAL_OFF;
+}
+
+static int atmp = 31; /* temporary register for pseudo's */
+
+static void
+s_atmp()
+{
+    register int temp;
+    if (strncmp(input_line_pointer, "sp", 2) == 0) {
+      input_line_pointer += 2;
+      atmp = 2;
+    }
+    else if (strncmp(input_line_pointer, "fp", 2) == 0) {
+      input_line_pointer += 2;
+      atmp = 3;
+    }
+    else if (strncmp(input_line_pointer, "r", 1) == 0) {
+      input_line_pointer += 1;
+      temp = get_absolute_expression();
+      if (temp >= 0 && temp <= 31)
+          atmp = temp;
+        else
+            as_bad("Unknown temporary pseudo register");
+    }
+    else {
+        as_bad("Unknown temporary pseudo register");
+    }
+    demand_empty_rest_of_line();
+    return;
+}
+
+/* This function is called once, at assembler startup time.  It should
+   set up all the tables, etc. that the MD part of the assembler will need.  */
+void
+md_begin()
+{
+  register char *retval = NULL;
+  int lose = 0;
+  register unsigned int i = 0;
+
+  op_hash = hash_new();
+  if (op_hash == NULL)
+    as_fatal("Virtual memory exhausted");
+
+  while (i < NUMOPCODES)
+    {
+      const char *name = i860_opcodes[i].name;
+      retval = hash_insert(op_hash, name, &i860_opcodes[i]);
+      if(retval != NULL && *retval != '\0')
+	{
+	  fprintf (stderr, "internal error: can't hash `%s': %s\n",
+		   i860_opcodes[i].name, retval);
+	  lose = 1;
+	}
+      do
+	{
+	  if (i860_opcodes[i].match & i860_opcodes[i].lose)
+	    {
+	      fprintf (stderr, "internal error: losing opcode: `%s' \"%s\"\n",
+		       i860_opcodes[i].name, i860_opcodes[i].args);
+	      lose = 1;
+	    }
+	  ++i;
+	} while (i < NUMOPCODES
+		 && !strcmp(i860_opcodes[i].name, name));
+    }
+
+  if (lose)
+    as_fatal("Broken assembler.  No assembly attempted.");
+
+  for (i = '0'; i < '8'; ++i)
+    octal[i] = 1;
+  for (i = '0'; i <= '9'; ++i)
+    toHex[i] = i - '0';
+  for (i = 'a'; i <= 'f'; ++i)
+    toHex[i] = i + 10 - 'a';
+  for (i = 'A'; i <= 'F'; ++i)
+    toHex[i] = i + 10 - 'A';
+}
+
+void
+md_end()
+{
+    return;
+}
+
+void
+md_assemble(str)
+    char *str;
+{
+    char *toP;
+    int rsd;
+    int no_opcodes = 1;
+    int i;
+    struct i860_it pseudo[3];
+
+    assert(str);
+    i860_ip(str);
+
+    /* check for expandable flag to produce pseudo-instructions */
+    if (the_insn.expand != 0 && the_insn.highlow == NO_SPEC) {
+	for (i = 0; i < 3; i++)
+	    pseudo[i] = the_insn;
+
+	switch (the_insn.expand) {
+
+	case E_DELAY:
+		no_opcodes = 1;
+		break;
+
+	case E_MOV:
+	    if (the_insn.exp.X_add_symbol == NULL &&
+	        the_insn.exp.X_subtract_symbol == NULL &&
+		(the_insn.exp.X_add_number < (1 << 15) &&
+		 the_insn.exp.X_add_number >= -(1 << 15)))
+		break;
+	    /* or l%const,r0,ireg_dest */
+	    pseudo[0].opcode = (the_insn.opcode & 0x001f0000) | 0xe4000000;
+	    pseudo[0].highlow = PAIR;
+	    /* orh h%const,ireg_dest,ireg_dest */
+	    pseudo[1].opcode = (the_insn.opcode & 0x03ffffff) | 0xec000000 |
+		((the_insn.opcode & 0x001f0000) << 5);
+	    pseudo[1].highlow = HIGH;
+	    no_opcodes = 2;
+	    break;
+
+	case E_ADDR:
+	    if (the_insn.exp.X_add_symbol == NULL &&
+	        the_insn.exp.X_subtract_symbol == NULL)
+		break;
+	    /* orh ha%addr_expr,r0,r31 */
+	    pseudo[0].opcode = 0xec000000 | (atmp<<16);
+	    pseudo[0].highlow = HIGHADJ;
+	    pseudo[0].reloc = LOW0;	/* must overwrite */
+	    /* l%addr_expr(r31),ireg_dest */
+	    pseudo[1].opcode = (the_insn.opcode & ~0x003e0000) | (atmp << 21);
+	    pseudo[1].highlow = PAIR;
+	    no_opcodes = 2;
+	    break;
+
+	case E_U32:	/* 2nd version emulates Intel as, not doc. */
+	    if (the_insn.exp.X_add_symbol == NULL &&
+	        the_insn.exp.X_subtract_symbol == NULL &&
+		(the_insn.exp.X_add_number < (1 << 16) &&
+		 the_insn.exp.X_add_number >= 0))
+		break;
+	    /* $(opcode)h h%const,ireg_src2,ireg_dest
+	    pseudo[0].opcode = (the_insn.opcode & 0xf3ffffff) | 0x0c000000; */
+	    /* $(opcode)h h%const,ireg_src2,r31 */
+	    pseudo[0].opcode = (the_insn.opcode & 0xf3e0ffff) | 0x0c000000 |
+		(atmp << 16);
+	    pseudo[0].highlow = HIGH;
+	    /* $(opcode) l%const,ireg_dest,ireg_dest
+	    pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000 |
+		((the_insn.opcode & 0x001f0000) << 5); */
+	    /* $(opcode) l%const,r31,ireg_dest */
+	    pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000 |
+		(atmp << 21);
+	    pseudo[1].highlow = PAIR;
+	    no_opcodes = 2;
+	    break;
+
+	case E_AND:	/* 2nd version emulates Intel as, not doc. */
+	    if (the_insn.exp.X_add_symbol == NULL &&
+	        the_insn.exp.X_subtract_symbol == NULL &&
+		(the_insn.exp.X_add_number < (1 << 16) &&
+		 the_insn.exp.X_add_number >= 0))
+		break;
+	    /* andnot h%const,ireg_src2,ireg_dest
+	    pseudo[0].opcode = (the_insn.opcode & 0x03ffffff) | 0xd4000000; */
+	    /* andnot h%const,ireg_src2,r31 */
+	    pseudo[0].opcode = (the_insn.opcode & 0x03e0ffff) | 0xd4000000 |
+		(atmp << 16);
+	    pseudo[0].highlow = HIGH;
+	    pseudo[0].exp.X_add_number = -1 - the_insn.exp.X_add_number;
+	    /* andnot l%const,ireg_dest,ireg_dest
+	    pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000 |
+		((the_insn.opcode & 0x001f0000) << 5); */
+	    /* andnot l%const,r31,ireg_dest */
+	    pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000 |
+		(atmp << 21);
+	    pseudo[1].highlow = PAIR;
+	    pseudo[1].exp.X_add_number = -1 - the_insn.exp.X_add_number;
+	    no_opcodes = 2;
+	    break;
+
+	case E_S32:
+	    if (the_insn.exp.X_add_symbol == NULL &&
+	        the_insn.exp.X_subtract_symbol == NULL &&
+		(the_insn.exp.X_add_number < (1 << 15) &&
+		 the_insn.exp.X_add_number >= -(1 << 15)))
+		break;
+	    /* orh h%const,r0,r31 */
+	    pseudo[0].opcode = 0xec000000 | (atmp << 16);
+	    pseudo[0].highlow = HIGH;
+	    /* or l%const,r31,r31 */
+	    pseudo[1].opcode = 0xe4000000 | (atmp << 21) | (atmp << 16);
+	    pseudo[1].highlow = PAIR;
+	    /* r31,ireg_src2,ireg_dest */
+	    pseudo[2].opcode = (the_insn.opcode & ~0x0400ffff) | (atmp << 11);
+	    pseudo[2].reloc = NO_RELOC;
+	    no_opcodes = 3;
+	    break;
+
+    	default:
+	    abort();
+	}
+
+        the_insn = pseudo[0];
+	/* check for expanded opcode after branch or in dual */
+	if (no_opcodes > 1 && last_expand == 1)
+	    as_warn("Expanded opcode after delayed branch: `%s'", str);
+	if (no_opcodes > 1 && dual_mode != DUAL_OFF)
+	    as_warn("Expanded opcode in dual mode: `%s'", str);
+    }
+
+    i = 0;
+    do {	/* always produce at least one opcode */
+        toP = frag_more(4);
+        /* put out the opcode */
+        md_number_to_chars(toP, the_insn.opcode, 4);
+
+	/* check for expanded opcode after branch or in dual */
+	last_expand = the_insn.pcrel;
+
+        /* put out the symbol-dependent stuff */
+        if (the_insn.reloc != NO_RELOC) {
+	    fix_new(
+	        frag_now,                           /* which frag */
+	        (toP - frag_now->fr_literal), /* where */
+	        4,                                  /* size */
+	        the_insn.exp.X_add_symbol,
+	        the_insn.exp.X_subtract_symbol,
+	        the_insn.exp.X_add_number,
+	        the_insn.pcrel,
+		/* merge bit fields into one argument */
+		(int)(((the_insn.highlow & 0x3) << 4) | (the_insn.reloc & 0xf))
+	    );
+        }
+        the_insn = pseudo[++i];
+    } while (--no_opcodes > 0);
+
+}
+
+static void
+i860_ip(str)
+    char *str;
+{
+    char *s;
+    const char *args;
+    char c;
+    unsigned long i;
+    struct i860_opcode *insn;
+    char *argsStart;
+    unsigned long   opcode;
+    unsigned int mask;
+    int match = 0;
+    int comma = 0;
+
+
+    for (s = str; islower(*s) || *s == '.' || *s == '3'; ++s)
+	;
+    switch (*s) {
+
+    case '\0':
+	break;
+
+    case ',':
+	comma = 1;
+
+	/*FALLTHROUGH*/
+
+    case ' ':
+	*s++ = '\0';
+	break;
+
+    default:
+	    as_bad("Unknown opcode: `%s'", str);
+	    exit(1);
+    }
+
+    if (strncmp(str, "d.", 2) == 0) {	/* check for d. opcode prefix */
+	if (dual_mode == DUAL_ON)
+	    dual_mode = DUAL_ONDDOT;
+	else
+	    dual_mode = DUAL_DDOT;
+	str += 2;
+    }
+
+    if ((insn = (struct i860_opcode *) hash_find(op_hash, str)) == NULL) {
+	if (dual_mode == DUAL_DDOT || dual_mode == DUAL_ONDDOT)
+	    str -= 2;
+	as_bad("Unknown opcode: `%s'", str);
+	return;
+    }
+    if (comma) {
+	*--s = ',';
+    }
+    argsStart = s;
+    for (;;) {
+	opcode = insn->match;
+	bzero(&the_insn, sizeof(the_insn));
+	the_insn.reloc = NO_RELOC;
+
+	/*
+	 * Build the opcode, checking as we go to make
+	 * sure that the operands match
+	 */
+	for (args = insn->args; ; ++args) {
+	    switch (*args) {
+
+	    case '\0':  /* end of args */
+		if (*s == '\0') {
+		    match = 1;
+		}
+		break;
+
+	    case '+':
+	    case '(':   /* these must match exactly */
+	    case ')':
+	    case ',':
+	    case ' ':
+		if (*s++ == *args)
+		    continue;
+		break;
+
+	    case '#':   /* must be at least one digit */
+		if (isdigit(*s++)) {
+		    while (isdigit(*s)) {
+			++s;
+		    }
+		    continue;
+		}
+		break;
+
+	    case '1':   /* next operand must be a register */
+	    case '2':
+	    case 'd':
+		switch (*s) {
+
+		case 'f':   /* frame pointer */
+		    s++;
+		    if (*s++ == 'p') {
+			mask = 0x3;
+			break;
+		    }
+		    goto error;
+
+		case 's':   /* stack pointer */
+		    s++;
+		    if (*s++ == 'p') {
+			mask= 0x2;
+			break;
+		    }
+		    goto error;
+
+		case 'r': /* any register */
+		    s++;
+		    if (!isdigit(c = *s++)) {
+			goto error;
+		    }
+		    if (isdigit(*s)) {
+		        if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32) {
+			    goto error;
+			}
+		    } else {
+			c -= '0';
+		    }
+		    mask= c;
+		    break;
+
+		default:	/* not this opcode */
+		    goto error;
+		}
+		/*
+		 * Got the register, now figure out where
+		 * it goes in the opcode.
+		 */
+		switch (*args) {
+
+		case '1':
+		    opcode |= mask << 11;
+		    continue;
+
+		case '2':
+		    opcode |= mask << 21;
+		    continue;
+
+		case 'd':
+		    opcode |= mask << 16;
+		    continue;
+
+		}
+		break;
+
+	    case 'e':    /* next operand is a floating point register */
+	    case 'f':
+	    case 'g':
+	        if (*s++ == 'f' && isdigit(*s)) {
+		    mask = *s++;
+		    if (isdigit(*s)) {
+			mask = 10 * (mask - '0') + (*s++ - '0');
+			if (mask >= 32) {
+			    break;
+			}
+		    } else {
+			mask -= '0';
+		    }
+		    switch (*args) {
+
+		    case 'e':
+			opcode |= mask << 11;
+			continue;
+
+		    case 'f':
+			opcode |= mask << 21;
+			continue;
+
+		    case 'g':
+			opcode |= mask << 16;
+			if (dual_mode != DUAL_OFF)
+			    opcode |= (1 << 9);	/* dual mode instruction */
+			if (dual_mode == DUAL_DDOT)
+			    dual_mode = DUAL_OFF;
+			if (dual_mode == DUAL_ONDDOT)
+			    dual_mode = DUAL_ON;
+			if ((opcode & (1 << 10)) && (mask == ((opcode >> 11) & 0x1f)))
+			    as_warn("Fsr1 equals fdest with Pipelining");
+			continue;
+		    }
+		}
+		break;
+
+	    case 'c': /* next operand must be a control register */
+		if (strncmp(s, "fir", 3) == 0) {
+		    opcode |= 0x0 << 21;
+		    s += 3;
+		    continue;
+		}
+		if (strncmp(s, "psr", 3) == 0) {
+		    opcode |= 0x1 << 21;
+		    s += 3;
+		    continue;
+		}
+		if (strncmp(s, "dirbase", 7) == 0) {
+		    opcode |= 0x2 << 21;
+		    s += 7;
+		    continue;
+		}
+		if (strncmp(s, "db", 2) == 0) {
+		    opcode |= 0x3 << 21;
+		    s += 2;
+		    continue;
+		}
+		if (strncmp(s, "fsr", 3) == 0) {
+		    opcode |= 0x4 << 21;
+		    s += 3;
+		    continue;
+		}
+		if (strncmp(s, "epsr", 4) == 0) {
+		    opcode |= 0x5 << 21;
+		    s += 4;
+		    continue;
+		}
+		break;
+
+	    case '5':   /* 5 bit immediate in src1 */
+		bzero(&the_insn, sizeof(the_insn));
+		if ( !getExpression(s)) {
+		    s = expr_end;
+	    	    if (the_insn.exp.X_add_number & ~0x1f)
+		        as_bad("5-bit immediate too large");
+	    	    opcode |= (the_insn.exp.X_add_number & 0x1f) << 11;
+		    bzero(&the_insn, sizeof(the_insn));
+		    the_insn.reloc = NO_RELOC;
+		    continue;
+		}
+		break;
+
+	    case 'l':   /* 26 bit immediate, relative branch */
+		the_insn.reloc = BRADDR;
+		the_insn.pcrel = 1;
+		goto immediate;
+
+	    case 's':   /* 16 bit immediate, split relative branch */
+			/* upper 5 bits of offset in dest field */
+		the_insn.pcrel = 1;
+		the_insn.reloc = SPLIT0;
+		goto immediate;
+
+	    case 'S':   /* 16 bit immediate, split (st), aligned */
+		if (opcode & (1 << 28))
+		    if (opcode & 0x1)
+			the_insn.reloc = SPLIT2;
+		    else
+			the_insn.reloc = SPLIT1;
+		else
+		    the_insn.reloc = SPLIT0;
+		goto immediate;
+
+	    case 'I':   /* 16 bit immediate, aligned */
+		if (opcode & (1 << 28))
+		    if (opcode & 0x1)
+			the_insn.reloc = LOW2;
+		    else
+			the_insn.reloc = LOW1;
+		else
+		    the_insn.reloc = LOW0;
+		goto immediate;
+
+	    case 'i':   /* 16 bit immediate */
+		the_insn.reloc = LOW0;
+
+		/*FALLTHROUGH*/
+
+	    immediate:
+		if(*s==' ')
+		  s++;
+		if (strncmp(s, "ha%", 3) == 0) {
+		    the_insn.highlow = HIGHADJ;
+		    s += 3;
+		} else if (strncmp(s, "h%", 2) == 0) {
+		    the_insn.highlow = HIGH;
+		    s += 2;
+		} else if (strncmp(s, "l%", 2) == 0) {
+		    the_insn.highlow = PAIR;
+		    s += 2;
+		}
+		the_insn.expand = insn->expand; 
+
+		/* Note that if the getExpression() fails, we will still have
+		   created U entries in the symbol table for the 'symbols'
+		   in the input string.  Try not to create U symbols for
+		   registers, etc. */
+
+		if ( !getExpression(s)) {
+		    s = expr_end;
+		    continue;
+		}
+		break;
+
+	    default:
+		abort();
+	    }
+	    break;
+	}
+	error:
+	if (match == 0)
+	  {
+	    /* Args don't match.  */
+	    if (&insn[1] - i860_opcodes < NUMOPCODES
+		&& !strcmp(insn->name, insn[1].name))
+	      {
+		++insn;
+		s = argsStart;
+		continue;
+	      }
+	    else
+	      {
+		as_bad("Illegal operands");
+		return;
+	      }
+	  }
+	break;
+    }
+
+    the_insn.opcode = opcode;
+    return;
+}
+
+static int
+getExpression(str)
+    char *str;
+{
+    char *save_in;
+    segT seg;
+
+    save_in = input_line_pointer;
+    input_line_pointer = str;
+    switch (seg = expression(&the_insn.exp)) {
+
+    case SEG_ABSOLUTE:
+    case SEG_TEXT:
+    case SEG_DATA:
+    case SEG_BSS:
+    case SEG_UNKNOWN:
+    case SEG_DIFFERENCE:
+    case SEG_BIG:
+    case SEG_ABSENT:
+	break;
+
+    default:
+	the_insn.error = "bad segment";
+	expr_end = input_line_pointer;
+	input_line_pointer=save_in;
+	return 1;
+    }
+    expr_end = input_line_pointer;
+    input_line_pointer = save_in;
+    return 0;
+}
+
+
+/*
+    This is identical to the md_atof in m68k.c.  I think this is right,
+    but I'm not sure.
+
+   Turn a string in input_line_pointer into a floating point constant of type
+   type, and store the appropriate bytes in *litP.  The number of LITTLENUMS
+   emitted is stored in *sizeP .  An error message is returned, or NULL on OK.
+ */
+
+/* Equal to MAX_PRECISION in atof-ieee.c */
+#define MAX_LITTLENUMS 6
+
+char *
+md_atof(type,litP,sizeP)
+    char type;
+    char *litP;
+    int *sizeP;
+{
+    int	prec;
+    LITTLENUM_TYPE words[MAX_LITTLENUMS];
+    LITTLENUM_TYPE *wordP;
+    char	*t;
+    char	*atof_ieee();
+
+    switch(type) {
+
+    case 'f':
+    case 'F':
+    case 's':
+    case 'S':
+	prec = 2;
+	break;
+
+    case 'd':
+    case 'D':
+    case 'r':
+    case 'R':
+	prec = 4;
+	break;
+
+    case 'x':
+    case 'X':
+	prec = 6;
+	break;
+
+    case 'p':
+    case 'P':
+	prec = 6;
+	break;
+
+    default:
+	*sizeP=0;
+	return "Bad call to MD_ATOF()";
+    }
+    t=atof_ieee(input_line_pointer,type,words);
+    if(t)
+	input_line_pointer=t;
+    *sizeP=prec * sizeof(LITTLENUM_TYPE);
+    for(wordP=words;prec--;) {
+	md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
+	litP+=sizeof(LITTLENUM_TYPE);
+    }
+    return "";	/* Someone should teach Dean about null pointers */
+}
+
+/*
+ * Write out big-endian.
+ */
+void
+md_number_to_chars(buf,val,n)
+    char *buf;
+    long val;
+    int n;
+{
+    switch(n) {
+
+    case 4:
+	*buf++ = val >> 24;
+	*buf++ = val >> 16;
+    case 2:
+	*buf++ = val >> 8;
+    case 1:
+	*buf = val;
+	break;
+
+    default:
+	abort();
+    }
+    return;
+}
+
+void md_number_to_imm(buf,val,n, fixP)
+    char *buf;
+    long val;
+    int n;
+    fixS *fixP;
+{
+    enum reloc_type reloc = fixP->fx_r_type & 0xf;
+    enum highlow_type highlow = (fixP->fx_r_type >> 4) & 0x3;
+
+    assert(buf);
+    assert(n == 4);	/* always on i860 */
+
+    switch(highlow)
+    {
+
+    case HIGHADJ:	/* adjusts the high-order 16-bits */
+	if (val & (1 << 15))
+	    val += (1 << 16);
+
+	    /*FALLTHROUGH*/
+
+    case HIGH:	/* selects the high-order 16-bits */
+	val >>= 16;
+	break;
+
+    case PAIR:	/* selects the low-order 16-bits */
+	val = val & 0xffff;
+	break;
+
+    default:
+	break;
+    }
+
+    switch(reloc)
+    {
+
+    case BRADDR:	/* br,call,bc,bc.t,bnc,bnc.t w/26-bit immediate */
+	if (fixP->fx_pcrel != 1)
+	    as_bad("26-bit branch w/o pc relative set: 0x%08x", val);
+	val >>= 2;	/* align pcrel offset, see manual */
+
+	if (val >= (1 << 25) || val < -(1 << 25))	/* check for overflow */
+	    as_bad("26-bit branch offset overflow: 0x%08x", val);
+	buf[0] = (buf[0] & 0xfc) | ((val >> 24) & 0x3);
+	buf[1] = val >> 16;
+	buf[2] = val >> 8;
+	buf[3] = val;
+	break;
+
+    case SPLIT2:	/* 16 bit immediate, 4-byte aligned */
+	if (val & 0x3)
+	    as_bad("16-bit immediate 4-byte alignment error: 0x%08x", val);
+	val &= ~0x3;	/* 4-byte align value */
+	/*FALLTHROUGH*/
+    case SPLIT1:	/* 16 bit immediate, 2-byte aligned */
+	if (val & 0x1)
+	    as_bad("16-bit immediate 2-byte alignment error: 0x%08x", val);
+	val &= ~0x1;	/* 2-byte align value */
+	/*FALLTHROUGH*/
+    case SPLIT0:	/* st,bla,bte,btne w/16-bit immediate */
+	if (fixP->fx_pcrel == 1)
+	    val >>= 2;	/* align pcrel offset, see manual */
+	/* check for bounds */
+	if (highlow != PAIR && (val >= (1 << 16) || val < -(1 << 15)))
+	    as_bad("16-bit branch offset overflow: 0x%08x", val);
+	buf[1] = (buf[1] & ~0x1f) | ((val >> 11) & 0x1f);
+	buf[2] = (buf[2] & ~0x7) | ((val >> 8) & 0x7);
+	buf[3] |= val;	/* perserve bottom opcode bits */	
+	break;
+
+    case LOW4:	/* fld,pfld,pst,flush 16-byte aligned */
+	if (val & 0xf)
+	    as_bad("16-bit immediate 16-byte alignment error: 0x%08x", val);
+	val &= ~0xf;	/* 16-byte align value */
+	/*FALLTHROUGH*/
+    case LOW3:	/* fld,pfld,pst,flush 8-byte aligned */
+	if (val & 0x7)
+	    as_bad("16-bit immediate 8-byte alignment error: 0x%08x", val);
+	val &= ~0x7;	/* 8-byte align value */
+	/*FALLTHROUGH*/
+    case LOW2:	/* 16 bit immediate, 4-byte aligned */
+	if (val & 0x3)
+	    as_bad("16-bit immediate 4-byte alignment error: 0x%08x", val);
+	val &= ~0x3;	/* 4-byte align value */
+	/*FALLTHROUGH*/
+    case LOW1:	/* 16 bit immediate, 2-byte aligned */
+	if (val & 0x1)
+	    as_bad("16-bit immediate 2-byte alignment error: 0x%08x", val);
+	val &= ~0x1;	/* 2-byte align value */
+	/*FALLTHROUGH*/
+    case LOW0:	/* 16 bit immediate, byte aligned */
+	/* check for bounds */
+	if (highlow != PAIR && (val >= (1 << 16) || val < -(1 << 15)))
+	    as_bad("16-bit immediate overflow: 0x%08x", val);
+	buf[2] = val >> 8;
+	buf[3] |= val;	/* perserve bottom opcode bits */	
+	break;
+
+    case NO_RELOC:
+    default:
+	as_bad("bad relocation type: 0x%02x", reloc);
+	break;
+    }
+    return;
+}
+
+/* should never be called for i860 */
+void
+md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
+    char *ptr;
+    long from_addr, to_addr;
+fragS *frag;
+symbolS *to_symbol;
+{
+    fprintf(stderr, "i860_create_short_jmp\n");
+    abort();
+}
+
+/* should never be called for i860 */
+void
+md_number_to_disp(buf,val,n)
+    char	*buf;
+    long	val;
+{
+    fprintf(stderr, "md_number_to_disp\n");
+    abort();
+}
+
+/* should never be called for i860 */
+void
+md_number_to_field(buf,val,fix)
+    char *buf;
+    long val;
+    void *fix;
+{
+    fprintf(stderr, "i860_number_to_field\n");
+    abort();
+}
+
+/* the bit-field entries in the relocation_info struct plays hell 
+   with the byte-order problems of cross-assembly.  So as a hack,
+   I added this mach. dependent ri twiddler.  Ugly, but it gets
+   you there. -KWK */
+/* on i860: first 4 bytes are normal unsigned long address, next three
+   bytes are index, most sig. byte first.  Byte 7 is broken up with
+   bit 7 as pcrel, bit 6 as extern, and the lower six bits as
+   relocation type (highlow 5-4).  Next 4 bytes are long addend. */
+/* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
+void
+md_ri_to_chars(ri_p, ri)
+     struct relocation_info *ri_p, ri;
+{
+#if 0
+  unsigned char the_bytes[sizeof(*ri_p)];
+  
+  /* this is easy */
+  md_number_to_chars(the_bytes, ri.r_address, sizeof(ri.r_address));
+  /* now the fun stuff */
+  the_bytes[4] = (ri.r_index >> 16) & 0x0ff;
+  the_bytes[5] = (ri.r_index >> 8) & 0x0ff;
+  the_bytes[6] = ri.r_index & 0x0ff;
+  the_bytes[7] = ((ri.r_extern << 7)  & 0x80) | (0 & 0x60) | (ri.r_type & 0x1F);
+  /* Also easy */
+  md_number_to_chars(&the_bytes[8], ri.r_addend, sizeof(ri.r_addend));
+  /* now put it back where you found it, Junior... */
+  bcopy (the_bytes, (char *)ri_p, sizeof(*ri_p));
+#endif
+}
+
+/* should never be called for i860 */
+void
+md_convert_frag(fragP)
+    register fragS *fragP;
+{
+    fprintf(stderr, "i860_convert_frag\n");
+    abort();
+}
+
+/* should never be called for i860 */
+void
+md_create_long_jump(ptr, from_addr, to_addr, frag, to_symbol)
+    char	*ptr;
+    long	from_addr,
+	        to_addr;
+    fragS	*frag;
+    symbolS	*to_symbol;
+{
+    fprintf(stderr, "i860_create_long_jump\n");
+    abort();
+}
+
+/* should never be called for i860 */
+int
+md_estimate_size_before_relax(fragP, segtype)
+    register fragS *fragP;
+segT segtype;
+{
+    fprintf(stderr, "i860_estimate_size_before_relax\n");
+    abort();
+    return 0;
+}
+
+/* for debugging only, must match enum reloc_type */
+static char *Reloc[] = {
+    "NO_RELOC",
+    "BRADDR", 
+    "LOW0", 
+    "LOW1", 
+    "LOW2", 
+    "LOW3", 
+    "LOW4", 
+    "SPLIT0", 
+    "SPLIT1", 
+    "SPLIT2", 
+    "RELOC_32", 
+};
+static char *Highlow[] = {
+    "NO_SPEC",
+    "PAIR", 
+    "HIGH", 
+    "HIGHADJ", 
+};
+static void
+print_insn(insn)
+    struct i860_it *insn;
+{
+    if (insn->error) {
+	fprintf(stderr, "ERROR: %s\n");
+    }
+    fprintf(stderr, "opcode=0x%08x\t", insn->opcode);
+    fprintf(stderr, "expand=0x%08x\t", insn->expand);
+    fprintf(stderr, "reloc = %s\t", Reloc[insn->reloc]);
+    fprintf(stderr, "highlow = %s\n", Highlow[insn->highlow]);
+    fprintf(stderr, "exp =  {\n");
+    fprintf(stderr, "\t\tX_add_symbol = %s\n",
+	insn->exp.X_add_symbol ?
+	(S_GET_NAME(insn->exp.X_add_symbol) ? 
+	S_GET_NAME(insn->exp.X_add_symbol) : "???") : "0");
+    fprintf(stderr, "\t\tX_sub_symbol = %s\n",
+	insn->exp.X_subtract_symbol ?
+	    (S_GET_NAME(insn->exp.X_subtract_symbol) ? 
+	        S_GET_NAME(insn->exp.X_subtract_symbol) : "???") : "0");
+    fprintf(stderr, "\t\tX_add_number = %d\n",
+	insn->exp.X_add_number);
+    fprintf(stderr, "}\n");
+    return;
+}
+
+int
+md_parse_option(argP,cntP,vecP)
+    char **argP;
+    int *cntP;
+    char ***vecP;
+{
+    return 1;
+}
+
+/*
+ * I860 relocations are completely different, so it needs
+ * this machine dependent routine to emit them.
+ */
+void
+emit_machine_reloc(fixP, segment_address_in_file)
+    register fixS *fixP;
+    relax_addressT segment_address_in_file;
+{
+    struct reloc_info_i860 ri;
+    register symbolS *symbolP;
+    extern char *next_object_file_charP;
+    long add_number;
+
+    bzero((char *) &ri, sizeof(ri));
+    for (; fixP; fixP = fixP->fx_next) {
+
+	if (fixP->fx_r_type & ~0x3f) {
+	    fprintf(stderr, "fixP->fx_r_type = %d\n", fixP->fx_r_type);
+	    abort();
+	}
+	ri.r_pcrel = fixP->fx_pcrel;
+	ri.r_type = fixP->fx_r_type;
+
+	if ((symbolP = fixP->fx_addsy) != NULL) {
+	    ri.r_address = fixP->fx_frag->fr_address +
+	        fixP->fx_where - segment_address_in_file;
+	    if ((symbolP->sy_type & N_TYPE) == N_UNDF) {
+		ri.r_extern = 1;
+		ri.r_symbolnum = symbolP->sy_number;
+	    } else {
+		ri.r_extern = 0;
+		ri.r_symbolnum = symbolP->sy_type & N_TYPE;
+	    }
+	    if (symbolP && symbolP->sy_frag) {
+		ri.r_addend = symbolP->sy_frag->fr_address;
+	    }
+	    ri.r_type = fixP->fx_r_type;
+	    if (fixP->fx_pcrel) {
+		/* preserve actual offset vs. pc + 4 */
+		ri.r_addend -= (ri.r_address + 4);
+	    } else {
+		ri.r_addend = fixP->fx_addnumber;
+	    }
+
+	    md_ri_to_chars((char *) &ri, ri);
+	    append(&next_object_file_charP, (char *)& ri, sizeof(ri));
+	}
+    }
+    return;
+}
+
+/* Parse an operand that is machine-specific.  
+   We just return without modifying the expression if we have nothing
+   to do.  */
+
+/* ARGSUSED */
+void
+md_operand (expressionP)
+     expressionS *expressionP;
+{
+}
+
+/* We have no need to default values of symbols.  */
+
+/* ARGSUSED */
+symbolS *
+md_undefined_symbol (name)
+     char *name;
+{
+  return 0;
+}
+
+/* Round up a section size to the appropriate boundary.  */
+long
+md_section_align (segment, size)
+     segT segment;
+     long size;
+{
+  return size;		/* Byte alignment is fine */
+}
+
+/* Exactly what point is a PC-relative offset relative TO?
+   On the i860, they're relative to the address of the offset, plus
+   its size. (??? Is this right?  FIXME-SOON!) */
+long
+md_pcrel_from (fixP)
+     fixS *fixP;
+{
+  return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
+}
+
+void
+md_apply_fix(fixP, val)
+    fixS *fixP;
+    long val;
+{
+	char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
+	
+	if (!fixP->fx_bit_fixP) {
+		
+		switch (fixP->fx_im_disp) {
+		case 0:
+			fixP->fx_addnumber = val;
+			md_number_to_imm(place, val, fixP->fx_size, fixP);
+			break;
+		case 1:
+			md_number_to_disp (place,
+					   fixP->fx_pcrel ? val+fixP->fx_pcrel_adjust:val,
+					   fixP->fx_size);
+			break;
+		case 2: /* fix requested for .long .word etc */
+			md_number_to_chars (place, val, fixP->fx_size);
+			break;
+		default:
+			as_fatal("Internal error in md_apply_fix() in file \"%s\"", __FILE__);
+		} /* OVE: maybe one ought to put _imm _disp _chars in one md-func */
+	} else {
+		md_number_to_field (place, val, fixP->fx_bit_fixP);
+	}
+	
+	return;
+} /* md_apply_fix() */
+
+/*
+ * $Log$
+ * Revision 1.1  1991/04/04 18:16:48  rich
+ * Initial revision
+ *
+ * Revision 1.2  1991/03/30  17:11:32  rich
+ * Updated md_create_short_jump calling protocol.
+ *
+ *
+ */
+
+/*
+ * Local Variables:
+ * fill-column: 131
+ * comment-column: 0
+ */
+
+/* end of i860.c */
diff --git a/gas/config/tc-i860.h b/gas/config/tc-i860.h
new file mode 100644
index 0000000..2fc6514
--- /dev/null
+++ b/gas/config/tc-i860.h
@@ -0,0 +1,14 @@
+/*
+ * This file is tc-i860.h.
+ */
+
+#define TC_I860 1
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of tc-i860.h */
diff --git a/gas/config/tc-i960.c b/gas/config/tc-i960.c
new file mode 100644
index 0000000..a32325b
--- /dev/null
+++ b/gas/config/tc-i960.c
@@ -0,0 +1,2800 @@
+/* i960.c - All the i80960-specific stuff
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+/* See comment on md_parse_option for 80960-specific invocation options. */
+
+/******************************************************************************
+ * i80690 NOTE!!!:
+ *	Header, symbol, and relocation info will be used on the host machine
+ *	only -- only executable code is actually downloaded to the i80960.
+ *	Therefore, leave all such information in host byte order.
+ *
+ *	(That's a slight lie -- we DO download some header information, but
+ *	the downloader converts the file format and corrects the byte-ordering
+ *	of the relevant fields while doing so.)
+ *
+ ***************************************************************************** */
+
+/* There are 4 different lengths of (potentially) symbol-based displacements
+ * in the 80960 instruction set, each of which could require address fix-ups
+ * and (in the case of external symbols) emission of relocation directives:
+ *
+ * 32-bit (MEMB)
+ *	This is a standard length for the base assembler and requires no
+ *	special action.
+ *
+ * 13-bit (COBR)
+ *	This is a non-standard length, but the base assembler has a hook for
+ *	bit field address fixups:  the fixS structure can point to a descriptor
+ *	of the field, in which case our md_number_to_field() routine gets called
+ *	to process it.
+ *
+ *	I made the hook a little cleaner by having fix_new() (in the base
+ *	assembler) return a pointer to the fixS in question.  And I made it a
+ *	little simpler by storing the field size (in this case 13) instead of
+ *	of a pointer to another structure:  80960 displacements are ALWAYS
+ *	stored in the low-order bits of a 4-byte word.
+ *
+ *	Since the target of a COBR cannot be external, no relocation directives
+ *	for this size displacement have to be generated.  But the base assembler
+ *	had to be modified to issue error messages if the symbol did turn out
+ *	to be external.
+ *
+ * 24-bit (CTRL)
+ *	Fixups are handled as for the 13-bit case (except that 24 is stored
+ *	in the fixS).
+ *
+ *	The relocation directive generated is the same as that for the 32-bit
+ *	displacement, except that it's PC-relative (the 32-bit displacement
+ *	never is).   The i80960 version of the linker needs a mod to
+ *	distinguish and handle the 24-bit case.
+ *
+ * 12-bit (MEMA)
+ *	MEMA formats are always promoted to MEMB (32-bit) if the displacement
+ *	is based on a symbol, because it could be relocated at link time.
+ *	The only time we use the 12-bit format is if an absolute value of
+ *	less than 4096 is specified, in which case we need neither a fixup nor
+ *	a relocation directive.
+ */
+
+#include <stdio.h>
+#include <ctype.h>
+
+#include "as.h"
+
+#include "obstack.h"
+
+#include "i960-opcode.h"
+
+extern char *input_line_pointer;
+extern struct hash_control *po_hash;
+extern unsigned char nbytes_r_length[];
+extern char *next_object_file_charP;
+
+#ifdef OBJ_COFF
+int md_reloc_size = sizeof(struct reloc);
+#else /* OBJ_COFF */
+int md_reloc_size = sizeof(struct relocation_info);
+#endif /* OBJ_COFF */
+
+#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
+#ifdef __STDC__
+
+static void emit_machine_reloc(fixS *fixP, relax_addressT segment_address_in_file);
+
+#else /* __STDC__ */
+
+static void emit_machine_reloc();
+
+#endif /* __STDC__ */
+
+void (*md_emit_relocations)() = emit_machine_reloc;
+#endif /* OBJ_AOUT or OBJ_BOUT */
+
+	/***************************
+	 *  Local i80960 routines  *
+	 ************************** */
+
+static void	brcnt_emit();	/* Emit branch-prediction instrumentation code */
+static char *	brlab_next();	/* Return next branch local label */
+       void	brtab_emit();	/* Emit br-predict instrumentation table */
+static void	cobr_fmt();	/* Generate COBR instruction */
+static void	ctrl_fmt();	/* Generate CTRL instruction */
+static char *	emit();		/* Emit (internally) binary */
+static int get_args();	/* Break arguments out of comma-separated list */
+static void	get_cdisp();	/* Handle COBR or CTRL displacement */
+static char *	get_ispec();	/* Find index specification string */
+static int get_regnum();	/* Translate text to register number */
+static int i_scan();	/* Lexical scan of instruction source */
+static void	mem_fmt();	/* Generate MEMA or MEMB instruction */
+static void	mema_to_memb();	/* Convert MEMA instruction to MEMB format */
+static segT	parse_expr();	/* Parse an expression */
+static int parse_ldconst();/* Parse and replace a 'ldconst' pseudo-op */
+static void	parse_memop();	/* Parse a memory operand */
+static void	parse_po();	/* Parse machine-dependent pseudo-op */
+static void	parse_regop();	/* Parse a register operand */
+static void	reg_fmt();	/* Generate a REG format instruction */
+       void	reloc_callj();	/* Relocate a 'callj' instruction */
+static void	relax_cobr();	/* "De-optimize" cobr into compare/branch */
+static void	s_leafproc();	/* Process '.leafproc' pseudo-op */
+static void	s_sysproc();	/* Process '.sysproc' pseudo-op */
+static int shift_ok();	/* Will a 'shlo' substiture for a 'ldconst'? */
+static void	syntax();	/* Give syntax error */
+static int targ_has_sfr();	/* Target chip supports spec-func register? */
+static int targ_has_iclass();/* Target chip supports instruction set? */
+/* static void	unlink_sym(); */	/* Remove a symbol from the symbol list */
+
+/* See md_parse_option() for meanings of these options */
+static char norelax = 0;		/* True if -norelax switch seen */
+static char instrument_branches = 0;	/* True if -b switch seen */
+
+/* Characters that always start a comment.
+ * If the pre-processor is disabled, these aren't very useful.
+ */
+char comment_chars[] = "#";
+
+/* Characters that only start a comment at the beginning of
+ * a line.  If the line seems to have the form '# 123 filename'
+ * .line and .file directives will appear in the pre-processed output.
+ *
+ * Note that input_file.c hand checks for '#' at the beginning of the
+ * first line of the input file.  This is because the compiler outputs
+ * #NO_APP at the beginning of its output.
+ */
+
+/* Also note that comments started like this one will always work. */
+
+char line_comment_chars[] = "";
+
+/* Chars that can be used to separate mant from exp in floating point nums */
+char EXP_CHARS[] = "eE";
+
+/* Chars that mean this number is a floating point constant,
+ * as in 0f12.456 or 0d1.2345e12
+ */
+char FLT_CHARS[] = "fFdDtT";
+
+
+/* Table used by base assembler to relax addresses based on varying length
+ * instructions.  The fields are:
+ *   1) most positive reach of this state,
+ *   2) most negative reach of this state,
+ *   3) how many bytes this mode will add to the size of the current frag
+ *   4) which index into the table to try if we can't fit into this one.
+ *
+ * For i80960, the only application is the (de-)optimization of cobr
+ * instructions into separate compare and branch instructions when a 13-bit
+ * displacement won't hack it.
+ */
+const relax_typeS
+md_relax_table[] = {
+	{0,         0,        0,0}, /* State 0 => no more relaxation possible */
+	{4088,      -4096,    0,2}, /* State 1: conditional branch (cobr) */
+	{0x800000-8,-0x800000,4,0}, /* State 2: compare (reg) & branch (ctrl) */
+};
+
+
+/* These are the machine dependent pseudo-ops.
+ *
+ * This table describes all the machine specific pseudo-ops the assembler
+ * has to support.  The fields are:
+ *	pseudo-op name without dot
+ *	function to call to execute this pseudo-op
+ *	integer arg to pass to the function
+ */
+#define S_LEAFPROC	1
+#define S_SYSPROC	2
+
+const pseudo_typeS
+md_pseudo_table[] = {
+
+	{ "bss",	s_lcomm,	1 },
+	{ "extended",	float_cons,	't' },
+	{ "leafproc",	parse_po,	S_LEAFPROC },
+	{ "sysproc",	parse_po,	S_SYSPROC },
+
+	{ "word",	cons,		4 },
+	{ "quad",	big_cons,	16 },
+
+	{ 0,		0,		0 }
+};
+
+/* Macros to extract info from an 'expressionS' structure 'e' */
+#define adds(e)	e.X_add_symbol
+#define subs(e)	e.X_subtract_symbol
+#define offs(e)	e.X_add_number
+#define segs(e)	e.X_seg
+
+
+/* Branch-prediction bits for CTRL/COBR format opcodes */
+#define BP_MASK		0x00000002  /* Mask for branch-prediction bit */
+#define BP_TAKEN	0x00000000  /* Value to OR in to predict branch */
+#define BP_NOT_TAKEN	0x00000002  /* Value to OR in to predict no branch */
+
+
+/* Some instruction opcodes that we need explicitly */
+#define BE	0x12000000
+#define BG	0x11000000
+#define BGE	0x13000000
+#define BL	0x14000000
+#define BLE	0x16000000
+#define BNE	0x15000000
+#define BNO	0x10000000
+#define BO	0x17000000
+#define CHKBIT	0x5a002700
+#define CMPI	0x5a002080
+#define CMPO	0x5a002000
+
+#define B	0x08000000
+#define BAL	0x0b000000
+#define CALL	0x09000000
+#define CALLS	0x66003800
+#define RET	0x0a000000
+
+
+/* These masks are used to build up a set of MEMB mode bits. */
+#define	A_BIT		0x0400
+#define	I_BIT		0x0800
+#define MEMB_BIT	0x1000
+#define	D_BIT		0x2000
+
+
+/* Mask for the only mode bit in a MEMA instruction (if set, abase reg is used) */
+#define MEMA_ABASE	0x2000
+
+/* Info from which a MEMA or MEMB format instruction can be generated */
+typedef struct {
+	long opcode;	/* (First) 32 bits of instruction */
+	int disp;	/* 0-(none), 12- or, 32-bit displacement needed */
+	char *e;	/* The expression in the source instruction from
+			 *	which the displacement should be determined
+			 */
+} memS;
+
+
+/* The two pieces of info we need to generate a register operand */
+struct regop {
+	int mode;	/* 0 =>local/global/spec reg; 1=> literal or fp reg */
+	int special;	/* 0 =>not a sfr;  1=> is a sfr (not valid w/mode=0) */
+	int n;		/* Register number or literal value */
+};
+
+
+/* Number and assembler mnemonic for all registers that can appear in operands */
+static struct {
+	char *reg_name;
+	int reg_num;
+} regnames[] = {
+	{ "pfp",  0 }, { "sp",   1 }, { "rip",  2 }, { "r3",   3 },
+	{ "r4",   4 }, { "r5",   5 }, { "r6",   6 }, { "r7",   7 },
+	{ "r8",   8 }, { "r9",   9 }, { "r10", 10 }, { "r11", 11 },
+	{ "r12", 12 }, { "r13", 13 }, { "r14", 14 }, { "r15", 15 },
+	{ "g0",  16 }, { "g1",  17 }, { "g2",  18 }, { "g3",  19 },
+	{ "g4",  20 }, { "g5",  21 }, { "g6",  22 }, { "g7",  23 },
+	{ "g8",  24 }, { "g9",  25 }, { "g10", 26 }, { "g11", 27 },
+	{ "g12", 28 }, { "g13", 29 }, { "g14", 30 }, { "fp",  31 },
+
+	/* Numbers for special-function registers are for assembler internal
+	 * use only: they are scaled back to range [0-31] for binary output.
+	 */
+#	define SF0	32
+
+	{ "sf0", 32 }, { "sf1", 33 }, { "sf2", 34 }, { "sf3", 35 },
+	{ "sf4", 36 }, { "sf5", 37 }, { "sf6", 38 }, { "sf7", 39 },
+	{ "sf8", 40 }, { "sf9", 41 }, { "sf10",42 }, { "sf11",43 },
+	{ "sf12",44 }, { "sf13",45 }, { "sf14",46 }, { "sf15",47 },
+	{ "sf16",48 }, { "sf17",49 }, { "sf18",50 }, { "sf19",51 },
+	{ "sf20",52 }, { "sf21",53 }, { "sf22",54 }, { "sf23",55 },
+	{ "sf24",56 }, { "sf25",57 }, { "sf26",58 }, { "sf27",59 },
+	{ "sf28",60 }, { "sf29",61 }, { "sf30",62 }, { "sf31",63 },
+
+	/* Numbers for floating point registers are for assembler internal use
+	 * only: they are scaled back to [0-3] for binary output.
+	 */
+#	define FP0	64
+
+	{ "fp0", 64 }, { "fp1", 65 }, { "fp2", 66 }, { "fp3", 67 },
+
+	{ NULL,  0 },		/* END OF LIST */
+};
+
+#define	IS_RG_REG(n)	((0 <= (n)) && ((n) < SF0))
+#define	IS_SF_REG(n)	((SF0 <= (n)) && ((n) < FP0))
+#define	IS_FP_REG(n)	((n) >= FP0)
+
+/* Number and assembler mnemonic for all registers that can appear as 'abase'
+ * (indirect addressing) registers.
+ */
+static struct {
+	char *areg_name;
+	int areg_num;
+} aregs[] = {
+	{ "(pfp)",  0 }, { "(sp)",   1 }, { "(rip)",  2 }, { "(r3)",   3 },
+	{ "(r4)",   4 }, { "(r5)",   5 }, { "(r6)",   6 }, { "(r7)",   7 },
+	{ "(r8)",   8 }, { "(r9)",   9 }, { "(r10)", 10 }, { "(r11)", 11 },
+	{ "(r12)", 12 }, { "(r13)", 13 }, { "(r14)", 14 }, { "(r15)", 15 },
+	{ "(g0)",  16 }, { "(g1)",  17 }, { "(g2)",  18 }, { "(g3)",  19 },
+	{ "(g4)",  20 }, { "(g5)",  21 }, { "(g6)",  22 }, { "(g7)",  23 },
+	{ "(g8)",  24 }, { "(g9)",  25 }, { "(g10)", 26 }, { "(g11)", 27 },
+	{ "(g12)", 28 }, { "(g13)", 29 }, { "(g14)", 30 }, { "(fp)",  31 },
+
+#	define IPREL	32
+	/* for assembler internal use only: this number never appears in binary
+	 * output.
+	 */
+	{ "(ip)", IPREL },
+
+	{ NULL,  0 },		/* END OF LIST */
+};
+
+
+/* Hash tables */
+static struct hash_control *op_hash = NULL;	/* Opcode mnemonics */
+static struct hash_control *reg_hash = NULL;	/* Register name hash table */
+static struct hash_control *areg_hash = NULL;	/* Abase register hash table */
+
+
+/* Architecture for which we are assembling */
+#define ARCH_ANY	0	/* Default: no architecture checking done */
+#define ARCH_KA		1
+#define ARCH_KB		2
+#define ARCH_MC		3
+#define ARCH_CA		4
+int architecture = ARCH_ANY;	/* Architecture requested on invocation line */
+int iclasses_seen = 0;		/* OR of instruction classes (I_* constants)
+				 *	for which we've actually assembled
+				 *	instructions.
+				 */
+
+
+/* BRANCH-PREDICTION INSTRUMENTATION
+ *
+ *	The following supports generation of branch-prediction instrumentation
+ *	(turned on by -b switch).  The instrumentation collects counts
+ *	of branches taken/not-taken for later input to a utility that will
+ *	set the branch prediction bits of the instructions in accordance with
+ *	the behavior observed.  (Note that the KX series does not have
+ *	brach-prediction.)
+ *
+ *	The instrumentation consists of:
+ *
+ *	(1) before and after each conditional branch, a call to an external
+ *	    routine that increments and steps over an inline counter.  The
+ *	    counter itself, initialized to 0, immediately follows the call
+ *	    instruction.  For each branch, the counter following the branch
+ *	    is the number of times the branch was not taken, and the difference
+ *	    between the counters is the number of times it was taken.  An
+ *	    example of an instrumented conditional branch:
+ *
+ *				call	BR_CNT_FUNC
+ *				.word	0
+ *		LBRANCH23:	be	label
+ *				call	BR_CNT_FUNC
+ *				.word	0
+ *
+ *	(2) a table of pointers to the instrumented branches, so that an
+ *	    external postprocessing routine can locate all of the counters.
+ *	    the table begins with a 2-word header: a pointer to the next in
+ *	    a linked list of such tables (initialized to 0);  and a count
+ *	    of the number of entries in the table (exclusive of the header.
+ *
+ *	    Note that input source code is expected to already contain calls
+ *	    an external routine that will link the branch local table into a
+ *	    list of such tables.
+ */
+
+static int br_cnt = 0;		/* Number of branches instrumented so far.
+				 * Also used to generate unique local labels
+				 * for each instrumented branch
+				 */
+
+#define BR_LABEL_BASE	"LBRANCH"
+				/* Basename of local labels on instrumented
+				 * branches, to avoid conflict with compiler-
+				 * generated local labels.
+				 */
+
+#define BR_CNT_FUNC	"__inc_branch"
+				/* Name of the external routine that will
+				 * increment (and step over) an inline counter.
+				 */
+
+#define BR_TAB_NAME	"__BRANCH_TABLE__"
+				/* Name of the table of pointers to branches.
+				 * A local (i.e., non-external) symbol.
+				 */
+
+/*****************************************************************************
+ * md_begin:  One-time initialization.
+ *
+ *	Set up hash tables.
+ *
+ **************************************************************************** */
+void
+md_begin()
+{
+	int i;				/* Loop counter */
+	const struct i960_opcode *oP; /* Pointer into opcode table */
+	char *retval;			/* Value returned by hash functions */
+
+	if (((op_hash = hash_new()) == 0)
+	    || ((reg_hash = hash_new()) == 0)
+	    || ((areg_hash = hash_new()) == 0)) {
+		as_fatal("virtual memory exceeded");
+	}
+
+	retval = "";	/* For some reason, the base assembler uses an empty
+			 * string for "no error message", instead of a NULL
+			 * pointer.
+			 */
+
+	for (oP=i960_opcodes; oP->name && !*retval; oP++) {
+		retval = hash_insert(op_hash, oP->name, oP);
+	}
+
+	for (i=0; regnames[i].reg_name && !*retval; i++) {
+		retval = hash_insert(reg_hash, regnames[i].reg_name,
+				     &regnames[i].reg_num);
+	}
+
+	for (i=0; aregs[i].areg_name && !*retval; i++){
+		retval = hash_insert(areg_hash, aregs[i].areg_name,
+				     &aregs[i].areg_num);
+	}
+
+	if (*retval) {
+		as_fatal("Hashing returned \"%s\".", retval);
+	}
+} /* md_begin() */
+
+/*****************************************************************************
+ * md_end:  One-time final cleanup
+ *
+ *	None necessary
+ *
+ **************************************************************************** */
+void
+md_end()
+{
+}
+
+/*****************************************************************************
+ * md_assemble:  Assemble an instruction
+ *
+ * Assumptions about the passed-in text:
+ *	- all comments, labels removed
+ *	- text is an instruction
+ *	- all white space compressed to single blanks
+ *	- all character constants have been replaced with decimal
+ *
+ **************************************************************************** */
+void
+md_assemble(textP)
+    char *textP;	/* Source text of instruction */
+{
+	char *args[4];	/* Parsed instruction text, containing NO whitespace:
+			 *	arg[0]->opcode mnemonic
+			 *	arg[1-3]->operands, with char constants
+			 *			replaced by decimal numbers
+			 */
+	int n_ops;	/* Number of instruction operands */
+
+	struct i960_opcode *oP;
+			/* Pointer to instruction description */
+	int branch_predict;
+			/* TRUE iff opcode mnemonic included branch-prediction
+			 *	suffix (".f" or ".t")
+			 */
+	long bp_bits;	/* Setting of branch-prediction bit(s) to be OR'd
+			 *	into instruction opcode of CTRL/COBR format
+			 *	instructions.
+			 */
+	int n;		/* Offset of last character in opcode mnemonic */
+
+	static const char bp_error_msg[] = "branch prediction invalid on this opcode";
+
+
+	/* Parse instruction into opcode and operands */
+	bzero(args, sizeof(args));
+	n_ops = i_scan(textP, args);
+	if (n_ops == -1){
+		return;		/* Error message already issued */
+	}
+
+	/* Do "macro substitution" (sort of) on 'ldconst' pseudo-instruction */
+	if (!strcmp(args[0],"ldconst")){
+		n_ops = parse_ldconst(args);
+		if (n_ops == -1){
+			return;
+		}
+	}
+
+	/* Check for branch-prediction suffix on opcode mnemonic, strip it off */
+	n = strlen(args[0]) - 1;
+	branch_predict = 0;
+	bp_bits = 0;
+	if (args[0][n-1] == '.' && (args[0][n] == 't' || args[0][n] == 'f')){
+		/* We could check here to see if the target architecture
+		 * supports branch prediction, but why bother?  The bit
+		 * will just be ignored by processors that don't use it.
+		 */
+		branch_predict = 1;
+		bp_bits = (args[0][n] == 't') ? BP_TAKEN : BP_NOT_TAKEN;
+		args[0][n-1] = '\0';	/* Strip suffix from opcode mnemonic */
+	}
+
+	/* Look up opcode mnemonic in table and check number of operands.
+	 * Check that opcode is legal for the target architecture.
+	 * If all looks good, assemble instruction.
+	 */
+	oP = (struct i960_opcode *) hash_find(op_hash, args[0]);
+	if (!oP || !targ_has_iclass(oP->iclass)) {
+		as_bad("invalid opcode, \"%s\".", args[0]);
+
+	} else if (n_ops != oP->num_ops) {
+		as_bad("improper number of operands.  expecting %d, got %d", oP->num_ops, n_ops);
+
+	} else {
+		switch (oP->format){
+		case FBRA:
+		case CTRL:
+			ctrl_fmt(args[1], oP->opcode | bp_bits, oP->num_ops);
+			if (oP->format == FBRA){
+				/* Now generate a 'bno' to same arg */
+				ctrl_fmt(args[1], BNO | bp_bits, 1);
+			}
+			break;
+		case COBR:
+		case COJ:
+			cobr_fmt(args, oP->opcode | bp_bits, oP);
+			break;
+		case REG:
+			if (branch_predict){
+				as_warn(bp_error_msg);
+			}
+			reg_fmt(args, oP);
+			break;
+		case MEM1:
+		case MEM2:
+		case MEM4:
+		case MEM8:
+		case MEM12:
+		case MEM16:
+			if (branch_predict){
+				as_warn(bp_error_msg);
+			}
+			mem_fmt(args, oP);
+			break;
+		case CALLJ:
+			if (branch_predict){
+				as_warn(bp_error_msg);
+			}
+			/* Output opcode & set up "fixup" (relocation);
+			 * flag relocation as 'callj' type.
+			 */
+			know(oP->num_ops == 1);
+			get_cdisp(args[1], "CTRL", oP->opcode, 24, 0, 1);
+			break;
+		default:
+			BAD_CASE(oP->format);
+			break;
+		}
+	}
+} /* md_assemble() */
+
+/*****************************************************************************
+ * md_number_to_chars:  convert a number to target byte order
+ *
+ **************************************************************************** */
+void
+md_number_to_chars(buf, value, n)
+    char *buf;		/* Put output here */
+    long value;		/* The integer to be converted */
+    int n;		/* Number of bytes to output (significant bytes
+			 *	in 'value')
+			 */
+{
+	while (n--){
+		*buf++ = value;
+		value >>= 8;
+	}
+
+	/* XXX line number probably botched for this warning message. */
+	if (value != 0 && value != -1){
+		as_bad("Displacement too long for instruction field length.");
+	}
+} /* md_number_to_chars() */
+
+/*****************************************************************************
+ * md_chars_to_number:  convert from target byte order to host byte order.
+ *
+ **************************************************************************** */
+int
+md_chars_to_number(val, n)
+    unsigned char *val;	/* Value in target byte order */
+    int n;		/* Number of bytes in the input */
+{
+	int retval;
+
+	for (retval=0; n--;){
+		retval <<= 8;
+		retval |= val[n];
+	}
+	return retval;
+}
+
+
+#define MAX_LITTLENUMS	6
+#define LNUM_SIZE	sizeof(LITTLENUM_TYPE)
+
+/*****************************************************************************
+ * md_atof:	convert ascii to floating point
+ *
+ * Turn a string at input_line_pointer into a floating point constant of type
+ * 'type', and store the appropriate bytes at *litP.  The number of LITTLENUMS
+ * emitted is returned at 'sizeP'.  An error message is returned, or a pointer
+ * to an empty message if OK.
+ *
+ * Note we call the i386 floating point routine, rather than complicating
+ * things with more files or symbolic links.
+ *
+ **************************************************************************** */
+char * md_atof(type, litP, sizeP)
+int type;
+char *litP;
+int *sizeP;
+{
+	LITTLENUM_TYPE words[MAX_LITTLENUMS];
+	LITTLENUM_TYPE *wordP;
+	int prec;
+	char *t;
+	char *atof_ieee();
+
+	switch(type) {
+	case 'f':
+	case 'F':
+		prec = 2;
+		break;
+
+	case 'd':
+	case 'D':
+		prec = 4;
+		break;
+
+	case 't':
+	case 'T':
+		prec = 5;
+		type = 'x';	/* That's what atof_ieee() understands */
+		break;
+
+	default:
+		*sizeP=0;
+		return "Bad call to md_atof()";
+	}
+
+	t = atof_ieee(input_line_pointer, type, words);
+	if (t){
+		input_line_pointer = t;
+	}
+
+	*sizeP = prec * LNUM_SIZE;
+
+	/* Output the LITTLENUMs in REVERSE order in accord with i80960
+	 * word-order.  (Dunno why atof_ieee doesn't do it in the right
+	 * order in the first place -- probably because it's a hack of
+	 * atof_m68k.)
+	 */
+
+	for(wordP = words + prec - 1; prec--;){
+		md_number_to_chars(litP, (long) (*wordP--), LNUM_SIZE);
+		litP += sizeof(LITTLENUM_TYPE);
+	}
+
+	return "";	/* Someone should teach Dean about null pointers */
+}
+
+
+/*****************************************************************************
+ * md_number_to_imm
+ *
+ **************************************************************************** */
+void
+md_number_to_imm(buf, val, n)
+    char *buf;
+    long val;
+    int n;
+{
+	md_number_to_chars(buf, val, n);
+}
+
+
+/*****************************************************************************
+ * md_number_to_disp
+ *
+ **************************************************************************** */
+void
+md_number_to_disp(buf, val, n)
+    char *buf;
+    long val;
+    int n;
+{
+	md_number_to_chars(buf, val, n);
+}
+
+/*****************************************************************************
+ * md_number_to_field:
+ *
+ *	Stick a value (an address fixup) into a bit field of
+ *	previously-generated instruction.
+ *
+ **************************************************************************** */
+void
+md_number_to_field(instrP, val, bfixP)
+     char *instrP;	/* Pointer to instruction to be fixed */
+     long val;		/* Address fixup value */
+     bit_fixS *bfixP;	/* Description of bit field to be fixed up */
+{
+	int numbits;	/* Length of bit field to be fixed */
+	long instr;	/* 32-bit instruction to be fixed-up */
+	long sign;	/* 0 or -1, according to sign bit of 'val' */
+
+	/* Convert instruction back to host byte order
+	 */
+	instr = md_chars_to_number(instrP, 4);
+
+	/* Surprise! -- we stored the number of bits
+	 * to be modified rather than a pointer to a structure.
+	 */
+	numbits = (int)bfixP;
+	if (numbits == 1){
+		/* This is a no-op, stuck here by reloc_callj() */
+		return;
+	}
+
+	know ((numbits==13) || (numbits==24));
+
+	/* Propagate sign bit of 'val' for the given number of bits.
+	 * Result should be all 0 or all 1
+	 */
+	sign = val >> ((int)numbits - 1);
+	if (((val < 0) && (sign != -1))
+	||   ((val > 0) && (sign != 0))){
+		  as_bad("Fixup of %d too large for field width of %d",
+							val, numbits);
+	} else {
+		/* Put bit field into instruction and write back in target
+		 * byte order.
+		 */
+		val &= ~(-1 << (int)numbits);	/* Clear unused sign bits */
+		instr |= val;
+		md_number_to_chars(instrP, instr, 4);
+	}
+} /* md_number_to_field() */
+
+
+/*****************************************************************************
+ * md_parse_option
+ *	Invocation line includes a switch not recognized by the base assembler.
+ *	See if it's a processor-specific option.  For the 960, these are:
+ *
+ *	-norelax:
+ *		Conditional branch instructions that require displacements
+ *		greater than 13 bits (or that have external targets) should
+ *		generate errors.  The default is to replace each such
+ *		instruction with the corresponding compare (or chkbit) and
+ *		branch instructions.  Note that the Intel "j" cobr directives
+ *		are ALWAYS "de-optimized" in this way when necessary,
+ *		regardless of the setting of this option.
+ *
+ *	-b:
+ *		Add code to collect information about branches taken, for
+ *		later optimization of branch prediction bits by a separate
+ *		tool.  COBR and CNTL format instructions have branch
+ *		prediction bits (in the CX architecture);  if "BR" represents
+ *		an instruction in one of these classes, the following rep-
+ *		resents the code generated by the assembler:
+ *
+ *			call	<increment routine>
+ *			.word	0	# pre-counter
+ *		Label:  BR
+ *			call	<increment routine>
+ *			.word	0	# post-counter
+ *
+ *		A table of all such "Labels" is also generated.
+ *
+ *
+ *	-AKA, -AKB, -AKC, -ASA, -ASB, -AMC, -ACA:
+ *		Select the 80960 architecture.  Instructions or features not
+ *		supported by the selected architecture cause fatal errors.
+ *		The default is to generate code for any instruction or feature
+ *		that is supported by SOME version of the 960 (even if this
+ *		means mixing architectures!).
+ *
+ **************************************************************************** */
+int
+md_parse_option(argP, cntP, vecP)
+    char **argP;
+    int *cntP;
+    char ***vecP;
+{
+	char *p;
+	struct tabentry { char *flag; int arch; };
+	static struct tabentry arch_tab[] = {
+		"KA", ARCH_KA,
+		"KB", ARCH_KB,
+		"SA", ARCH_KA,  /* Synonym for KA */
+		"SB", ARCH_KB,  /* Synonym for KB */
+		"KC", ARCH_MC,  /* Synonym for MC */
+		"MC", ARCH_MC,
+		"CA", ARCH_CA,
+		NULL, 0
+	};
+	struct tabentry *tp;
+
+	if (!strcmp(*argP,"norelax")){
+		norelax = 1;
+
+	} else if (**argP == 'b'){
+		instrument_branches = 1;
+
+	} else if (**argP == 'A'){
+		p = (*argP) + 1;
+
+		for (tp = arch_tab; tp->flag != NULL; tp++){
+			if (!strcmp(p,tp->flag)){
+				break;
+			}
+		}
+
+		if (tp->flag == NULL){
+			as_bad("unknown architecture: %s", p);
+		} else {
+			architecture = tp->arch;
+		}
+	} else {
+		/* Unknown option */
+		(*argP)++;
+		return 0;
+	}
+	**argP = '\0';	/* Done parsing this switch */
+	return 1;
+}
+
+/*****************************************************************************
+ * md_convert_frag:
+ *	Called by base assembler after address relaxation is finished:  modify
+ *	variable fragments according to how much relaxation was done.
+ *
+ *	If the fragment substate is still 1, a 13-bit displacement was enough
+ *	to reach the symbol in question.  Set up an address fixup, but otherwise
+ *	leave the cobr instruction alone.
+ *
+ *	If the fragment substate is 2, a 13-bit displacement was not enough.
+ *	Replace the cobr with a two instructions (a compare and a branch).
+ *
+ **************************************************************************** */
+void
+md_convert_frag(fragP)
+    fragS * fragP;
+{
+	fixS *fixP;	/* Structure describing needed address fix */
+
+	switch (fragP->fr_subtype){
+	case 1:
+		/* LEAVE SINGLE COBR INSTRUCTION */
+		fixP = fix_new(fragP,
+			       fragP->fr_opcode-fragP->fr_literal,
+			       4,
+			       fragP->fr_symbol,
+			       0,
+			       fragP->fr_offset,
+			       1,
+			       0);
+
+		fixP->fx_bit_fixP = (bit_fixS *) 13;	/* size of bit field */
+		break;
+	case 2:
+		/* REPLACE COBR WITH COMPARE/BRANCH INSTRUCTIONS */
+		relax_cobr(fragP);
+		break;
+	default:
+		BAD_CASE(fragP->fr_subtype);
+		break;
+	}
+}
+
+/*****************************************************************************
+ * md_estimate_size_before_relax:  How much does it look like *fragP will grow?
+ *
+ *	Called by base assembler just before address relaxation.
+ *	Return the amount by which the fragment will grow.
+ *
+ *	Any symbol that is now undefined will not become defined; cobr's
+ *	based on undefined symbols will have to be replaced with a compare
+ *	instruction and a branch instruction, and the code fragment will grow
+ *	by 4 bytes.
+ *
+ **************************************************************************** */
+int
+md_estimate_size_before_relax(fragP, segment_type)
+     register fragS *fragP;
+     register segT segment_type;
+{
+	/* If symbol is undefined in this segment, go to "relaxed" state
+	 * (compare and branch instructions instead of cobr) right now.
+	 */
+	if (S_GET_SEGMENT(fragP->fr_symbol) != segment_type) {
+		relax_cobr(fragP);
+		return 4;
+	}
+	return 0;
+} /* md_estimate_size_before_relax() */
+
+
+/*****************************************************************************
+ * md_ri_to_chars:
+ *	This routine exists in order to overcome machine byte-order problems
+ *	when dealing with bit-field entries in the relocation_info struct.
+ *
+ *	But relocation info will be used on the host machine only (only
+ *	executable code is actually downloaded to the i80960).  Therefore,
+ *	we leave it in host byte order.
+ *
+ **************************************************************************** */
+void md_ri_to_chars(the_bytes, ri)
+char *the_bytes;
+struct reloc_info_generic *ri;
+{
+	struct relocation_info br;
+
+	(void) bzero(&br, sizeof(br));
+
+	br.r_address = ri->r_address;
+	br.r_index = ri->r_index;
+	br.r_pcrel = ri->r_pcrel;
+	br.r_length = ri->r_length;
+	br.r_extern = ri->r_extern;
+	br.r_bsr = ri->r_bsr;
+	br.r_disp = ri->r_disp;
+	br.r_callj = ri->r_callj;
+
+	*((struct relocation_info *) the_bytes) = br;
+} /* md_ri_to_chars() */
+
+
+#ifndef WORKING_DOT_WORD
+
+int md_short_jump_size = 0;
+int md_long_jump_size = 0;
+
+void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
+char *ptr;
+long from_addr;
+long to_addr;
+fragS *frag;
+symbolS *to_symbol;
+{
+	abort();
+}
+
+void
+md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)
+    char *ptr;
+    long from_addr, to_addr;
+    fragS *frag;
+    symbolS *to_symbol;
+{
+	abort();
+}
+#endif
+
+	/*************************************************************
+	 *                                                           *
+	 *  FOLLOWING ARE THE LOCAL ROUTINES, IN ALPHABETICAL ORDER  *
+	 *                                                           *
+	 ************************************************************ */
+
+
+
+/*****************************************************************************
+ * brcnt_emit:	Emit code to increment inline branch counter.
+ *
+ *	See the comments above the declaration of 'br_cnt' for details on
+ *	branch-prediction instrumentation.
+ **************************************************************************** */
+static void
+brcnt_emit()
+{
+	ctrl_fmt(BR_CNT_FUNC,CALL,1);/* Emit call to "increment" routine */
+	emit(0);		/* Emit inline counter to be incremented */
+}
+
+/*****************************************************************************
+ * brlab_next:	generate the next branch local label
+ *
+ *	See the comments above the declaration of 'br_cnt' for details on
+ *	branch-prediction instrumentation.
+ **************************************************************************** */
+static char *
+brlab_next()
+{
+	static char buf[20];
+
+	sprintf(buf, "%s%d", BR_LABEL_BASE, br_cnt++);
+	return buf;
+}
+
+/*****************************************************************************
+ * brtab_emit:	generate the fetch-prediction branch table.
+ *
+ *	See the comments above the declaration of 'br_cnt' for details on
+ *	branch-prediction instrumentation.
+ *
+ *	The code emitted here would be functionally equivalent to the following
+ *	example assembler source.
+ *
+ *			.data
+ *			.align	2
+ *	   BR_TAB_NAME:
+ *			.word	0		# link to next table
+ *			.word	3		# length of table
+ *			.word	LBRANCH0	# 1st entry in table proper
+ *			.word	LBRANCH1
+ *			.word	LBRANCH2
+ ***************************************************************************** */
+void
+brtab_emit()
+{
+	int i;
+	char buf[20];
+	char *p;		/* Where the binary was output to */
+	fixS *fixP;		/*->description of deferred address fixup */
+
+	if (!instrument_branches){
+		return;
+	}
+
+	subseg_new(SEG_DATA,0);		/* 	.data */
+	frag_align(2,0);		/* 	.align 2 */
+	record_alignment(now_seg,2);
+	colon(BR_TAB_NAME);		/* BR_TAB_NAME: */
+	emit(0);			/* 	.word 0	#link to next table */
+	emit(br_cnt);			/*	.word n #length of table */
+
+	for (i=0; i<br_cnt; i++){
+		sprintf(buf, "%s%d", BR_LABEL_BASE, i);
+		p = emit(0);
+		fixP = fix_new(frag_now,
+			       p - frag_now->fr_literal,
+			       4,
+			       symbol_find(buf),
+			       0,
+			       0,
+			       0,
+			       0);
+		fixP->fx_im_disp = 2;		/* 32-bit displacement fix */
+	}
+}
+
+/*****************************************************************************
+ * cobr_fmt:	generate a COBR-format instruction
+ *
+ **************************************************************************** */
+static
+void
+cobr_fmt(arg, opcode, oP)
+    char *arg[];	/* arg[0]->opcode mnemonic, arg[1-3]->operands (ascii) */
+    long opcode;	/* Opcode, with branch-prediction bits already set
+			 *	if necessary.
+			 */
+    struct i960_opcode *oP;
+			/*->description of instruction */
+{
+	long instr;		/* 32-bit instruction */
+	struct regop regop;	/* Description of register operand */
+	int n;			/* Number of operands */
+	int var_frag;		/* 1 if varying length code fragment should
+				 *	be emitted;  0 if an address fix
+				 *	should be emitted.
+				 */
+
+	instr = opcode;
+	n = oP->num_ops;
+
+	if (n >= 1) {
+		/* First operand (if any) of a COBR is always a register
+		 * operand.  Parse it.
+		 */
+		parse_regop(&regop, arg[1], oP->operand[0]);
+		instr |= (regop.n << 19) | (regop.mode << 13);
+	}
+	if (n >= 2) {
+		/* Second operand (if any) of a COBR is always a register
+		 * operand.  Parse it.
+		 */
+		parse_regop(&regop, arg[2], oP->operand[1]);
+		instr |= (regop.n << 14) | regop.special;
+	}
+
+
+	if (n < 3){
+		emit(instr);
+
+	} else {
+		if (instrument_branches){
+			brcnt_emit();
+			colon(brlab_next());
+		}
+
+		/* A third operand to a COBR is always a displacement.
+		 * Parse it; if it's relaxable (a cobr "j" directive, or any
+		 * cobr other than bbs/bbc when the "-norelax" option is not in
+		 * use) set up a variable code fragment;  otherwise set up an
+		 * address fix.
+		 */
+		var_frag = !norelax || (oP->format == COJ); /* TRUE or FALSE */
+		get_cdisp(arg[3], "COBR", instr, 13, var_frag, 0);
+
+		if (instrument_branches){
+			brcnt_emit();
+		}
+	}
+} /* cobr_fmt() */
+
+
+/*****************************************************************************
+ * ctrl_fmt:	generate a CTRL-format instruction
+ *
+ **************************************************************************** */
+static
+void
+ctrl_fmt(targP, opcode, num_ops)
+    char *targP;	/* Pointer to text of lone operand (if any) */
+    long opcode;	/* Template of instruction */
+    int num_ops;	/* Number of operands */
+{
+	int instrument;	/* TRUE iff we should add instrumentation to track
+			 * how often the branch is taken
+			 */
+
+
+	if (num_ops == 0){
+		emit(opcode);		/* Output opcode */
+	} else {
+
+		instrument = instrument_branches && (opcode!=CALL)
+			&& (opcode!=B) && (opcode!=RET) && (opcode!=BAL);
+
+		if (instrument){
+			brcnt_emit();
+			colon(brlab_next());
+		}
+
+		/* The operand MUST be an ip-relative displacment. Parse it
+		 * and set up address fix for the instruction we just output.
+		 */
+		get_cdisp(targP, "CTRL", opcode, 24, 0, 0);
+
+		if (instrument){
+			brcnt_emit();
+		}
+	}
+
+}
+
+
+/*****************************************************************************
+ * emit:	output instruction binary
+ *
+ *	Output instruction binary, in target byte order, 4 bytes at a time.
+ *	Return pointer to where it was placed.
+ *
+ **************************************************************************** */
+static
+char *
+emit(instr)
+    long instr;		/* Word to be output, host byte order */
+{
+	char *toP;	/* Where to output it */
+
+	toP = frag_more(4);			/* Allocate storage */
+	md_number_to_chars(toP, instr, 4);  /* Convert to target byte order */
+	return toP;
+}
+
+
+/*****************************************************************************
+ * get_args:	break individual arguments out of comma-separated list
+ *
+ * Input assumptions:
+ *	- all comments and labels have been removed
+ *	- all strings of whitespace have been collapsed to a single blank.
+ *	- all character constants ('x') have been replaced with decimal
+ *
+ * Output:
+ *	args[0] is untouched. args[1] points to first operand, etc. All args:
+ *	- are NULL-terminated
+ *	- contain no whitespace
+ *
+ * Return value:
+ *	Number of operands (0,1,2, or 3) or -1 on error.
+ *
+ **************************************************************************** */
+static int get_args(p, args)
+    register char *p;	/* Pointer to comma-separated operands; MUCKED BY US */
+    char *args[];	/* Output arg: pointers to operands placed in args[1-3].
+			 * MUST ACCOMMODATE 4 ENTRIES (args[0-3]).
+			 */
+{
+	register int n;		/* Number of operands */
+	register char *to;
+/*	char buf[4]; */
+/*	int len; */
+
+
+	/* Skip lead white space */
+	while (*p == ' '){
+		p++;
+	}
+
+	if (*p == '\0'){
+		return 0;
+	}
+
+	n = 1;
+	args[1] = p;
+
+	/* Squeze blanks out by moving non-blanks toward start of string.
+	 * Isolate operands, whenever comma is found.
+	 */
+	to = p;
+	while (*p != '\0'){
+
+		if (*p == ' '){
+			p++;
+
+		} else if (*p == ','){
+
+			/* Start of operand */
+			if (n == 3){
+				as_bad("too many operands");
+				return -1;
+			}
+			*to++ = '\0';	/* Terminate argument */
+			args[++n] = to;	/* Start next argument */
+			p++;
+
+		} else {
+			*to++ = *p++;
+		}
+	}
+	*to = '\0';
+	return n;
+}
+
+
+/*****************************************************************************
+ * get_cdisp:	handle displacement for a COBR or CTRL instruction.
+ *
+ *	Parse displacement for a COBR or CTRL instruction.
+ *
+ *	If successful, output the instruction opcode and set up for it,
+ *	depending on the arg 'var_frag', either:
+ *	    o an address fixup to be done when all symbol values are known, or
+ *	    o a varying length code fragment, with address fixup info.  This
+ *		will be done for cobr instructions that may have to be relaxed
+ *		in to compare/branch instructions (8 bytes) if the final address
+ *		displacement is greater than 13 bits.
+ *
+ **************************************************************************** */
+static
+void
+get_cdisp(dispP, ifmtP, instr, numbits, var_frag, callj)
+    char *dispP;	/*->displacement as specified in source instruction */
+    char *ifmtP;	/*->"COBR" or "CTRL" (for use in error message) */
+    long instr;		/* Instruction needing the displacement */
+    int numbits;	/* # bits of displacement (13 for COBR, 24 for CTRL) */
+    int var_frag;	/* 1 if varying length code fragment should be emitted;
+			 *	0 if an address fix should be emitted.
+			 */
+    int callj;		/* 1 if callj relocation should be done; else 0 */
+{
+	expressionS e;	/* Parsed expression */
+	fixS *fixP;	/* Structure describing needed address fix */
+	char *outP;	/* Where instruction binary is output to */
+
+	fixP = NULL;
+
+	switch (parse_expr(dispP,&e)) {
+
+	case SEG_GOOF:
+		as_bad("expression syntax error");
+		break;
+
+	case SEG_TEXT:
+	case SEG_UNKNOWN:
+		if (var_frag) {
+			outP = frag_more(8);	/* Allocate worst-case storage */
+			md_number_to_chars(outP, instr, 4);
+			frag_variant(rs_machine_dependent, 4, 4, 1,
+						adds(e), offs(e), outP, 0, 0);
+		} else {
+			/* Set up a new fix structure, so address can be updated
+			 * when all symbol values are known.
+			 */
+			outP = emit(instr);
+			fixP = fix_new(frag_now,
+				       outP - frag_now->fr_literal,
+				       4,
+				       adds(e),
+				       0,
+				       offs(e),
+				       1,
+				       0);
+
+			fixP->fx_callj = callj;
+
+			/* We want to modify a bit field when the address is
+			 * known.  But we don't need all the garbage in the
+			 * bit_fix structure.  So we're going to lie and store
+			 * the number of bits affected instead of a pointer.
+			 */
+			fixP->fx_bit_fixP = (bit_fixS *) numbits;
+		}
+		break;
+
+	case SEG_DATA:
+	case SEG_BSS:
+		as_bad("attempt to branch into different segment");
+		break;
+
+	default:
+		as_bad("target of %s instruction must be a label", ifmtP);
+		break;
+	}
+}
+
+
+/*****************************************************************************
+ * get_ispec:	parse a memory operand for an index specification
+ *
+ *	Here, an "index specification" is taken to be anything surrounded
+ *	by square brackets and NOT followed by anything else.
+ *
+ *	If it's found, detach it from the input string, remove the surrounding
+ *	square brackets, and return a pointer to it.  Otherwise, return NULL.
+ *
+ **************************************************************************** */
+static
+char *
+get_ispec(textP)
+    char *textP; /*->memory operand from source instruction, no white space */
+{
+	char *start;	/*->start of index specification */
+	char *end;	/*->end of index specification */
+
+	/* Find opening square bracket, if any
+	 */
+	start = index(textP, '[');
+
+	if (start != NULL){
+
+		/* Eliminate '[', detach from rest of operand */
+		*start++ = '\0';
+
+		end = index(start, ']');
+
+		if (end == NULL){
+			as_bad("unmatched '['");
+
+		} else {
+			/* Eliminate ']' and make sure it was the last thing
+			 * in the string.
+			 */
+			*end = '\0';
+			if (*(end+1) != '\0'){
+				as_bad("garbage after index spec ignored");
+			}
+		}
+	}
+	return start;
+}
+
+/*****************************************************************************
+ * get_regnum:
+ *
+ *	Look up a (suspected) register name in the register table and return the
+ *	associated register number (or -1 if not found).
+ *
+ **************************************************************************** */
+static
+int
+get_regnum(regname)
+    char *regname;	/* Suspected register name */
+{
+	int *rP;
+
+	rP = (int *) hash_find(reg_hash, regname);
+	return (rP == NULL) ? -1 : *rP;
+}
+
+
+/*****************************************************************************
+ * i_scan:	perform lexical scan of ascii assembler instruction.
+ *
+ * Input assumptions:
+ *	- input string is an i80960 instruction (not a pseudo-op)
+ *	- all comments and labels have been removed
+ *	- all strings of whitespace have been collapsed to a single blank.
+ *
+ * Output:
+ *	args[0] points to opcode, other entries point to operands. All strings:
+ *	- are NULL-terminated
+ *	- contain no whitespace
+ *	- have character constants ('x') replaced with a decimal number
+ *
+ * Return value:
+ *	Number of operands (0,1,2, or 3) or -1 on error.
+ *
+ **************************************************************************** */
+static int i_scan(iP, args)
+    register char *iP;	/* Pointer to ascii instruction;  MUCKED BY US. */
+    char *args[];	/* Output arg: pointers to opcode and operands placed
+			 *	here.  MUST ACCOMMODATE 4 ENTRIES.
+			 */
+{
+
+	/* Isolate opcode */
+	if (*(iP) == ' ') {
+		iP++;
+	} /* Skip lead space, if any */
+	args[0] = iP;
+	for (; *iP != ' '; iP++) {
+		if (*iP == '\0') {
+			/* There are no operands */
+			if (args[0] == iP) {
+				/* We never moved: there was no opcode either! */
+				as_bad("missing opcode");
+				return -1;
+			}
+			return 0;
+		}
+	}
+	*iP++ = '\0';	/* Terminate opcode */
+	return(get_args(iP, args));
+} /* i_scan() */
+
+
+/*****************************************************************************
+ * mem_fmt:	generate a MEMA- or MEMB-format instruction
+ *
+ **************************************************************************** */
+static void mem_fmt(args, oP)
+    char *args[];	/* args[0]->opcode mnemonic, args[1-3]->operands */
+    struct i960_opcode *oP; /* Pointer to description of instruction */
+{
+	int i;			/* Loop counter */
+	struct regop regop;	/* Description of register operand */
+	char opdesc;		/* Operand descriptor byte */
+	memS instr;		/* Description of binary to be output */
+	char *outP;		/* Where the binary was output to */
+	expressionS expr;	/* Parsed expression */
+	fixS *fixP;		/*->description of deferred address fixup */
+
+	bzero(&instr, sizeof(memS));
+	instr.opcode = oP->opcode;
+
+	/* Process operands. */
+	for (i = 1; i <= oP->num_ops; i++){
+		opdesc = oP->operand[i-1];
+
+		if (MEMOP(opdesc)){
+			parse_memop(&instr, args[i], oP->format);
+		} else {
+			parse_regop(&regop, args[i], opdesc);
+			instr.opcode |= regop.n << 19;
+		}
+	}
+
+	/* Output opcode */
+	outP = emit(instr.opcode);
+
+	if (instr.disp == 0){
+		return;
+	}
+
+	/* Parse and process the displacement */
+	switch (parse_expr(instr.e,&expr)){
+
+	case SEG_GOOF:
+		as_bad("expression syntax error");
+		break;
+
+	case SEG_ABSOLUTE:
+		if (instr.disp == 32){
+			(void) emit(offs(expr));	/* Output displacement */
+		} else {
+			/* 12-bit displacement */
+			if (offs(expr) & ~0xfff){
+				/* Won't fit in 12 bits: convert already-output
+				 * instruction to MEMB format, output
+				 * displacement.
+				 */
+				mema_to_memb(outP);
+				(void) emit(offs(expr));
+			} else {
+				/* WILL fit in 12 bits:  OR into opcode and
+				 * overwrite the binary we already put out
+				 */
+				instr.opcode |= offs(expr);
+				md_number_to_chars(outP, instr.opcode, 4);
+			}
+		}
+		break;
+
+	case SEG_DIFFERENCE:
+	case SEG_TEXT:
+	case SEG_DATA:
+	case SEG_BSS:
+	case SEG_UNKNOWN:
+		if (instr.disp == 12){
+			/* Displacement is dependent on a symbol, whose value
+			 * may change at link time.  We HAVE to reserve 32 bits.
+			 * Convert already-output opcode to MEMB format.
+			 */
+			mema_to_memb(outP);
+		}
+
+		/* Output 0 displacement and set up address fixup for when
+		 * this symbol's value becomes known.
+		 */
+		outP = emit((long) 0);
+		fixP = fix_new(frag_now,
+			       outP - frag_now->fr_literal,
+			       4,
+			       adds(expr),
+			       subs(expr),
+			       offs(expr),
+			       0,
+			       0);
+		fixP->fx_im_disp = 2;		/* 32-bit displacement fix */
+		break;
+
+	default:
+		BAD_CASE(segs(expr));
+		break;
+	}
+} /* memfmt() */
+
+
+/*****************************************************************************
+ * mema_to_memb:	convert a MEMA-format opcode to a MEMB-format opcode.
+ *
+ * There are 2 possible MEMA formats:
+ *	- displacement only
+ *	- displacement + abase
+ *
+ * They are distinguished by the setting of the MEMA_ABASE bit.
+ *
+ **************************************************************************** */
+static void mema_to_memb(opcodeP)
+    char *opcodeP;	/* Where to find the opcode, in target byte order */
+{
+	long opcode;	/* Opcode in host byte order */
+	long mode;	/* Mode bits for MEMB instruction */
+
+	opcode = md_chars_to_number(opcodeP, 4);
+	know(!(opcode & MEMB_BIT));
+
+	mode = MEMB_BIT | D_BIT;
+	if (opcode & MEMA_ABASE){
+		mode |= A_BIT;
+	}
+
+	opcode &= 0xffffc000;	/* Clear MEMA offset and mode bits */
+	opcode |= mode;		/* Set MEMB mode bits */
+
+	md_number_to_chars(opcodeP, opcode, 4);
+} /* mema_to_memb() */
+
+
+/*****************************************************************************
+ * parse_expr:		parse an expression
+ *
+ *	Use base assembler's expression parser to parse an expression.
+ *	It, unfortunately, runs off a global which we have to save/restore
+ *	in order to make it work for us.
+ *
+ *	An empty expression string is treated as an absolute 0.
+ *
+ *	Return "segment" to which the expression evaluates.
+ *	Return SEG_GOOF regardless of expression evaluation if entire input
+ *	string is not consumed in the evaluation -- tolerate no dangling junk!
+ *
+ **************************************************************************** */
+static
+segT
+parse_expr(textP, expP)
+    char *textP;	/* Text of expression to be parsed */
+    expressionS *expP;	/* Where to put the results of parsing */
+{
+	char *save_in;	/* Save global here */
+	segT seg;	/* Segment to which expression evaluates */
+	symbolS *symP;
+
+	know(textP);
+
+	if (*textP == '\0') {
+		/* Treat empty string as absolute 0 */
+		expP->X_add_symbol = expP->X_subtract_symbol = NULL;
+		expP->X_add_number = 0;
+		seg = expP->X_seg = SEG_ABSOLUTE;
+
+	} else {
+		save_in = input_line_pointer;	/* Save global */
+		input_line_pointer = textP;	/* Make parser work for us */
+
+		seg = expression(expP);
+		if (input_line_pointer - textP != strlen(textP)) {
+			/* Did not consume all of the input */
+			seg = SEG_GOOF;
+		}
+		symP = expP->X_add_symbol;
+		if (symP && (hash_find(reg_hash, S_GET_NAME(symP)))) {
+			/* Register name in an expression */
+			seg = SEG_GOOF;
+		}
+
+		input_line_pointer = save_in;	/* Restore global */
+	}
+	return seg;
+}
+
+
+/*****************************************************************************
+ * parse_ldcont:
+ *	Parse and replace a 'ldconst' pseudo-instruction with an appropriate
+ *	i80960 instruction.
+ *
+ *	Assumes the input consists of:
+ *		arg[0]	opcode mnemonic ('ldconst')
+ *		arg[1]  first operand (constant)
+ *		arg[2]	name of register to be loaded
+ *
+ *	Replaces opcode and/or operands as appropriate.
+ *
+ *	Returns the new number of arguments, or -1 on failure.
+ *
+ **************************************************************************** */
+static
+int
+parse_ldconst(arg)
+    char *arg[];	/* See above */
+{
+	int n;			/* Constant to be loaded */
+	int shift;		/* Shift count for "shlo" instruction */
+	static char buf[5];	/* Literal for first operand */
+	static char buf2[5];	/* Literal for second operand */
+	expressionS e;		/* Parsed expression */
+
+
+	arg[3] = NULL;	/* So we can tell at the end if it got used or not */
+
+	switch(parse_expr(arg[1],&e)){
+
+	case SEG_TEXT:
+	case SEG_DATA:
+	case SEG_BSS:
+	case SEG_UNKNOWN:
+	case SEG_DIFFERENCE:
+		/* We're dependent on one or more symbols -- use "lda" */
+		arg[0] = "lda";
+		break;
+
+	case SEG_ABSOLUTE:
+		/* Try the following mappings:
+		 *	ldconst 0,<reg>  ->mov  0,<reg>
+		 * 	ldconst 31,<reg> ->mov  31,<reg>
+		 * 	ldconst 32,<reg> ->addo 1,31,<reg>
+		 * 	ldconst 62,<reg> ->addo 31,31,<reg>
+  		 *	ldconst 64,<reg> ->shlo 8,3,<reg>
+		 * 	ldconst -1,<reg> ->subo 1,0,<reg>
+		 * 	ldconst -31,<reg>->subo 31,0,<reg>
+		 *
+		 * anthing else becomes:
+		 * 	lda xxx,<reg>
+		 */
+		n = offs(e);
+		if ((0 <= n) && (n <= 31)){
+			arg[0] = "mov";
+
+		} else if ((-31 <= n) && (n <= -1)){
+			arg[0] = "subo";
+			arg[3] = arg[2];
+			sprintf(buf, "%d", -n);
+			arg[1] = buf;
+			arg[2] = "0";
+
+		} else if ((32 <= n) && (n <= 62)){
+			arg[0] = "addo";
+			arg[3] = arg[2];
+			arg[1] = "31";
+			sprintf(buf, "%d", n-31);
+			arg[2] = buf;
+
+		} else if ((shift = shift_ok(n)) != 0){
+			arg[0] = "shlo";
+			arg[3] = arg[2];
+			sprintf(buf, "%d", shift);
+			arg[1] = buf;
+			sprintf(buf2, "%d", n >> shift);
+			arg[2] = buf2;
+
+		} else {
+			arg[0] = "lda";
+		}
+		break;
+
+	default:
+		as_bad("invalid constant");
+		return -1;
+		break;
+	}
+	return (arg[3] == 0) ? 2: 3;
+}
+
+/*****************************************************************************
+ * parse_memop:	parse a memory operand
+ *
+ *	This routine is based on the observation that the 4 mode bits of the
+ *	MEMB format, taken individually, have fairly consistent meaning:
+ *
+ *		 M3 (bit 13): 1 if displacement is present (D_BIT)
+ *		 M2 (bit 12): 1 for MEMB instructions (MEMB_BIT)
+ *		 M1 (bit 11): 1 if index is present (I_BIT)
+ *		 M0 (bit 10): 1 if abase is present (A_BIT)
+ *
+ *	So we parse the memory operand and set bits in the mode as we find
+ *	things.  Then at the end, if we go to MEMB format, we need only set
+ *	the MEMB bit (M2) and our mode is built for us.
+ *
+ *	Unfortunately, I said "fairly consistent".  The exceptions:
+ *
+ *		 DBIA
+ *		 0100	Would seem illegal, but means "abase-only".
+ *
+ *		 0101	Would seem to mean "abase-only" -- it means IP-relative.
+ *			Must be converted to 0100.
+ *
+ *		 0110	Would seem to mean "index-only", but is reserved.
+ *			We turn on the D bit and provide a 0 displacement.
+ *
+ *	The other thing to observe is that we parse from the right, peeling
+ *	things * off as we go:  first any index spec, then any abase, then
+ *	the displacement.
+ *
+ **************************************************************************** */
+static
+void
+parse_memop(memP, argP, optype)
+    memS *memP;	/* Where to put the results */
+    char *argP;	/* Text of the operand to be parsed */
+    int optype;	/* MEM1, MEM2, MEM4, MEM8, MEM12, or MEM16 */
+{
+	char *indexP;	/* Pointer to index specification with "[]" removed */
+	char *p;	/* Temp char pointer */
+	char iprel_flag;/* True if this is an IP-relative operand */
+	int regnum;	/* Register number */
+	int scale;	/* Scale factor: 1,2,4,8, or 16.  Later converted
+			 *	to internal format (0,1,2,3,4 respectively).
+			 */
+	int mode; 	/* MEMB mode bits */
+	int *intP;	/* Pointer to register number */
+
+	/* The following table contains the default scale factors for each
+	 * type of memory instruction.  It is accessed using (optype-MEM1)
+	 * as an index -- thus it assumes the 'optype' constants are assigned
+	 * consecutive values, in the order they appear in this table
+	 */
+	static int def_scale[] = {
+		1,	/* MEM1 */
+		2,	/* MEM2 */
+		4, 	/* MEM4 */
+		8,	/* MEM8 */
+		-1,	/* MEM12 -- no valid default */
+		16 	/* MEM16 */
+	};
+
+
+	iprel_flag = mode = 0;
+
+	/* Any index present? */
+	indexP = get_ispec(argP);
+	if (indexP) {
+		p = strchr(indexP, '*');
+		if (p == NULL) {
+			/* No explicit scale -- use default for this
+			 *instruction type.
+			 */
+			scale = def_scale[ optype - MEM1 ];
+		} else {
+			*p++ = '\0';	/* Eliminate '*' */
+
+			/* Now indexP->a '\0'-terminated register name,
+			 * and p->a scale factor.
+			 */
+
+			if (!strcmp(p,"16")){
+				scale = 16;
+			} else if (strchr("1248",*p) && (p[1] == '\0')){
+				scale = *p - '0';
+			} else {
+				scale = -1;
+			}
+		}
+
+		regnum = get_regnum(indexP);		/* Get index reg. # */
+		if (!IS_RG_REG(regnum)){
+			as_bad("invalid index register");
+			return;
+		}
+
+		/* Convert scale to its binary encoding */
+		switch (scale){
+		case  1: scale = 0 << 7; break;
+		case  2: scale = 1 << 7; break;
+		case  4: scale = 2 << 7; break;
+		case  8: scale = 3 << 7; break;
+		case 16: scale = 4 << 7; break;
+		default: as_bad("invalid scale factor"); return;
+		};
+
+		memP->opcode |= scale | regnum;	 /* Set index bits in opcode */
+		mode |= I_BIT;			/* Found a valid index spec */
+	}
+
+	/* Any abase (Register Indirect) specification present? */
+	if ((p = strrchr(argP,'(')) != NULL) {
+		/* "(" is there -- does it start a legal abase spec?
+		 * (If not it could be part of a displacement expression.)
+		 */
+		intP = (int *) hash_find(areg_hash, p);
+		if (intP != NULL){
+			/* Got an abase here */
+			regnum = *intP;
+			*p = '\0';	/* discard register spec */
+			if (regnum == IPREL){
+				/* We have to specialcase ip-rel mode */
+				iprel_flag = 1;
+			} else {
+				memP->opcode |= regnum << 14;
+				mode |= A_BIT;
+			}
+		}
+	}
+
+	/* Any expression present? */
+	memP->e = argP;
+	if (*argP != '\0'){
+		mode |= D_BIT;
+	}
+
+	/* Special-case ip-relative addressing */
+	if (iprel_flag){
+		if (mode & I_BIT){
+			syntax();
+		} else {
+			memP->opcode |= 5 << 10;	/* IP-relative mode */
+			memP->disp = 32;
+		}
+		return;
+	}
+
+	/* Handle all other modes */
+	switch (mode){
+	case D_BIT | A_BIT:
+		/* Go with MEMA instruction format for now (grow to MEMB later
+		 *	if 12 bits is not enough for the displacement).
+		 * MEMA format has a single mode bit: set it to indicate
+		 *	that abase is present.
+		 */
+		memP->opcode |= MEMA_ABASE;
+		memP->disp = 12;
+		break;
+
+	case D_BIT:
+		/* Go with MEMA instruction format for now (grow to MEMB later
+		 *	if 12 bits is not enough for the displacement).
+		 */
+		memP->disp = 12;
+		break;
+
+	case A_BIT:
+		/* For some reason, the bit string for this mode is not
+		 * consistent:  it should be 0 (exclusive of the MEMB bit),
+		 * so we set it "by hand" here.
+		 */
+		memP->opcode |= MEMB_BIT;
+		break;
+
+	case A_BIT | I_BIT:
+		/* set MEMB bit in mode, and OR in mode bits */
+		memP->opcode |= mode | MEMB_BIT;
+		break;
+
+	case I_BIT:
+		/* Treat missing displacement as displacement of 0 */
+		mode |= D_BIT;
+		/***********************
+		 * Fall into next case *
+		 ********************** */
+	case D_BIT | A_BIT | I_BIT:
+	case D_BIT | I_BIT:
+		/* set MEMB bit in mode, and OR in mode bits */
+		memP->opcode |= mode | MEMB_BIT;
+		memP->disp = 32;
+		break;
+
+	default:
+		syntax();
+		break;
+	}
+}
+
+/*****************************************************************************
+ * parse_po:	parse machine-dependent pseudo-op
+ *
+ *	This is a top-level routine for machine-dependent pseudo-ops.  It slurps
+ *	up the rest of the input line, breaks out the individual arguments,
+ *	and dispatches them to the correct handler.
+ **************************************************************************** */
+static
+void
+parse_po(po_num)
+    int po_num;	 /* Pseudo-op number:  currently S_LEAFPROC or S_SYSPROC */
+{
+	char *args[4];	/* Pointers operands, with no embedded whitespace.
+			 *	arg[0] unused.
+			 *	arg[1-3]->operands
+			 */
+	int n_ops;	/* Number of operands */
+	char *p;	/* Pointer to beginning of unparsed argument string */
+	char eol;	/* Character that indicated end of line */
+
+	extern char is_end_of_line[];
+
+	/* Advance input pointer to end of line. */
+	p = input_line_pointer;
+	while (!is_end_of_line[ *input_line_pointer ]){
+		input_line_pointer++;
+	}
+	eol = *input_line_pointer;	/* Save end-of-line char */
+	*input_line_pointer = '\0';  	/* Terminate argument list */
+
+	/* Parse out operands */
+	n_ops = get_args(p, args);
+	if (n_ops == -1){
+		return;
+	}
+
+	/* Dispatch to correct handler */
+	switch(po_num){
+	case S_SYSPROC:		s_sysproc(n_ops, args);	break;
+	case S_LEAFPROC:	s_leafproc(n_ops, args);	break;
+	default:		BAD_CASE(po_num);		break;
+	}
+
+	/* Restore eol, so line numbers get updated correctly.  Base assembler
+	 * assumes we leave input pointer pointing at char following the eol.
+	 */
+	*input_line_pointer++ = eol;
+}
+
+/*****************************************************************************
+ * parse_regop: parse a register operand.
+ *
+ *	In case of illegal operand, issue a message and return some valid
+ *	information so instruction processing can continue.
+ **************************************************************************** */
+static
+void
+parse_regop(regopP, optext, opdesc)
+    struct regop *regopP; /* Where to put description of register operand */
+    char *optext;	/* Text of operand */
+    char opdesc;	/* Descriptor byte:  what's legal for this operand */
+{
+	int n;		/* Register number */
+	expressionS e;	/* Parsed expression */
+
+	/* See if operand is a register */
+	n = get_regnum(optext);
+	if (n >= 0){
+		if (IS_RG_REG(n)){
+			/* global or local register */
+			if (!REG_ALIGN(opdesc,n)){
+				as_bad("unaligned register");
+			}
+			regopP->n = n;
+			regopP->mode = 0;
+			regopP->special = 0;
+			return;
+		} else if (IS_FP_REG(n) && FP_OK(opdesc)){
+			/* Floating point register, and it's allowed */
+			regopP->n = n - FP0;
+			regopP->mode = 1;
+			regopP->special = 0;
+			return;
+		} else if (IS_SF_REG(n) && SFR_OK(opdesc)){
+			/* Special-function register, and it's allowed */
+			regopP->n = n - SF0;
+			regopP->mode = 0;
+			regopP->special = 1;
+			if (!targ_has_sfr(regopP->n)){
+				as_bad("no such sfr in this architecture");
+			}
+			return;
+		}
+	} else if (LIT_OK(opdesc)){
+		/*
+		 * How about a literal?
+		 */
+		regopP->mode = 1;
+		regopP->special = 0;
+		if (FP_OK(opdesc)){ 	/* floating point literal acceptable */
+                        /* Skip over 0f, 0d, or 0e prefix */
+                        if ( (optext[0] == '0')
+                             && (optext[1] >= 'd')
+                             && (optext[1] <= 'f') ){
+                                optext += 2;
+                        }
+
+                        if (!strcmp(optext,"0.0") || !strcmp(optext,"0") ){
+                                regopP->n = 0x10;
+                                return;
+                        }
+                        if (!strcmp(optext,"1.0") || !strcmp(optext,"1") ){
+                                regopP->n = 0x16;
+                                return;
+                        }
+
+		} else {		/* fixed point literal acceptable */
+			if ((parse_expr(optext,&e) != SEG_ABSOLUTE)
+			||   (offs(e) < 0) || (offs(e) > 31)){
+				as_bad("illegal literal");
+				offs(e) = 0;
+			}
+			regopP->n = offs(e);
+			return;
+		}
+	}
+
+	/* Nothing worked */
+	syntax();
+	regopP->mode = 0;	/* Register r0 is always a good one */
+	regopP->n = 0;
+	regopP->special = 0;
+} /* parse_regop() */
+
+/*****************************************************************************
+ * reg_fmt:	generate a REG-format instruction
+ *
+ **************************************************************************** */
+static void reg_fmt(args, oP)
+    char *args[];	/* args[0]->opcode mnemonic, args[1-3]->operands */
+    struct i960_opcode *oP; /* Pointer to description of instruction */
+{
+	long instr;		/* Binary to be output */
+	struct regop regop;	/* Description of register operand */
+	int n_ops;		/* Number of operands */
+
+
+	instr = oP->opcode;
+	n_ops = oP->num_ops;
+
+	if (n_ops >= 1){
+		parse_regop(&regop, args[1], oP->operand[0]);
+
+		if ((n_ops == 1) && !(instr & M3)){
+			/* 1-operand instruction in which the dst field should
+			 * be used (instead of src1).
+			 */
+			regop.n       <<= 19;
+			if (regop.special){
+				regop.mode = regop.special;
+			}
+			regop.mode    <<= 13;
+			regop.special = 0;
+		} else {
+			/* regop.n goes in bit 0, needs no shifting */
+			regop.mode    <<= 11;
+			regop.special <<= 5;
+		}
+		instr |= regop.n | regop.mode | regop.special;
+	}
+
+	if (n_ops >= 2) {
+		parse_regop(&regop, args[2], oP->operand[1]);
+
+		if ((n_ops == 2) && !(instr & M3)){
+			/* 2-operand instruction in which the dst field should
+			 * be used instead of src2).
+			 */
+			regop.n       <<= 19;
+			if (regop.special){
+				regop.mode = regop.special;
+			}
+			regop.mode    <<= 13;
+			regop.special = 0;
+		} else {
+			regop.n       <<= 14;
+			regop.mode    <<= 12;
+			regop.special <<= 6;
+		}
+		instr |= regop.n | regop.mode | regop.special;
+	}
+	if (n_ops == 3){
+		parse_regop(&regop, args[3], oP->operand[2]);
+		if (regop.special){
+			regop.mode = regop.special;
+		}
+		instr |= (regop.n <<= 19) | (regop.mode <<= 13);
+	}
+	emit(instr);
+}
+
+
+/*****************************************************************************
+ * relax_cobr:
+ *	Replace cobr instruction in a code fragment with equivalent branch and
+ *	compare instructions, so it can reach beyond a 13-bit displacement.
+ *	Set up an address fix/relocation for the new branch instruction.
+ *
+ **************************************************************************** */
+
+/* This "conditional jump" table maps cobr instructions into equivalent
+ * compare and branch opcodes.
+ */
+static
+struct {
+	long compare;
+	long branch;
+} coj[] = {		/* COBR OPCODE: */
+	CHKBIT,	BNO,	/*	0x30 - bbc */
+	CMPO,	BG,	/*	0x31 - cmpobg */
+	CMPO,	BE,	/*	0x32 - cmpobe */
+	CMPO,	BGE,	/*	0x33 - cmpobge */
+	CMPO,	BL,	/*	0x34 - cmpobl */
+	CMPO,	BNE,	/*	0x35 - cmpobne */
+	CMPO,	BLE,	/*	0x36 - cmpoble */
+	CHKBIT,	BO,	/*	0x37 - bbs */
+	CMPI,	BNO,	/*	0x38 - cmpibno */
+	CMPI,	BG,	/*	0x39 - cmpibg */
+	CMPI,	BE,	/*	0x3a - cmpibe */
+	CMPI,	BGE,	/*	0x3b - cmpibge */
+	CMPI,	BL,	/*	0x3c - cmpibl */
+	CMPI,	BNE,	/*	0x3d - cmpibne */
+	CMPI,	BLE,	/*	0x3e - cmpible */
+	CMPI,	BO,	/*	0x3f - cmpibo */
+};
+
+static
+void
+relax_cobr(fragP)
+    register fragS *fragP;	/* fragP->fr_opcode is assumed to point to
+				 * the cobr instruction, which comes at the
+				 * end of the code fragment.
+				 */
+{
+	int opcode, src1, src2, m1, s2;
+			/* Bit fields from cobr instruction */
+	long bp_bits;	/* Branch prediction bits from cobr instruction */
+	long instr;	/* A single i960 instruction */
+	char *iP;	/*->instruction to be replaced */
+	fixS *fixP;	/* Relocation that can be done at assembly time */
+
+	/* PICK UP & PARSE COBR INSTRUCTION */
+	iP = fragP->fr_opcode;
+	instr  = md_chars_to_number(iP, 4);
+	opcode = ((instr >> 24) & 0xff) - 0x30;	/* "-0x30" for table index */
+	src1   = (instr >> 19) & 0x1f;
+	m1     = (instr >> 13) & 1;
+	s2     = instr & 1;
+	src2   = (instr >> 14) & 0x1f;
+	bp_bits= instr & BP_MASK;
+
+	/* GENERATE AND OUTPUT COMPARE INSTRUCTION */
+	instr = coj[opcode].compare
+			| src1 | (m1 << 11) | (s2 << 6) | (src2 << 14);
+	md_number_to_chars(iP, instr, 4);
+
+	/* OUTPUT BRANCH INSTRUCTION */
+	md_number_to_chars(iP+4, coj[opcode].branch | bp_bits, 4);
+
+	/* SET UP ADDRESS FIXUP/RELOCATION */
+	fixP = fix_new(fragP,
+		       iP+4 - fragP->fr_literal,
+		       4,
+		       fragP->fr_symbol,
+		       0,
+		       fragP->fr_offset,
+		       1,
+		       0);
+
+	fixP->fx_bit_fixP = (bit_fixS *) 24;	/* Store size of bit field */
+
+	fragP->fr_fix += 4;
+	frag_wane(fragP);
+}
+
+
+/*****************************************************************************
+ * reloc_callj:	Relocate a 'callj' instruction
+ *
+ *	This is a "non-(GNU)-standard" machine-dependent hook.  The base
+ *	assembler calls it when it decides it can relocate an address at
+ *	assembly time instead of emitting a relocation directive.
+ *
+ *	Check to see if the relocation involves a 'callj' instruction to a:
+ *	    sysproc:	Replace the default 'call' instruction with a 'calls'
+ *	    leafproc:	Replace the default 'call' instruction with a 'bal'.
+ *	    other proc:	Do nothing.
+ *
+ *	See b.out.h for details on the 'n_other' field in a symbol structure.
+ *
+ * IMPORTANT!:
+ *	Assumes the caller has already figured out, in the case of a leafproc,
+ *	to use the 'bal' entry point, and has substituted that symbol into the
+ *	passed fixup structure.
+ *
+ **************************************************************************** */
+void reloc_callj(fixP)
+fixS *fixP;		/* Relocation that can be done at assembly time */
+{
+	char *where;	/*->the binary for the instruction being relocated */
+
+	if (!fixP->fx_callj) {
+		return;
+	} /* This wasn't a callj instruction in the first place */
+
+	where = fixP->fx_frag->fr_literal + fixP->fx_where;
+
+	if (TC_S_IS_SYSPROC(fixP->fx_addsy)) {
+		/* Symbol is a .sysproc: replace 'call' with 'calls'.
+		 * System procedure number is (other-1).
+		 */
+		md_number_to_chars(where, CALLS|TC_S_GET_SYSPROC(fixP->fx_addsy), 4);
+
+		/* Nothing else needs to be done for this instruction.
+		 * Make sure 'md_number_to_field()' will perform a no-op.
+		 */
+		fixP->fx_bit_fixP = (bit_fixS *) 1;
+
+	} else if (TC_S_IS_CALLNAME(fixP->fx_addsy)) {
+		/* Should not happen: see block comment above */
+		as_fatal("Trying to 'bal' to %s", S_GET_NAME(fixP->fx_addsy));
+
+	} else if (TC_S_IS_BALNAME(fixP->fx_addsy)) {
+		/* Replace 'call' with 'bal';  both instructions have
+		 * the same format, so calling code should complete
+		 * relocation as if nothing happened here.
+		 */
+		md_number_to_chars(where, BAL, 4);
+	} else if (TC_S_IS_BADPROC(fixP->fx_addsy)) {
+		as_bad("Looks like a proc, but can't tell what kind.\n");
+	} /* switch on proc type */
+	
+	/* else Symbol is neither a sysproc nor a leafproc */
+	
+	return;
+} /* reloc_callj() */
+
+
+/*****************************************************************************
+ * s_leafproc:	process .leafproc pseudo-op
+ *
+ *	.leafproc takes two arguments, the second one is optional:
+ *		arg[1]: name of 'call' entry point to leaf procedure
+ *		arg[2]: name of 'bal' entry point to leaf procedure
+ *
+ *	If the two arguments are identical, or if the second one is missing,
+ *	the first argument is taken to be the 'bal' entry point.
+ *
+ *	If there are 2 distinct arguments, we must make sure that the 'bal'
+ *	entry point immediately follows the 'call' entry point in the linked
+ *	list of symbols.
+ *
+ **************************************************************************** */
+static void s_leafproc(n_ops, args)
+int n_ops;		/* Number of operands */
+char *args[];	/* args[1]->1st operand, args[2]->2nd operand */
+{
+	symbolS *callP;	/* Pointer to leafproc 'call' entry point symbol */
+	symbolS *balP;	/* Pointer to leafproc 'bal' entry point symbol */
+
+	if ((n_ops != 1) && (n_ops != 2)) {
+		as_bad("should have 1 or 2 operands");
+		return;
+	} /* Check number of arguments */
+
+	/* Find or create symbol for 'call' entry point. */
+	callP = symbol_find_or_make(args[1]);
+
+	if (TC_S_IS_CALLNAME(callP)) {
+		as_warn("Redefining leafproc %s", S_GET_NAME(callP));
+	} /* is leafproc */
+
+	/* If that was the only argument, use it as the 'bal' entry point.
+	 * Otherwise, mark it as the 'call' entry point and find or create
+	 * another symbol for the 'bal' entry point.
+	 */
+	if ((n_ops == 1) || !strcmp(args[1],args[2])) {
+		TC_S_FORCE_TO_BALNAME(callP);
+
+	} else {
+		TC_S_FORCE_TO_CALLNAME(callP);
+
+		balP = symbol_find_or_make(args[2]);
+		if (TC_S_IS_CALLNAME(balP)) {
+			as_warn("Redefining leafproc %s", S_GET_NAME(balP));
+		}
+		TC_S_FORCE_TO_BALNAME(balP);
+
+		tc_set_bal_of_call(callP, balP);
+	} /* if only one arg, or the args are the same */
+
+	return;
+} /* s_leafproc() */
+
+
+/*
+ * s_sysproc:	process .sysproc pseudo-op
+ *
+ *	.sysproc takes two arguments:
+ *		arg[1]: name of entry point to system procedure
+ *		arg[2]: 'entry_num' (index) of system procedure in the range
+ *			[0,31] inclusive.
+ *
+ *	For [ab].out, we store the 'entrynum' in the 'n_other' field of
+ *	the symbol.  Since that entry is normally 0, we bias 'entrynum'
+ *	by adding 1 to it.  It must be unbiased before it is used.
+ */
+static void s_sysproc(n_ops, args)
+int n_ops; /* Number of operands */
+char *args[]; /* args[1]->1st operand, args[2]->2nd operand */
+{
+	expressionS exp;
+	symbolS *symP;
+
+	if (n_ops != 2) {
+		as_bad("should have two operands");
+		return;
+	} /* bad arg count */
+
+	/* Parse "entry_num" argument and check it for validity. */
+	if ((parse_expr(args[2],&exp) != SEG_ABSOLUTE)
+	    || (offs(exp) < 0)
+	    || (offs(exp) > 31)) {
+		as_bad("'entry_num' must be absolute number in [0,31]");
+		return;
+	}
+
+	/* Find/make symbol and stick entry number (biased by +1) into it */
+	symP = symbol_find_or_make(args[1]);
+
+	if (TC_S_IS_SYSPROC(symP)) {
+		as_warn("Redefining entrynum for sysproc %s", S_GET_NAME(symP));
+	} /* redefining */
+
+	TC_S_SET_SYSPROC(symP, offs(exp)); /* encode entry number */
+	TC_S_FORCE_TO_SYSPROC(symP);
+
+	return;
+} /* s_sysproc() */
+
+
+/*****************************************************************************
+ * shift_ok:
+ *	Determine if a "shlo" instruction can be used to implement a "ldconst".
+ *	This means that some number X < 32 can be shifted left to produce the
+ *	constant of interest.
+ *
+ *	Return the shift count, or 0 if we can't do it.
+ *	Caller calculates X by shifting original constant right 'shift' places.
+ *
+ **************************************************************************** */
+static
+int
+shift_ok(n)
+    int n;		/* The constant of interest */
+{
+	int shift;	/* The shift count */
+
+	if (n <= 0){
+		/* Can't do it for negative numbers */
+		return 0;
+	}
+
+	/* Shift 'n' right until a 1 is about to be lost */
+	for (shift = 0; (n & 1) == 0; shift++){
+		n >>= 1;
+	}
+
+	if (n >= 32){
+		return 0;
+	}
+	return shift;
+}
+
+
+/*****************************************************************************
+ * syntax:	issue syntax error
+ *
+ **************************************************************************** */
+static void syntax() {
+	as_bad("syntax error");
+} /* syntax() */
+
+
+/*****************************************************************************
+ * targ_has_sfr:
+ *	Return TRUE iff the target architecture supports the specified
+ *	special-function register (sfr).
+ *
+ **************************************************************************** */
+static
+int
+targ_has_sfr(n)
+    int n;	/* Number (0-31) of sfr */
+{
+	switch (architecture){
+	case ARCH_KA:
+	case ARCH_KB:
+	case ARCH_MC:
+		return 0;
+	case ARCH_CA:
+	default:
+		return ((0<=n) && (n<=2));
+	}
+}
+
+
+/*****************************************************************************
+ * targ_has_iclass:
+ *	Return TRUE iff the target architecture supports the indicated
+ *	class of instructions.
+ *
+ **************************************************************************** */
+static
+int
+targ_has_iclass(ic)
+    int ic;	/* Instruction class;  one of:
+		 *	I_BASE, I_CX, I_DEC, I_KX, I_FP, I_MIL, I_CASIM
+		 */
+{
+	iclasses_seen |= ic;
+	switch (architecture){
+	case ARCH_KA:	return ic & (I_BASE | I_KX);
+	case ARCH_KB:	return ic & (I_BASE | I_KX | I_FP | I_DEC);
+	case ARCH_MC:	return ic & (I_BASE | I_KX | I_FP | I_DEC | I_MIL);
+	case ARCH_CA:	return ic & (I_BASE | I_CX | I_CASIM);
+	default:
+		if ((iclasses_seen & (I_KX|I_FP|I_DEC|I_MIL))
+		&&   (iclasses_seen & I_CX)){
+			as_warn("architecture of opcode conflicts with that of earlier instruction(s)");
+			iclasses_seen &= ~ic;
+		}
+		return 1;
+	}
+}
+
+
+/* Parse an operand that is machine-specific.
+   We just return without modifying the expression if we have nothing
+   to do. */
+
+/* ARGSUSED */
+void
+md_operand (expressionP)
+     expressionS *expressionP;
+{
+}
+
+/* We have no need to default values of symbols. */
+
+/* ARGSUSED */
+symbolS *md_undefined_symbol(name)
+char *name;
+{
+	return 0;
+} /* md_undefined_symbol() */
+
+/* Exactly what point is a PC-relative offset relative TO?
+   On the i960, they're relative to the address of the instruction,
+   which we have set up as the address of the fixup too. */
+long
+md_pcrel_from (fixP)
+     fixS *fixP;
+{
+  return fixP->fx_where + fixP->fx_frag->fr_address;
+}
+
+void
+md_apply_fix(fixP, val)
+    fixS *fixP;
+    long val;
+{
+	char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
+
+	if (!fixP->fx_bit_fixP) {
+
+		switch (fixP->fx_im_disp) {
+		case 0:
+			fixP->fx_addnumber = val;
+			md_number_to_imm(place, val, fixP->fx_size, fixP);
+			break;
+		case 1:
+			md_number_to_disp(place,
+					   fixP->fx_pcrel ? val + fixP->fx_pcrel_adjust : val,
+					   fixP->fx_size);
+			break;
+		case 2: /* fix requested for .long .word etc */
+			md_number_to_chars(place, val, fixP->fx_size);
+			break;
+		default:
+			as_fatal("Internal error in md_apply_fix() in file \"%s\"", __FILE__);
+		} /* OVE: maybe one ought to put _imm _disp _chars in one md-func */
+	} else {
+		md_number_to_field(place, val, fixP->fx_bit_fixP);
+	}
+
+	return;
+} /* md_apply_fix() */
+
+#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
+/*
+ *		emit_relocations()
+ *
+ * Crawl along a fixS chain. Emit the segment's relocations.
+ */
+static void
+emit_machine_reloc (fixP, segment_address_in_file)
+     register fixS *	fixP;	/* Fixup chain for this segment. */
+     relax_addressT	segment_address_in_file;
+{
+  struct reloc_info_generic	ri;
+  register symbolS *		symbolP;
+
+	/* JF this is for paranoia */
+  bzero((char *)&ri,sizeof(ri));
+  for (;  fixP;  fixP = fixP->fx_next)
+    {
+      if ((symbolP = fixP->fx_addsy) != 0)
+	{
+	  /* These two 'cuz of NS32K */
+	  ri . r_bsr		= fixP->fx_bsr;
+	  ri . r_disp		= fixP->fx_im_disp;
+
+	  ri . r_callj		= fixP->fx_callj;
+
+	  ri . r_length		= nbytes_r_length [fixP->fx_size];
+	  ri . r_pcrel		= fixP->fx_pcrel;
+	  ri . r_address	= fixP->fx_frag->fr_address
+	    +   fixP->fx_where
+	      - segment_address_in_file;
+	  if (!S_IS_DEFINED(symbolP))
+	    {
+	      ri . r_extern	= 1;
+	      ri . r_symbolnum	= symbolP->sy_number;
+	    }
+	  else
+	    {
+	      ri . r_extern	= 0;
+	      ri . r_symbolnum	= S_GET_TYPE(symbolP);
+	    }
+
+	  /* Output the relocation information in machine-dependent form. */
+	  md_ri_to_chars(next_object_file_charP, &ri);
+	  next_object_file_charP += sizeof(struct relocation_info);
+	}
+    }
+
+} /* emit_machine_reloc() */
+#endif /* OBJ_AOUT or OBJ_BOUT */
+
+/* Align an address by rounding it up to the specified boundary.
+ */
+long md_section_align(seg, addr)
+segT seg;
+long addr;		/* Address to be rounded up */
+{
+	return((addr + (1 << section_alignment[(int) seg]) - 1) & (-1 << section_alignment[(int) seg]));
+} /* md_section_align() */
+
+#ifdef OBJ_COFF
+void tc_headers_hook(headers)
+object_headers *headers;
+{
+	unsigned short arch_flag = 0;
+
+	if (iclasses_seen == I_BASE){
+		headers->filehdr.f_flags |= F_I960CORE;
+	} else if (iclasses_seen & I_CX){
+		headers->filehdr.f_flags |= F_I960CA;
+	} else if (iclasses_seen & I_MIL){
+		headers->filehdr.f_flags |= F_I960MC;
+	} else if (iclasses_seen & (I_DEC|I_FP)){
+		headers->filehdr.f_flags |= F_I960KB;
+	} else {
+		headers->filehdr.f_flags |= F_I960KA;
+	} /* set arch flag */
+
+	if (flagseen['R']) {
+		headers->filehdr.f_magic = I960RWMAGIC;
+		headers->aouthdr.magic = OMAGIC;
+	} else {
+		headers->filehdr.f_magic = I960ROMAGIC;
+		headers->aouthdr.magic = NMAGIC;
+	} /* set magic numbers */
+	
+	return;
+} /* tc_headers_hook() */
+#endif /* OBJ_COFF */
+
+/*
+ * Things going on here:
+ *
+ * For bout, We need to assure a couple of simplifying
+ * assumptions about leafprocs for the linker: the leafproc
+ * entry symbols will be defined in the same assembly in
+ * which they're declared with the '.leafproc' directive;
+ * and if a leafproc has both 'call' and 'bal' entry points
+ * they are both global or both local.
+ *
+ * For coff, the call symbol has a second aux entry that
+ * contains the bal entry point.  The bal symbol becomes a
+ * label.
+ *
+ * For coff representation, the call symbol has a second aux entry that
+ * contains the bal entry point.  The bal symbol becomes a label.
+ *
+ */
+
+void tc_crawl_symbol_chain(headers)
+object_headers *headers;
+{
+	symbolS *symbolP;
+
+	for (symbolP = symbol_rootP; symbolP; symbolP = symbol_next(symbolP)) {
+#ifdef OBJ_COFF
+		if (TC_S_IS_SYSPROC(symbolP)) {
+			/* second aux entry already contains the sysproc number */
+			S_SET_NUMBER_AUXILIARY(symbolP, 2);
+			S_SET_STORAGE_CLASS(symbolP, C_SCALL);
+			S_SET_DATA_TYPE(symbolP, S_GET_DATA_TYPE(symbolP) | (DT_FCN << N_BTSHFT));
+			continue;
+		} /* rewrite sysproc */
+#endif /* OBJ_COFF */
+
+		if (!TC_S_IS_BALNAME(symbolP) && !TC_S_IS_CALLNAME(symbolP)) {
+			continue;
+		}  /* Not a leafproc symbol */
+
+		if (!S_IS_DEFINED(symbolP)) {
+			as_bad("leafproc symbol '%s' undefined", S_GET_NAME(symbolP));
+		} /* undefined leaf */
+
+		if (TC_S_IS_CALLNAME(symbolP)) {
+			symbolS *balP = tc_get_bal_of_call(symbolP);
+			if (S_IS_EXTERNAL(symbolP) != S_IS_EXTERNAL(balP)) {
+				S_SET_EXTERNAL(symbolP);
+				S_SET_EXTERNAL(balP);
+				as_warn("Warning: making leafproc entries %s and %s both global\n",
+					S_GET_NAME(symbolP), S_GET_NAME(balP));
+			} /* externality mismatch */
+		} /* if callname */
+	} /* walk the symbol chain */
+
+	return;
+} /* tc_crawl_symbol_chain() */
+
+/*
+ * For aout or bout, the bal immediately follows the call.
+ *
+ * For coff, we cheat and store a pointer to the bal symbol
+ * in the second aux entry of the call.
+ */
+
+void tc_set_bal_of_call(callP, balP)
+symbolS *callP;
+symbolS *balP;
+{
+	know(TC_S_IS_CALLNAME(callP));
+	know(TC_S_IS_BALNAME(balP));
+	
+#ifdef OBJ_COFF
+
+	callP->sy_symbol.ost_auxent[1].x_bal.x_balntry = (int) balP;
+	S_SET_NUMBER_AUXILIARY(callP,2);
+
+#elif defined(OBJ_AOUT) || defined(OBJ_BOUT)
+
+	/* If the 'bal' entry doesn't immediately follow the 'call'
+	 * symbol, unlink it from the symbol list and re-insert it.
+	 */
+	if (symbol_next(callP) != balP) {
+		symbol_remove(balP, &symbol_rootP, &symbol_lastP);
+		symbol_append(balP, callP, &symbol_rootP, &symbol_lastP);
+	} /* if not in order */
+
+#else
+	(as yet unwritten.);
+#endif /* switch on OBJ_FORMAT */
+	
+	return;
+} /* tc_set_bal_of_call() */
+
+char *_tc_get_bal_of_call(callP)
+symbolS *callP;
+{
+	symbolS *retval;
+
+	know(TC_S_IS_CALLNAME(callP));
+
+#ifdef OBJ_COFF
+	retval = (symbolS *) (callP->sy_symbol.ost_auxent[1].x_bal.x_balntry);
+#elif defined(OBJ_AOUT) || defined(OBJ_BOUT)
+	retval = symbol_next(callP);
+#else
+	(as yet unwritten.);
+#endif /* switch on OBJ_FORMAT */
+
+	know(TC_S_IS_BALNAME(retval));
+	return((char *) retval);
+} /* _tc_get_bal_of_call() */
+
+void tc_coff_symbol_emit_hook(symbolP)
+symbolS *symbolP;
+{
+	if (TC_S_IS_CALLNAME(symbolP)) {
+#ifdef OBJ_COFF
+		symbolS *balP = tc_get_bal_of_call(symbolP);
+		
+		/* second aux entry contains the bal entry point */
+/*		S_SET_NUMBER_AUXILIARY(symbolP, 2); */
+		symbolP->sy_symbol.ost_auxent[1].x_bal.x_balntry = S_GET_VALUE(balP);
+		S_SET_STORAGE_CLASS(symbolP, (!SF_GET_LOCAL(symbolP) ? C_LEAFEXT : C_LEAFSTAT));
+		S_SET_DATA_TYPE(symbolP, S_GET_DATA_TYPE(symbolP) | (DT_FCN << N_BTSHFT));
+		/* fix up the bal symbol */
+		S_SET_STORAGE_CLASS(balP, C_LABEL);
+#endif /* OBJ_COFF */
+	} /* only on calls */
+	
+	return;
+} /* tc_coff_symbol_emit_hook() */
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of i960.c */
diff --git a/gas/config/tc-i960.h b/gas/config/tc-i960.h
new file mode 100644
index 0000000..2b05340
--- /dev/null
+++ b/gas/config/tc-i960.h
@@ -0,0 +1,279 @@
+/* tc-i960.h - Basic 80960 instruction formats.
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as
+published by the Free Software Foundation; either version 1,
+or (at your option) any later version.
+
+GAS is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public
+License along with GAS; see the file COPYING.  If not, write
+to the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+/* $Id$ */
+
+/*
+ * The 'COJ' instructions are actually COBR instructions with the 'b' in
+ * the mnemonic replaced by a 'j';  they are ALWAYS "de-optimized" if necessary:
+ * if the displacement will not fit in 13 bits, the assembler will replace them
+ * with the corresponding compare and branch instructions.
+ *
+ * All of the 'MEMn' instructions are the same format; the 'n' in the name
+ * indicates the default index scale factor (the size of the datum operated on).
+ *
+ * The FBRA formats are not actually an instruction format.  They are the
+ * "convenience directives" for branching on floating-point comparisons,
+ * each of which generates 2 instructions (a 'bno' and one other branch).
+ *
+ * The CALLJ format is not actually an instruction format.  It indicates that
+ * the instruction generated (a CTRL-format 'call') should have its relocation
+ * specially flagged for link-time replacement with a 'bal' or 'calls' if
+ * appropriate.
+ */ 
+
+#define TC_I960 1
+
+ /* tailor gas */
+#define SYMBOLS_NEED_BACKPOINTERS
+#define LOCAL_LABELS_FB
+#define WANT_BITFIELDS
+
+ /* tailor the coff format */
+#define OBJ_COFF_SECTION_HEADER_HAS_ALIGNMENT
+#define OBJ_COFF_MAX_AUXENTRIES	(2)
+
+ /* other */
+#define CTRL	0
+#define COBR	1
+#define COJ	2
+#define REG	3
+#define MEM1	4
+#define MEM2	5
+#define MEM4	6
+#define MEM8	7
+#define MEM12	8
+#define MEM16	9
+#define FBRA	10
+#define CALLJ	11
+
+/* Masks for the mode bits in REG format instructions */
+#define M1		0x0800
+#define M2		0x1000
+#define M3		0x2000
+
+/* Generate the 12-bit opcode for a REG format instruction by placing the 
+ * high 8 bits in instruction bits 24-31, the low 4 bits in instruction bits
+ * 7-10.
+ */
+
+#define REG_OPC(opc)	((opc & 0xff0) << 20) | ((opc & 0xf) << 7)
+
+/* Generate a template for a REG format instruction:  place the opcode bits
+ * in the appropriate fields and OR in mode bits for the operands that will not
+ * be used.  I.e.,
+ *		set m1=1, if src1 will not be used
+ *		set m2=1, if src2 will not be used
+ *		set m3=1, if dst  will not be used
+ *
+ * Setting the "unused" mode bits to 1 speeds up instruction execution(!).
+ * The information is also useful to us because some 1-operand REG instructions
+ * use the src1 field, others the dst field; and some 2-operand REG instructions
+ * use src1/src2, others src1/dst.  The set mode bits enable us to distinguish.
+ */
+#define R_0(opc)	( REG_OPC(opc) | M1 | M2 | M3 )	/* No operands      */
+#define R_1(opc)	( REG_OPC(opc) | M2 | M3 )	/* 1 operand: src1  */
+#define R_1D(opc)	( REG_OPC(opc) | M1 | M2 )	/* 1 operand: dst   */
+#define R_2(opc)	( REG_OPC(opc) | M3 )		/* 2 ops: src1/src2 */
+#define R_2D(opc)	( REG_OPC(opc) | M2 )		/* 2 ops: src1/dst  */
+#define R_3(opc)	( REG_OPC(opc) )		/* 3 operands       */
+
+/* DESCRIPTOR BYTES FOR REGISTER OPERANDS
+ *
+ * Interpret names as follows:
+ *	R:   global or local register only
+ *	RS:  global, local, or (if target allows) special-function register only
+ *	RL:  global or local register, or integer literal
+ *	RSL: global, local, or (if target allows) special-function register;
+ *		or integer literal
+ *	F:   global, local, or floating-point register
+ *	FL:  global, local, or floating-point register; or literal (including
+ *		floating point)
+ *
+ * A number appended to a name indicates that registers must be aligned,
+ * as follows:
+ *	2: register number must be multiple of 2
+ *	4: register number must be multiple of 4
+ */
+
+#define SFR	0x10		/* Mask for the "sfr-OK" bit */
+#define LIT	0x08		/* Mask for the "literal-OK" bit */
+#define FP	0x04		/* Mask for "floating-point-OK" bit */
+
+/* This macro ors the bits together.  Note that 'align' is a mask
+ * for the low 0, 1, or 2 bits of the register number, as appropriate.
+ */
+#define OP(align,lit,fp,sfr)	( align | lit | fp | sfr )
+
+#define R	OP( 0, 0,   0,  0   )
+#define RS	OP( 0, 0,   0,  SFR )
+#define RL	OP( 0, LIT, 0,  0   )
+#define RSL	OP( 0, LIT, 0,  SFR )
+#define F	OP( 0, 0,   FP, 0   )
+#define FL	OP( 0, LIT, FP, 0   )
+#define R2	OP( 1, 0,   0,  0   )
+#define RL2	OP( 1, LIT, 0,  0   )
+#define F2	OP( 1, 0,   FP, 0   )
+#define FL2	OP( 1, LIT, FP, 0   )
+#define R4	OP( 3, 0,   0,  0   )
+#define RL4	OP( 3, LIT, 0,  0   )
+#define F4	OP( 3, 0,   FP, 0   )
+#define FL4	OP( 3, LIT, FP, 0   )
+
+#define M	0x7f	/* Memory operand (MEMA & MEMB format instructions) */
+
+/* Macros to extract info from the register operand descriptor byte 'od'.
+ */
+#define SFR_OK(od)	(od & SFR)	/* TRUE if sfr operand allowed */
+#define LIT_OK(od)	(od & LIT)	/* TRUE if literal operand allowed */
+#define FP_OK(od)	(od & FP)	/* TRUE if floating-point op allowed */
+#define REG_ALIGN(od,n)	((od & 0x3 & n) == 0)
+					/* TRUE if reg #n is properly aligned */
+#define MEMOP(od)	(od == M)	/* TRUE if operand is a memory operand*/
+
+/* Classes of 960 intructions:
+ *	- each instruction falls into one class.
+ *	- each target architecture supports one or more classes.
+ *
+ * EACH CONSTANT MUST CONTAIN 1 AND ONLY 1 SET BIT!:  see targ_has_iclass().
+ */
+#define I_BASE	0x01	/* 80960 base instruction set	*/
+#define I_CX	0x02	/* 80960Cx instruction		*/
+#define I_DEC	0x04	/* Decimal instruction		*/
+#define I_FP	0x08	/* Floating point instruction	*/
+#define I_KX	0x10	/* 80960Kx instruction		*/
+#define I_MIL	0x20	/* Military instruction		*/
+
+/* MEANING OF 'n_other' in the symbol record.
+ *
+ * If non-zero, the 'n_other' fields indicates either a leaf procedure or
+ * a system procedure, as follows:
+ *
+ *	1 <= n_other <= 32 :
+ *		The symbol is the entry point to a system procedure.
+ *		'n_value' is the address of the entry, as for any other
+ *		procedure.  The system procedure number (which can be used in
+ *		a 'calls' instruction) is (n_other-1).  These entries come from
+ *		'.sysproc' directives.
+ *
+ *	n_other == N_CALLNAME
+ *		the symbol is the 'call' entry point to a leaf procedure.
+ *		The *next* symbol in the symbol table must be the corresponding
+ *		'bal' entry point to the procedure (see following).  These
+ *		entries come from '.leafproc' directives in which two different
+ *		symbols are specified (the first one is represented here).
+ *	
+ *
+ *	n_other == N_BALNAME
+ *		the symbol is the 'bal' entry point to a leaf procedure.
+ *		These entries result from '.leafproc' directives in which only
+ *		one symbol is specified, or in which the same symbol is
+ *		specified twice.
+ *
+ * Note that an N_CALLNAME entry *must* have a corresponding N_BALNAME entry,
+ * but not every N_BALNAME entry must have an N_CALLNAME entry.
+ */
+#define	N_CALLNAME	(-1)
+#define	N_BALNAME	(-2)
+
+
+ /* i960 uses a custom relocation record. */
+
+ /* let obj-aout.h know */
+#define CUSTOM_RELOC_FORMAT 1
+ /* let a.out.gnu.h know */
+#define N_RELOCATION_INFO_DECLARED 1
+struct relocation_info {
+	int	 r_address;	/* File address of item to be relocated	*/
+	unsigned
+		r_index:24,/* Index of symbol on which relocation is based*/
+		r_pcrel:1,	/* 1 => relocate PC-relative; else absolute
+				 *	On i960, pc-relative implies 24-bit
+				 *	address, absolute implies 32-bit.
+				 */
+		r_length:2,	/* Number of bytes to relocate:
+				 *	0 => 1 byte
+				 *	1 => 2 bytes
+				 *	2 => 4 bytes -- only value used for i960
+				 */
+		r_extern:1,
+		r_bsr:1,	/* Something for the GNU NS32K assembler */
+		r_disp:1,	/* Something for the GNU NS32K assembler */
+		r_callj:1,	/* 1 if relocation target is an i960 'callj' */
+		nuthin:1;	/* Unused				*/
+};
+
+ /* hacks for tracking callj's */
+#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
+
+#define TC_S_IS_SYSPROC(s)	((1<=S_GET_OTHER(s)) && (S_GET_OTHER(s)<=32))
+#define TC_S_IS_BALNAME(s)	(S_GET_OTHER(s) == N_BALNAME)
+#define TC_S_IS_CALLNAME(s)	(S_GET_OTHER(s) == N_CALLNAME)
+#define TC_S_IS_BADPROC(s)	((S_GET_OTHER(s) != 0) && !TC_S_IS_CALLNAME(s) && !TC_S_IS_BALNAME(s) && !TC_S_IS_SYSPROC(s))
+
+#define TC_S_SET_SYSPROC(s, p)	(S_SET_OTHER((s), (p)+1))
+#define TC_S_GET_SYSPROC(s)	(S_GET_OTHER(s)-1)
+
+#define TC_S_FORCE_TO_BALNAME(s)	(S_SET_OTHER((s), N_BALNAME))
+#define TC_S_FORCE_TO_CALLNAME(s)	(S_SET_OTHER((s), N_CALLNAME))
+#define TC_S_FORCE_TO_SYSPROC(s)	{;}
+
+#elif defined(OBJ_COFF)
+
+#define TC_S_IS_SYSPROC(s)	(S_GET_STORAGE_CLASS(s) == C_SCALL)
+#define TC_S_IS_BALNAME(s)	(SF_GET_BALNAME(s))
+#define TC_S_IS_CALLNAME(s)	(SF_GET_CALLNAME(s))
+#define TC_S_IS_BADPROC(s)	(TC_S_IS_SYSPROC(s) && TC_S_GET_SYSPROC(s) < 0 && 31 < TC_S_GET_SYSPROC(s))
+
+#define TC_S_SET_SYSPROC(s, p)	((s)->sy_symbol.ost_auxent[1].x_sc.x_stindx = (p))
+#define TC_S_GET_SYSPROC(s)	((s)->sy_symbol.ost_auxent[1].x_sc.x_stindx)
+
+#define TC_S_FORCE_TO_BALNAME(s)	(SF_SET_BALNAME(s))
+#define TC_S_FORCE_TO_CALLNAME(s)	(SF_SET_CALLNAME(s))
+#define TC_S_FORCE_TO_SYSPROC(s)	(S_SET_STORAGE_CLASS((s), C_SCALL))
+
+#else /* switch on OBJ */
+you lose
+#endif /* witch on OBJ */
+
+#ifdef __STDC__
+
+void brtab_emit(void);
+void reloc_callj(); /* this is really reloc_callj(fixS *fixP) but I don't want to change header inclusion order. */
+void tc_set_bal_of_call(); /* this is really tc_set_bal_of_call(symbolS *callP, symbolS *balP) */
+
+#else /* __STDC__ */
+
+void brtab_emit();
+void reloc_callj();
+void tc_set_bal_of_call();
+
+#endif /* __STDC__ */
+
+char *_tc_get_bal_of_call(); /* this is really symbolS *tc_get_bal_of_call(symbolS *callP). */
+#define tc_get_bal_of_call(c)	((symbolS *) _tc_get_bal_of_call(c))
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of tp-i960.h */
diff --git a/gas/config/tc-m68851.h b/gas/config/tc-m68851.h
new file mode 100644
index 0000000..ff984fe
--- /dev/null
+++ b/gas/config/tc-m68851.h
@@ -0,0 +1,284 @@
+
+/*
+ * pmmu.h
+ */
+
+/* I suppose we have to copyright this file.  Someone on the net sent it
+   to us as part of the changes for the m68851 Memory Management Unit */
+
+/* Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of Gas, the GNU Assembler.
+
+The GNU assembler is distributed in the hope that it will be
+useful, but WITHOUT ANY WARRANTY.  No author or distributor
+accepts responsibility to anyone for the consequences of using it
+or for whether it serves any particular purpose or works at all,
+unless he says so in writing.  Refer to the GNU Assembler General
+Public License for full details.
+
+Everyone is granted permission to copy, modify and redistribute
+the GNU Assembler, but only under the conditions described in the
+GNU Assembler General Public License.  A copy of this license is
+supposed to have been given to you along with the GNU Assembler
+so you can know your rights and responsibilities.  It should be
+in a file named COPYING.  Among other things, the copyright
+notice and this notice must be preserved on all copies.  */
+
+#ifdef m68851
+
+/*
+   I didn't use much imagination in choosing the 
+   following codes, so many of them aren't very
+   mnemonic. -rab
+
+   P  pmmu register
+	Possible values:
+	000	TC	Translation Control reg
+	100	CAL	Current Access Level
+	101	VAL	Validate Access Level
+	110	SCC	Stack Change Control
+	111	AC	Access Control
+
+   W  wide pmmu registers
+	Possible values:
+	001	DRP	Dma Root Pointer
+	010	SRP	Supervisor Root Pointer
+	011	CRP	Cpu Root Pointer
+
+   f	function code register
+	0	SFC
+	1	DFC
+
+   V	VAL register only
+
+   X	BADx, BACx
+	100	BAD	Breakpoint Acknowledge Data
+	101	BAC	Breakpoint Acknowledge Control
+
+   Y	PSR
+   Z	PCSR
+
+   |	memory 		(modes 2-6, 7.*)
+
+*/
+
+/*
+ * these defines should be in m68k.c but
+ * i put them here to keep all the m68851 stuff
+ * together -rab
+ * JF--Make sure these #s don't clash with the ones in m68k.c
+ * That would be BAD.
+ */
+#define TC	(FPS+1)		/* 48 */
+#define DRP	(TC+1)		/* 49 */
+#define SRP	(DRP+1)		/* 50 */
+#define CRP	(SRP+1)		/* 51 */
+#define CAL	(CRP+1)		/* 52 */
+#define VAL	(CAL+1)		/* 53 */
+#define SCC	(VAL+1)		/* 54 */
+#define AC	(SCC+1)		/* 55 */
+#define BAD	(AC+1)		/* 56,57,58,59, 60,61,62,63 */
+#define BAC	(BAD+8)		/* 64,65,66,67, 68,69,70,71 */
+#define PSR	(BAC+8)		/* 72 */
+#define PCSR	(PSR+1)		/* 73 */
+
+ /* name */	/* opcode */		/* match */		/* args */
+
+{"pbac",	one(0xf0c7),		one(0xffbf),		"Bc"},
+{"pbacw",	one(0xf087),		one(0xffbf),		"Bc"},
+{"pbas",	one(0xf0c6),		one(0xffbf),		"Bc"},
+{"pbasw",	one(0xf086),		one(0xffbf),		"Bc"},
+{"pbbc",	one(0xf0c1),		one(0xffbf),		"Bc"},
+{"pbbcw",	one(0xf081),		one(0xffbf),		"Bc"},
+{"pbbs",	one(0xf0c0),		one(0xffbf),		"Bc"},
+{"pbbsw",	one(0xf080),		one(0xffbf),		"Bc"},
+{"pbcc",	one(0xf0cf),		one(0xffbf),		"Bc"},
+{"pbccw",	one(0xf08f),		one(0xffbf),		"Bc"},
+{"pbcs",	one(0xf0ce),		one(0xffbf),		"Bc"},
+{"pbcsw",	one(0xf08e),		one(0xffbf),		"Bc"},
+{"pbgc",	one(0xf0cd),		one(0xffbf),		"Bc"},
+{"pbgcw",	one(0xf08d),		one(0xffbf),		"Bc"},
+{"pbgs",	one(0xf0cc),		one(0xffbf),		"Bc"},
+{"pbgsw",	one(0xf08c),		one(0xffbf),		"Bc"},
+{"pbic",	one(0xf0cb),		one(0xffbf),		"Bc"},
+{"pbicw",	one(0xf08b),		one(0xffbf),		"Bc"},
+{"pbis",	one(0xf0ca),		one(0xffbf),		"Bc"},
+{"pbisw",	one(0xf08a),		one(0xffbf),		"Bc"},
+{"pblc",	one(0xf0c3),		one(0xffbf),		"Bc"},
+{"pblcw",	one(0xf083),		one(0xffbf),		"Bc"},
+{"pbls",	one(0xf0c2),		one(0xffbf),		"Bc"},
+{"pblsw",	one(0xf082),		one(0xffbf),		"Bc"},
+{"pbsc",	one(0xf0c5),		one(0xffbf),		"Bc"},
+{"pbscw",	one(0xf085),		one(0xffbf),		"Bc"},
+{"pbss",	one(0xf0c4),		one(0xffbf),		"Bc"},
+{"pbssw",	one(0xf084),		one(0xffbf),		"Bc"},
+{"pbwc",	one(0xf0c9),		one(0xffbf),		"Bc"},
+{"pbwcw",	one(0xf089),		one(0xffbf),		"Bc"},
+{"pbws",	one(0xf0c8),		one(0xffbf),		"Bc"},
+{"pbwsw",	one(0xf088),		one(0xffbf),		"Bc"},
+
+
+{"pdbac",	two(0xf048, 0x0007),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbas",	two(0xf048, 0x0006),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbbc",	two(0xf048, 0x0001),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbbs",	two(0xf048, 0x0000),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbcc",	two(0xf048, 0x000f),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbcs",	two(0xf048, 0x000e),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbgc",	two(0xf048, 0x000d),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbgs",	two(0xf048, 0x000c),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbic",	two(0xf048, 0x000b),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbis",	two(0xf048, 0x000a),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdblc",	two(0xf048, 0x0003),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbls",	two(0xf048, 0x0002),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbsc",	two(0xf048, 0x0005),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbss",	two(0xf048, 0x0004),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbwc",	two(0xf048, 0x0009),	two(0xfff8, 0xffff),	"DsBw"},
+{"pdbws",	two(0xf048, 0x0008),	two(0xfff8, 0xffff),	"DsBw"},
+
+{"pflusha",	two(0xf000, 0x2400),	two(0xffff, 0xffff),	"" },
+
+{"pflush",	two(0xf000, 0x3010),	two(0xffc0, 0xfe10),	"T3T9" },
+{"pflush",	two(0xf000, 0x3810),	two(0xffc0, 0xfe10),	"T3T9&s" },
+{"pflush",	two(0xf000, 0x3008),	two(0xffc0, 0xfe18),	"D3T9" },
+{"pflush",	two(0xf000, 0x3808),	two(0xffc0, 0xfe18),	"D3T9&s" },
+{"pflush",	two(0xf000, 0x3000),	two(0xffc0, 0xfe1e),	"f3T9" },
+{"pflush",	two(0xf000, 0x3800),	two(0xffc0, 0xfe1e),	"f3T9&s" },
+
+{"pflushs",	two(0xf000, 0x3410),	two(0xfff8, 0xfe10),	"T3T9" },
+{"pflushs",	two(0xf000, 0x3c00),	two(0xfff8, 0xfe00),	"T3T9&s" },
+{"pflushs",	two(0xf000, 0x3408),	two(0xfff8, 0xfe18),	"D3T9" },
+{"pflushs",	two(0xf000, 0x3c08),	two(0xfff8, 0xfe18),	"D3T9&s" },
+{"pflushs",	two(0xf000, 0x3400),	two(0xfff8, 0xfe1e),	"f3T9" },
+{"pflushs",	two(0xf000, 0x3c00),	two(0xfff8, 0xfe1e),	"f3T9&s"},
+
+{"pflushr",	two(0xf000, 0xa000),	two(0xffc0, 0xffff),	"|s" },
+
+{"ploadr",	two(0xf000, 0x2210),	two(0xffc0, 0xfff0),	"T3&s" },
+{"ploadr",	two(0xf000, 0x2208),	two(0xffc0, 0xfff8),	"D3&s" },
+{"ploadr",	two(0xf000, 0x2200),	two(0xffc0, 0xfffe),	"f3&s" },
+{"ploadw",	two(0xf000, 0x2010),	two(0xffc0, 0xfff0),	"T3&s" },
+{"ploadw",	two(0xf000, 0x2008),	two(0xffc0, 0xfff8),	"D3&s" },
+{"ploadw",	two(0xf000, 0x2000),	two(0xffc0, 0xfffe),	"f3&s" },
+
+/* TC, CRP, DRP, SRP, CAL, VAL, SCC, AC */
+{"pmove",	two(0xf000, 0x4000),	two(0xffc0, 0xe3ff),	"*sP8" },
+{"pmove",	two(0xf000, 0x4200),	two(0xffc0, 0xe3ff),	"P8%s" },
+{"pmove",	two(0xf000, 0x4000),	two(0xffc0, 0xe3ff),	"|sW8" },
+{"pmove",	two(0xf000, 0x4200),	two(0xffc0, 0xe3ff),	"W8~s" },
+
+/* BADx, BACx */
+{"pmove",	two(0xf000, 0x6200),	two(0xffc0, 0xe3e3),	"*sX3" },
+{"pmove",	two(0xf000, 0x6000),	two(0xffc0, 0xe3e3),	"X3%s" },
+
+/* PSR, PCSR */
+/* {"pmove",	two(0xf000, 0x6100),	two(oxffc0, oxffff),	"*sZ8" }, */
+{"pmove",	two(0xf000, 0x6000),	two(0xffc0, 0xffff),	"*sY8" },
+{"pmove",	two(0xf000, 0x6200),	two(0xffc0, 0xffff),	"Y8%s" },
+{"pmove",	two(0xf000, 0x6600),	two(0xffc0, 0xffff),	"Z8%s" },
+
+{"prestore",	one(0xf140),		one(0xffc0),		"&s"},
+{"prestore",	one(0xf158),		one(0xfff8),		"+s"},
+{"psave",	one(0xf100),		one(0xffc0),		"&s"},
+{"psave",	one(0xf100),		one(0xffc0),		"+s"},
+
+{"psac",	two(0xf040, 0x0007),	two(0xffc0, 0xffff),	"@s"},
+{"psas",	two(0xf040, 0x0006),	two(0xffc0, 0xffff),	"@s"},
+{"psbc",	two(0xf040, 0x0001),	two(0xffc0, 0xffff),	"@s"},
+{"psbs",	two(0xf040, 0x0000),	two(0xffc0, 0xffff),	"@s"},
+{"pscc",	two(0xf040, 0x000f),	two(0xffc0, 0xffff),	"@s"},
+{"pscs",	two(0xf040, 0x000e),	two(0xffc0, 0xffff),	"@s"},
+{"psgc",	two(0xf040, 0x000d),	two(0xffc0, 0xffff),	"@s"},
+{"psgs",	two(0xf040, 0x000c),	two(0xffc0, 0xffff),	"@s"},
+{"psic",	two(0xf040, 0x000b),	two(0xffc0, 0xffff),	"@s"},
+{"psis",	two(0xf040, 0x000a),	two(0xffc0, 0xffff),	"@s"},
+{"pslc",	two(0xf040, 0x0003),	two(0xffc0, 0xffff),	"@s"},
+{"psls",	two(0xf040, 0x0002),	two(0xffc0, 0xffff),	"@s"},
+{"pssc",	two(0xf040, 0x0005),	two(0xffc0, 0xffff),	"@s"},
+{"psss",	two(0xf040, 0x0004),	two(0xffc0, 0xffff),	"@s"},
+{"pswc",	two(0xf040, 0x0009),	two(0xffc0, 0xffff),	"@s"},
+{"psws",	two(0xf040, 0x0008),	two(0xffc0, 0xffff),	"@s"},
+
+{"ptestr",	two(0xf000, 0x8210),	two(0xffc0, 0xe3f0),	"T3&sQ8" },
+{"ptestr",	two(0xf000, 0x8310),	two(0xffc0, 0xe310),	"T3&sQ8A9" },
+{"ptestr",	two(0xf000, 0x8208),	two(0xffc0, 0xe3f8),	"D3&sQ8" },
+{"ptestr",	two(0xf000, 0x8308),	two(0xffc0, 0xe318),	"D3&sQ8A9" },
+{"ptestr",	two(0xf000, 0x8200),	two(0xffc0, 0xe3fe),	"f3&sQ8" },
+{"ptestr",	two(0xf000, 0x8300),	two(0xffc0, 0xe31e),	"f3&sQ8A9" },
+
+{"ptestw",	two(0xf000, 0x8010),	two(0xffc0, 0xe3f0),	"T3&sQ8" },
+{"ptestw",	two(0xf000, 0x8110),	two(0xffc0, 0xe310),	"T3&sQ8A9" },
+{"ptestw",	two(0xf000, 0x8008),	two(0xffc0, 0xe3f8),	"D3&sQ8" },
+{"ptestw",	two(0xf000, 0x8108),	two(0xffc0, 0xe318),	"D3&sQ8A9" },
+{"ptestw",	two(0xf000, 0x8000),	two(0xffc0, 0xe3fe),	"f3&sQ8" },
+{"ptestw",	two(0xf000, 0x8100),	two(0xffc0, 0xe31e),	"f3&sQ8A9" },
+
+{"ptrapacw",	two(0xf07a, 0x0007),	two(0xffff, 0xffff),	"#w"},
+{"ptrapacl",	two(0xf07b, 0x0007),	two(0xffff, 0xffff),	"#l"},
+{"ptrapac",	two(0xf07c, 0x0007),	two(0xffff, 0xffff),	""},
+
+{"ptrapasw",	two(0xf07a, 0x0006),	two(0xffff, 0xffff),	"#w"},
+{"ptrapasl",	two(0xf07b, 0x0006),	two(0xffff, 0xffff),	"#l"},
+{"ptrapas",	two(0xf07c, 0x0006),	two(0xffff, 0xffff),	""},
+
+{"ptrapbcw",	two(0xf07a, 0x0001),	two(0xffff, 0xffff),	"#w"},
+{"ptrapbcl",	two(0xf07b, 0x0001),	two(0xffff, 0xffff),	"#l"},
+{"ptrapbc",	two(0xf07c, 0x0001),	two(0xffff, 0xffff),	""},
+
+{"ptrapbsw",	two(0xf07a, 0x0000),	two(0xffff, 0xffff),	"#w"},
+{"ptrapbsl",	two(0xf07b, 0x0000),	two(0xffff, 0xffff),	"#l"},
+{"ptrapbs",	two(0xf07c, 0x0000),	two(0xffff, 0xffff),	""},
+
+{"ptrapccw",	two(0xf07a, 0x000f),	two(0xffff, 0xffff),	"#w"},
+{"ptrapccl",	two(0xf07b, 0x000f),	two(0xffff, 0xffff),	"#l"},
+{"ptrapcc",	two(0xf07c, 0x000f),	two(0xffff, 0xffff),	""},
+
+{"ptrapcsw",	two(0xf07a, 0x000e),	two(0xffff, 0xffff),	"#w"},
+{"ptrapcsl",	two(0xf07b, 0x000e),	two(0xffff, 0xffff),	"#l"},
+{"ptrapcs",	two(0xf07c, 0x000e),	two(0xffff, 0xffff),	""},
+
+{"ptrapgcw",	two(0xf07a, 0x000d),	two(0xffff, 0xffff),	"#w"},
+{"ptrapgcl",	two(0xf07b, 0x000d),	two(0xffff, 0xffff),	"#l"},
+{"ptrapgc",	two(0xf07c, 0x000d),	two(0xffff, 0xffff),	""},
+
+{"ptrapgsw",	two(0xf07a, 0x000c),	two(0xffff, 0xffff),	"#w"},
+{"ptrapgsl",	two(0xf07b, 0x000c),	two(0xffff, 0xffff),	"#l"},
+{"ptrapgs",	two(0xf07c, 0x000c),	two(0xffff, 0xffff),	""},
+
+{"ptrapicw",	two(0xf07a, 0x000b),	two(0xffff, 0xffff),	"#w"},
+{"ptrapicl",	two(0xf07b, 0x000b),	two(0xffff, 0xffff),	"#l"},
+{"ptrapic",	two(0xf07c, 0x000b),	two(0xffff, 0xffff),	""},
+
+{"ptrapisw",	two(0xf07a, 0x000a),	two(0xffff, 0xffff),	"#w"},
+{"ptrapisl",	two(0xf07b, 0x000a),	two(0xffff, 0xffff),	"#l"},
+{"ptrapis",	two(0xf07c, 0x000a),	two(0xffff, 0xffff),	""},
+
+{"ptraplcw",	two(0xf07a, 0x0003),	two(0xffff, 0xffff),	"#w"},
+{"ptraplcl",	two(0xf07b, 0x0003),	two(0xffff, 0xffff),	"#l"},
+{"ptraplc",	two(0xf07c, 0x0003),	two(0xffff, 0xffff),	""},
+
+{"ptraplsw",	two(0xf07a, 0x0002),	two(0xffff, 0xffff),	"#w"},
+{"ptraplsl",	two(0xf07b, 0x0002),	two(0xffff, 0xffff),	"#l"},
+{"ptrapls",	two(0xf07c, 0x0002),	two(0xffff, 0xffff),	""},
+
+{"ptrapscw",	two(0xf07a, 0x0005),	two(0xffff, 0xffff),	"#w"},
+{"ptrapscl",	two(0xf07b, 0x0005),	two(0xffff, 0xffff),	"#l"},
+{"ptrapsc",	two(0xf07c, 0x0005),	two(0xffff, 0xffff),	""},
+
+{"ptrapssw",	two(0xf07a, 0x0004),	two(0xffff, 0xffff),	"#w"},
+{"ptrapssl",	two(0xf07b, 0x0004),	two(0xffff, 0xffff),	"#l"},
+{"ptrapss",	two(0xf07c, 0x0004),	two(0xffff, 0xffff),	""},
+
+{"ptrapwcw",	two(0xf07a, 0x0009),	two(0xffff, 0xffff),	"#w"},
+{"ptrapwcl",	two(0xf07b, 0x0009),	two(0xffff, 0xffff),	"#l"},
+{"ptrapwc",	two(0xf07c, 0x0009),	two(0xffff, 0xffff),	""},
+
+{"ptrapwsw",	two(0xf07a, 0x0008),	two(0xffff, 0xffff),	"#w"},
+{"ptrapwsl",	two(0xf07b, 0x0008),	two(0xffff, 0xffff),	"#l"},
+{"ptrapws",	two(0xf07c, 0x0008),	two(0xffff, 0xffff),	""},
+
+{"pvalid",	two(0xf000, 0x2800),	two(0xffc0, 0xffff),	"Vs&s"},
+{"pvalid",	two(0xf000, 0x2c00),	two(0xffc0, 0xfff8),	"A3&s" },
+
+#endif /* m68851 */
+/* end pmmu.h */
diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c
new file mode 100644
index 0000000..c2ba228
--- /dev/null
+++ b/gas/config/tc-m68k.c
@@ -0,0 +1,3808 @@
+/* m68k.c  All the m68020 specific stuff in one convenient, huge,
+   slow to compile, easy to find file.
+   Copyright (C) 1987, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include <ctype.h>
+
+#include "as.h"
+
+#include "obstack.h"
+
+ /* note that this file includes real declarations and thus can only be included by one source file per executable. */
+#include "m68k-opcode.h"
+
+/* This array holds the chars that always start a comment.  If the
+   pre-processor is disabled, these aren't very useful */
+const char comment_chars[] = "|";
+
+/* This array holds the chars that only start a comment at the beginning of
+   a line.  If the line seems to have the form '# 123 filename'
+   .line and .file directives will appear in the pre-processed output */
+/* Note that input_file.c hand checks for '#' at the beginning of the
+   first line of the input file.  This is because the compiler outputs
+   #NO_APP at the beginning of its output. */
+/* Also note that comments like this one will always work. */
+const char line_comment_chars[] = "#";
+
+/* Chars that can be used to separate mant from exp in floating point nums */
+const char EXP_CHARS[] = "eE";
+
+/* Chars that mean this number is a floating point constant */
+/* As in 0f12.456 */
+/* or    0d1.2345e12 */
+
+const char FLT_CHARS[] = "rRsSfFdDxXeEpP";
+
+/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
+   changed in read.c .  Ideally it shouldn't have to know about it at all,
+   but nothing is ideal around here.
+ */
+
+int md_reloc_size = 8;		/* Size of relocation record */
+
+/* Its an arbitrary name:  This means I don't approve of it */
+/* See flames below */
+static struct obstack robyn;
+
+#define TAB(x,y)	(((x)<<2)+(y))
+#define TABTYPE(xy)     ((xy) >> 2)
+#define BYTE		0
+#define SHORT		1
+#define LONG		2
+#define SZ_UNDEF	3
+
+#define BRANCH		1
+#define FBRANCH		2
+#define PCREL		3
+#define BCC68000        4
+#define DBCC            5
+#define PCLEA		6
+
+struct m68k_exp {
+	char	*e_beg;
+	char	*e_end;
+	expressionS e_exp;
+	short	e_siz;		/* 0== default 1==short/byte 2==word 3==long */
+};
+
+/* Internal form of an operand.  */
+struct m68k_op {
+	char	*error;		/* Couldn't parse it */
+	int	mode;		/* What mode this instruction is in.  */
+	unsigned long	reg;		/* Base register */
+	struct m68k_exp *con1;
+	int	ireg;		/* Index register */
+	int	isiz;		/* 0==unspec  1==byte(?)  2==short  3==long  */
+	int	imul;		/* Multipy ireg by this (1,2,4,or 8) */
+	struct	m68k_exp *con2;
+};
+
+/* internal form of a 68020 instruction */
+struct m68_it {
+	char	*error;
+	char	*args;		/* list of opcode info */
+	int	numargs;
+
+	int	numo;		/* Number of shorts in opcode */
+	short	opcode[11];
+
+	struct m68k_op operands[6];
+
+	int	nexp;		/* number of exprs in use */
+	struct m68k_exp exprs[4];
+
+	int	nfrag;		/* Number of frags we have to produce */
+	struct {
+		int fragoff;	/* Where in the current opcode[] the frag ends */
+		symbolS *fadd;
+		long foff;
+		int fragty;
+	} fragb[4];
+
+	int	nrel;		/* Num of reloc strucs in use */
+	struct	{
+		int	n;
+		symbolS	*add,
+			*sub;
+		long off;
+		char	wid;
+		char	pcrel;
+	} reloc[5];		/* Five is enough??? */
+};
+
+struct m68_it the_ins;		/* the instruction being assembled */
+
+
+/* Macros for adding things to the m68_it struct */
+
+#define addword(w)	the_ins.opcode[the_ins.numo++]=(w)
+
+/* Like addword, but goes BEFORE general operands */
+#define insop(w)	{int z;\
+ for(z=the_ins.numo;z>opcode->m_codenum;--z)\
+   the_ins.opcode[z]=the_ins.opcode[z-1];\
+ for(z=0;z<the_ins.nrel;z++)\
+   the_ins.reloc[z].n+=2;\
+ the_ins.opcode[opcode->m_codenum]=w;\
+ the_ins.numo++;\
+}
+
+
+#define add_exp(beg,end) (\
+	the_ins.exprs[the_ins.nexp].e_beg=beg,\
+	the_ins.exprs[the_ins.nexp].e_end=end,\
+	&the_ins.exprs[the_ins.nexp++]\
+)
+
+
+/* The numo+1 kludge is so we can hit the low order byte of the prev word. Blecch*/
+#define add_fix(width,exp,pc_rel) {\
+	the_ins.reloc[the_ins.nrel].n= ((width)=='B') ? (the_ins.numo*2-1) : \
+		(((width)=='b') ? ((the_ins.numo-1)*2) : (the_ins.numo*2));\
+	the_ins.reloc[the_ins.nrel].add=adds((exp));\
+	the_ins.reloc[the_ins.nrel].sub=subs((exp));\
+	the_ins.reloc[the_ins.nrel].off=offs((exp));\
+	the_ins.reloc[the_ins.nrel].wid=width;\
+	the_ins.reloc[the_ins.nrel++].pcrel=pc_rel;\
+}
+
+#define add_frag(add,off,type)  {\
+	the_ins.fragb[the_ins.nfrag].fragoff=the_ins.numo;\
+	the_ins.fragb[the_ins.nfrag].fadd=add;\
+	the_ins.fragb[the_ins.nfrag].foff=off;\
+	the_ins.fragb[the_ins.nfrag++].fragty=type;\
+}
+
+#define isvar(exp)	((exp) && (adds(exp) || subs(exp)))
+
+#define seg(exp)	((exp)->e_exp.X_seg)
+#define adds(exp)	((exp)->e_exp.X_add_symbol)
+#define subs(exp)	((exp)->e_exp.X_subtract_symbol)
+#define offs(exp)	((exp)->e_exp.X_add_number)
+
+
+struct m68_incant {
+	char *m_operands;
+	unsigned long m_opcode;
+	short m_opnum;
+	short m_codenum;
+	struct m68_incant *m_next;
+};
+
+#define getone(x)	((((x)->m_opcode)>>16)&0xffff)
+#define gettwo(x)	(((x)->m_opcode)&0xffff)
+
+
+#ifdef __STDC__
+
+static char *crack_operand(char *str, struct m68k_op *opP);
+static int get_num(struct m68k_exp *exp, int ok);
+static int get_regs(int i, char *str, struct m68k_op *opP);
+static int reverse_16_bits(int in);
+static int reverse_8_bits(int in);
+static int try_index(char **s, struct m68k_op *opP);
+static void install_gen_operand(int mode, int val);
+static void install_operand(int mode, int val);
+static void s_bss(void);
+static void s_data1(void);
+static void s_data2(void);
+static void s_even(void);
+static void s_proc(void);
+
+#else /* __STDC__ */
+
+static char *crack_operand();
+static int get_num();
+static int get_regs();
+static int reverse_16_bits();
+static int reverse_8_bits();
+static int try_index();
+static void install_gen_operand();
+static void install_operand();
+static void s_bss();
+static void s_data1();
+static void s_data2();
+static void s_even();
+static void s_proc();
+
+#endif /* __STDC__ */
+
+/* BCC68000 is for patching in an extra jmp instruction for long offsets
+   on the 68000.  The 68000 doesn't support long branches with branchs */
+
+/* This table desribes how you change sizes for the various types of variable
+   size expressions.  This version only supports two kinds. */
+
+/* Note that calls to frag_var need to specify the maximum expansion needed */
+/* This is currently 10 bytes for DBCC */
+
+/* The fields are:
+	How far Forward this mode will reach:
+	How far Backward this mode will reach:
+	How many bytes this mode will add to the size of the frag
+	Which mode to go to if the offset won't fit in this one
+ */
+const relax_typeS
+md_relax_table[] = {
+{ 1,		1,		0,	0 },	/* First entries aren't used */
+{ 1,		1,		0,	0 },	/* For no good reason except */
+{ 1,		1,		0,	0 },	/* that the VAX doesn't either */
+{ 1,		1,		0,	0 },
+
+{ (127),	(-128),		0,	TAB(BRANCH,SHORT)},
+{ (32767),	(-32768),	2,	TAB(BRANCH,LONG) },
+{ 0,		0,		4,	0 },
+{ 1,		1,		0,	0 },
+
+{ 1,		1,		0,	0 },	/* FBRANCH doesn't come BYTE */
+{ (32767),	(-32768),	2,	TAB(FBRANCH,LONG)},
+{ 0,		0,		4,	0 },
+{ 1,		1,		0,	0 },
+
+{ 1,		1,		0,	0 },	/* PCREL doesn't come BYTE */
+{ (32767),	(-32768),	2,	TAB(PCREL,LONG)},
+{ 0,		0,		4,	0 },
+{ 1,		1,		0,	0 },
+
+{ (127),	(-128),		0,	TAB(BCC68000,SHORT)},
+{ (32767),	(-32768),	2,	TAB(BCC68000,LONG) },
+{ 0,		0,		6,	0 },	/* jmp long space */
+{ 1,		1,		0,	0 },
+
+{ 1,		1,		0,	0 },	/* DBCC doesn't come BYTE */
+{ (32767),	(-32768),	2,	TAB(DBCC,LONG) },
+{ 0,		0,		10,	0 },	/* bra/jmp long space */
+{ 1,		1,		0,	0 },
+
+{ 1,		1,		0,	0 },	/* PCLEA doesn't come BYTE */
+{ 32767,	-32768,		2,	TAB(PCLEA,LONG) },
+{ 0,		0,		6,	0 },
+{ 1,		1,		0,	0 },
+
+};
+
+/* These are the machine dependent pseudo-ops.  These are included so
+   the assembler can work on the output from the SUN C compiler, which
+   generates these.
+ */
+
+/* This table describes all the machine specific pseudo-ops the assembler
+   has to support.  The fields are:
+ 	  pseudo-op name without dot
+	  function to call to execute this pseudo-op
+	  Integer arg to pass to the function
+ */
+const pseudo_typeS md_pseudo_table[] = {
+	{ "data1",	s_data1,	0	},
+	{ "data2",	s_data2,	0	},
+	{ "bss",	s_bss,		0	},
+	{ "even",	s_even,		0	},
+	{ "skip",	s_space,	0	},
+	{ "proc",	s_proc,		0	},
+	{ 0,		0,		0	}
+};
+
+
+/* #define isbyte(x)	((x)>=-128 && (x)<=127) */
+/* #define isword(x)	((x)>=-32768 && (x)<=32767) */
+
+#define issbyte(x)	((x)>=-128 && (x)<=127)
+#define isubyte(x)	((x)>=0 && (x)<=255)
+#define issword(x)	((x)>=-32768 && (x)<=32767)
+#define isuword(x)	((x)>=0 && (x)<=65535)
+
+#define isbyte(x)	((x)>=-128 && (x)<=255)
+#define isword(x)	((x)>=-32768 && (x)<=65535)
+#define islong(x)	(1)
+
+extern char *input_line_pointer;
+
+/* Operands we can parse:  (And associated modes)
+
+numb:	8 bit num
+numw:	16 bit num
+numl:	32 bit num
+dreg:	data reg 0-7
+reg:	address or data register
+areg:	address register
+apc:	address register, PC, ZPC or empty string
+num:	16 or 32 bit num
+num2:	like num
+sz:	w or l		if omitted, l assumed
+scale:	1 2 4 or 8	if omitted, 1 assumed
+
+7.4 IMMED #num				--> NUM
+0.? DREG  dreg				--> dreg
+1.? AREG  areg				--> areg
+2.? AINDR areg@				--> *(areg)
+3.? AINC  areg@+			--> *(areg++)
+4.? ADEC  areg@-			--> *(--areg)
+5.? AOFF  apc@(numw)			--> *(apc+numw)	-- empty string and ZPC not allowed here
+6.? AINDX apc@(num,reg:sz:scale)	--> *(apc+num+reg*scale)
+6.? AINDX apc@(reg:sz:scale)		--> same, with num=0
+6.? APODX apc@(num)@(num2,reg:sz:scale)	--> *(*(apc+num)+num2+reg*scale)
+6.? APODX apc@(num)@(reg:sz:scale)	--> same, with num2=0
+6.? AMIND apc@(num)@(num2)		--> *(*(apc+num)+num2) (previous mode without an index reg)
+6.? APRDX apc@(num,reg:sz:scale)@(num2)	--> *(*(apc+num+reg*scale)+num2)
+6.? APRDX apc@(reg:sz:scale)@(num2)	--> same, with num=0
+7.0 ABSL  num:sz			--> *(num)
+          num				--> *(num) (sz L assumed)
+*** MSCR  otherreg			--> Magic
+With -l option
+5.? AOFF  apc@(num)			--> *(apc+num) -- empty string and ZPC not allowed here still
+
+examples:
+	#foo	#0x35	#12
+	d2
+	a4
+	a3@
+	a5@+
+	a6@-
+	a2@(12)	pc@(14)
+	a1@(5,d2:w:1)	@(45,d6:l:4)
+	pc@(a2)		@(d4)
+	etc . . .
+
+
+#name@(numw)	-->turn into PC rel mode
+apc@(num8,reg:sz:scale)		--> *(apc+num8+reg*scale)
+
+*/
+
+#define IMMED	1
+#define DREG	2
+#define AREG	3
+#define AINDR	4
+#define ADEC	5
+#define AINC	6
+#define AOFF	7
+#define AINDX	8
+#define APODX	9
+#define AMIND	10
+#define APRDX	11
+#define ABSL	12
+#define MSCR	13
+#define REGLST	14
+
+#define FAIL	0
+#define OK	1
+
+/* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7==data reg,
+   8-15==addr reg for operands that take both types */
+#define DATA	1		/*   1- 8 == data registers 0-7 */
+#define ADDR	(DATA+8)	/*   9-16 == address regs 0-7 */
+#define FPREG	(ADDR+8)	/*  17-24 Eight FP registers */
+#define COPNUM	(FPREG+8)	/*  25-32 Co-processor #1-#8 */
+
+#define PC	(COPNUM+8)	/*  33 Program counter */
+#define ZPC	(PC+1)		/*  34 Hack for Program space, but 0 addressing */
+#define SR	(ZPC+1)		/*  35 Status Reg */
+#define CCR	(SR+1)		/*  36 Condition code Reg */
+
+/* These have to be in order for the movec instruction to work. */
+#define USP	(CCR+1)		/*  37 User Stack Pointer */
+#define ISP	(USP+1)		/*  38 Interrupt stack pointer */
+#define SFC	(ISP+1)		/*  39 */
+#define DFC	(SFC+1)		/*  40 */
+#define CACR	(DFC+1)		/*  41 */
+#define VBR	(CACR+1)	/*  42 */
+#define CAAR	(VBR+1)		/*  43 */
+#define MSP	(CAAR+1)	/*  44 */
+
+#define FPI	(MSP+1)		/* 45 */
+#define FPS	(FPI+1)		/* 46 */
+#define FPC	(FPS+1)		/* 47 */
+/*
+ * these defines should be in m68k.c but
+ * i put them here to keep all the m68851 stuff
+ * together -rab
+ * JF--Make sure these #s don't clash with the ones in m68k.c
+ * That would be BAD.
+ */
+#define TC	(FPC+1)		/* 48 */
+#define DRP	(TC+1)		/* 49 */
+#define SRP	(DRP+1)		/* 50 */
+#define CRP	(SRP+1)		/* 51 */
+#define CAL	(CRP+1)		/* 52 */
+#define VAL	(CAL+1)		/* 53 */
+#define SCC	(VAL+1)		/* 54 */
+#define AC	(SCC+1)		/* 55 */
+#define BAD	(AC+1)		/* 56,57,58,59, 60,61,62,63 */
+#define BAC	(BAD+8)		/* 64,65,66,67, 68,69,70,71 */
+#define PSR	(BAC+8)		/* 72 */
+#define PCSR	(PSR+1)		/* 73 */
+
+
+/* Note that COPNUM==processor #1 -- COPNUM+7==#8, which stores as 000 */
+/* I think. . .  */
+
+#define	SP	ADDR+7
+
+/* JF these tables here are for speed at the expense of size */
+/* You can replace them with the #if 0 versions if you really
+   need space and don't mind it running a bit slower */
+
+static char mklower_table[256];
+#define mklower(c) (mklower_table[(unsigned char)(c)])
+static char notend_table[256];
+static char alt_notend_table[256];
+#define notend(s) ( !(notend_table[(unsigned char)(*s)] || (*s==':' &&\
+ alt_notend_table[(unsigned char)(s[1])])))
+
+#if 0
+#define mklower(c)	(isupper(c) ? tolower(c) : c)
+#endif
+
+
+/* JF modified this to handle cases where the first part of a symbol name
+   looks like a register */
+
+int
+m68k_reg_parse(ccp)
+register char **ccp;
+{
+	register char c1,
+		c2,
+		c3,
+		c4;
+	register int n = 0,
+		ret = FAIL;
+
+	c1=mklower(ccp[0][0]);
+#ifdef REGISTER_PREFIX
+	if(c1!=REGISTER_PREFIX)
+		return FAIL;
+	c1=mklower(ccp[0][1]);
+	c2=mklower(ccp[0][2]);
+	c3=mklower(ccp[0][3]);
+	c4=mklower(ccp[0][4]);
+#else
+	c2=mklower(ccp[0][1]);
+	c3=mklower(ccp[0][2]);
+	c4=mklower(ccp[0][3]);
+#endif
+	switch(c1) {
+	case 'a':
+		if(c2>='0' && c2<='7') {
+			n=2;
+			ret=ADDR+c2-'0';
+		}
+#ifdef m68851
+		else if (c2 == 'c') {
+			n = 2;
+			ret = AC;
+		}
+#endif
+		break;
+#ifdef m68851
+	case 'b':
+		if (c2 == 'a') {
+			if (c3 == 'd') {
+				if (c4 >= '0' && c4 <= '7') {
+					n = 4;
+					ret = BAD + c4 - '0';
+				}
+			}
+			if (c3 == 'c') {
+				if (c4 >= '0' && c4 <= '7') {
+					n = 4;
+					ret = BAC + c4 - '0';
+				}
+			}
+		}
+		break;
+#endif
+	case 'c':
+#ifdef m68851
+		if (c2 == 'a' && c3 == 'l') {
+			n = 3;
+			ret = CAL;
+		} else
+#endif
+			/* This supports both CCR and CC as the ccr reg. */
+		if(c2=='c' && c3=='r') {
+			n=3;
+			ret = CCR;
+		} else if(c2=='c') {
+			n=2;
+			ret = CCR;
+		} else if(c2=='a' && (c3=='a' || c3=='c') && c4=='r') {
+			n=4;
+			ret = c3=='a' ? CAAR : CACR;
+		}
+#ifdef m68851
+		else if (c2 == 'r' && c3 == 'p') {
+			n = 3;
+			ret = (CRP);
+		}
+#endif
+		break;
+	case 'd':
+		if(c2>='0' && c2<='7') {
+			n=2;
+			ret = DATA+c2-'0';
+		} else if(c2=='f' && c3=='c') {
+			n=3;
+			ret = DFC;
+		}
+#ifdef m68851
+		else if (c2 == 'r' && c3 == 'p') {
+			n = 3;
+			ret = (DRP);
+		}
+#endif
+		break;
+	case 'f':
+		if(c2=='p') {
+			if(c3>='0' && c3<='7') {
+				n=3;
+				ret = FPREG+c3-'0';
+				if(c4==':')
+					ccp[0][3]=',';
+			} else if(c3=='i') {
+				n=3;
+				ret = FPI;
+			} else if(c3=='s') {
+				n= (c4 == 'r' ? 4 : 3);
+				ret = FPS;
+			} else if(c3=='c') {
+				n= (c4 == 'r' ? 4 : 3);
+				ret = FPC;
+			}
+		}
+		break;
+	case 'i':
+		if(c2=='s' && c3=='p') {
+			n=3;
+			ret = ISP;
+		}
+		break;
+	case 'm':
+		if(c2=='s' && c3=='p') {
+			n=3;
+			ret = MSP;
+		}
+		break;
+	case 'p':
+		if(c2=='c') {
+#ifdef m68851
+			if(c3 == 's' && c4=='r') {
+				n=4;
+				ret = (PCSR);
+			} else
+#endif
+			{
+				n=2;
+				ret = PC;
+			}
+		}
+#ifdef m68851
+		else if (c2 == 's' && c3 == 'r') {
+			n = 3;
+			ret = (PSR);
+		}
+#endif
+		break;
+	case 's':
+#ifdef m68851
+		if (c2 == 'c' && c3 == 'c') {
+			n = 3;
+			ret = (SCC);
+		} else if (c2 == 'r' && c3 == 'p') {
+			n = 3;
+			ret = (SRP);
+		} else
+#endif
+		if(c2=='r') {
+			n=2;
+			ret = SR;
+		} else if(c2=='p') {
+			n=2;
+			ret = ADDR+7;
+		} else if(c2=='f' && c3=='c') {
+			n=3;
+			ret = SFC;
+		}
+		break;
+#ifdef m68851
+	case 't':
+		if(c2 == 'c') {
+			n=2;
+			ret=TC;
+		}
+		break;
+#endif
+	case 'u':
+		if(c2=='s' && c3=='p') {
+			n=3;
+			ret = USP;
+		}
+		break;
+	case 'v':
+#ifdef m68851
+		if (c2 == 'a' && c3 == 'l') {
+			n = 3;
+			ret = (VAL);
+		} else
+#endif
+		if(c2=='b' && c3=='r') {
+			n=3;
+			ret = VBR;
+		}
+		break;
+	case 'z':
+		if(c2=='p' && c3=='c') {
+			n=3;
+			ret = ZPC;
+		}
+		break;
+	default:
+		break;
+	}
+	if(n) {
+#ifdef REGISTER_PREFIX
+		n++;
+#endif
+		if(isalnum(ccp[0][n]) || ccp[0][n]=='_')
+			ret=FAIL;
+		else
+			ccp[0]+=n;
+	} else
+		ret = FAIL;
+	return ret;
+}
+
+#define SKIP_WHITE()	{ str++; if(*str==' ') str++;}
+
+int
+m68k_ip_op(str,opP)
+char *str;
+register struct m68k_op *opP;
+{
+	char	*strend;
+	long	i;
+
+	if(*str==' ')
+		str++;
+		/* Find the end of the string */
+	if(!*str) {
+		/* Out of gas */
+		opP->error="Missing operand";
+		return FAIL;
+	}
+	for(strend=str;*strend;strend++)
+		;
+	--strend;
+
+		/* Guess what:  A constant.  Shar and enjoy */
+	if(*str=='#') {
+		str++;
+		opP->con1=add_exp(str,strend);
+		opP->mode=IMMED;
+		return OK;
+	}
+	i=m68k_reg_parse(&str);
+	if((i==FAIL || *str!='\0') && *str!='@') {
+		char *stmp;
+
+		if(i!=FAIL && (*str=='/' || *str=='-')) {
+			opP->mode=REGLST;
+			return get_regs(i,str,opP);
+		}
+		if((stmp=strchr(str,'@')) != '\0') {
+			opP->con1=add_exp(str,stmp-1);
+			if(stmp==strend) {
+				opP->mode=AINDX;
+				return OK;
+			}
+			stmp++;
+			if(*stmp++!='(' || *strend--!=')') {
+				opP->error="Malformed operand";
+				return FAIL;
+			}
+			i=try_index(&stmp,opP);
+			opP->con2=add_exp(stmp,strend);
+			if(i==FAIL) opP->mode=AMIND;
+			else opP->mode=APODX;
+			return OK;
+		}
+		opP->mode=ABSL;
+		opP->con1=add_exp(str,strend);
+		return OK;
+	}
+	opP->reg=i;
+	if(*str=='\0') {
+		if(i>=DATA+0 && i<=DATA+7)
+			opP->mode=DREG;
+		else if(i>=ADDR+0 && i<=ADDR+7)
+			opP->mode=AREG;
+		else
+			opP->mode=MSCR;
+		return OK;
+	}
+	if((i<ADDR+0 || i>ADDR+7) && i!=PC && i!=ZPC && i!=FAIL) {	/* Can't indirect off non address regs */
+		opP->error="Invalid indirect register";
+		return FAIL;
+	}
+	if(*str!='@')
+		abort();
+	str++;
+	switch(*str) {
+	case '\0':
+		opP->mode=AINDR;
+		return OK;
+	case '-':
+		opP->mode=ADEC;
+		return OK;
+	case '+':
+		opP->mode=AINC;
+		return OK;
+	case '(':
+		str++;
+		break;
+	default:
+		opP->error="Junk after indirect";
+		return FAIL;
+	}
+		/* Some kind of indexing involved.  Lets find out how bad it is */
+	i=try_index(&str,opP);
+		/* Didn't start with an index reg, maybe its offset or offset,reg */
+	if(i==FAIL) {
+		char *beg_str;
+
+		beg_str=str;
+		for(i=1;i;) {
+			switch(*str++) {
+			case '\0':
+				opP->error="Missing )";
+				return FAIL;
+			case ',': i=0; break;
+			case '(': i++; break;
+			case ')': --i; break;
+			}
+		}
+		/* if(str[-3]==':') {
+			int siz;
+
+			switch(str[-2]) {
+			case 'b':
+			case 'B':
+				siz=1;
+				break;
+			case 'w':
+			case 'W':
+				siz=2;
+				break;
+			case 'l':
+			case 'L':
+				siz=3;
+				break;
+			default:
+				opP->error="Specified size isn't :w or :l";
+				return FAIL;
+			}
+			opP->con1=add_exp(beg_str,str-4);
+			opP->con1->e_siz=siz;
+		} else */
+			opP->con1=add_exp(beg_str,str-2);
+			/* Should be offset,reg */
+		if(str[-1]==',') {
+			i=try_index(&str,opP);
+			if(i==FAIL) {
+				opP->error="Malformed index reg";
+				return FAIL;
+			}
+		}
+	}
+		/* We've now got offset)   offset,reg)   or    reg) */
+
+	if(*str=='\0') {
+		/* Th-the-thats all folks */
+		if(opP->reg==FAIL) opP->mode=AINDX;	/* Other form of indirect */
+		else if(opP->ireg==FAIL) opP->mode=AOFF;
+		else opP->mode=AINDX;
+		return OK;
+	}
+		/* Next thing had better be another @ */
+	if(*str!='@' || str[1]!='(') {
+		opP->error="junk after indirect";
+		return FAIL;
+	}
+	str+=2;
+	if(opP->ireg!=FAIL) {
+		opP->mode=APRDX;
+		i=try_index(&str,opP);
+		if(i!=FAIL) {
+			opP->error="Two index registers!  not allowed!";
+			return FAIL;
+		}
+	} else
+		i=try_index(&str,opP);
+	if(i==FAIL) {
+		char *beg_str;
+
+		beg_str=str;
+		for(i=1;i;) {
+			switch(*str++) {
+			case '\0':
+				opP->error="Missing )";
+				return FAIL;
+			case ',': i=0; break;
+			case '(': i++; break;
+			case ')': --i; break;
+			}
+		}
+		opP->con2=add_exp(beg_str,str-2);
+		if(str[-1]==',') {
+			if(opP->ireg!=FAIL) {
+				opP->error="Can't have two index regs";
+				return FAIL;
+			}
+			i=try_index(&str,opP);
+			if(i==FAIL) {
+				opP->error="malformed index reg";
+				return FAIL;
+			}
+			opP->mode=APODX;
+		} else if(opP->ireg!=FAIL)
+			opP->mode=APRDX;
+		else
+			opP->mode=AMIND;
+	} else
+		opP->mode=APODX;
+	if(*str!='\0') {
+		opP->error="Junk after indirect";
+		return FAIL;
+	}
+	return OK;
+}
+
+static int try_index(s,opP)
+char **s;
+struct m68k_op *opP;
+{
+	register int	i;
+	char	*ss;
+#define SKIP_W()	{ ss++; if(*ss==' ') ss++;}
+
+	ss= *s;
+	/* SKIP_W(); */
+	i=m68k_reg_parse(&ss);
+	if(!(i>=DATA+0 && i<=ADDR+7)) {	/* if i is not DATA or ADDR reg */
+		*s=ss;
+		return FAIL;
+	}
+	opP->ireg=i;
+	/* SKIP_W(); */
+	if(*ss==')') {
+		opP->isiz=0;
+		opP->imul=1;
+		SKIP_W();
+		*s=ss;
+		return OK;
+	}
+	if(*ss!=':') {
+		opP->error="Missing : in index register";
+		*s=ss;
+		return FAIL;
+	}
+	SKIP_W();
+	switch(*ss) {
+	case 'w':
+	case 'W':
+		opP->isiz=2;
+		break;
+	case 'l':
+	case 'L':
+		opP->isiz=3;
+		break;
+	default:
+		opP->error="Index register size spec not :w or :l";
+		*s=ss;
+		return FAIL;
+	}
+	SKIP_W();
+	if(*ss==':') {
+		SKIP_W();
+		switch(*ss) {
+		case '1':
+		case '2':
+		case '4':
+		case '8':
+			opP->imul= *ss-'0';
+			break;
+		default:
+			opP->error="index multiplier not 1, 2, 4 or 8";
+			*s=ss;
+			return FAIL;
+		}
+		SKIP_W();
+	} else opP->imul=1;
+	if(*ss!=')') {
+		opP->error="Missing )";
+		*s=ss;
+		return FAIL;
+	}
+	SKIP_W();
+	*s=ss;
+	return OK;
+} /* try_index() */
+
+#ifdef TEST1	/* TEST1 tests m68k_ip_op(), which parses operands */
+main()
+{
+	char buf[128];
+	struct m68k_op thark;
+
+	for(;;) {
+		if(!gets(buf))
+			break;
+		bzero(&thark,sizeof(thark));
+		if(!m68k_ip_op(buf,&thark)) printf("FAIL:");
+		if(thark.error)
+			printf("op1 error %s in %s\n",thark.error,buf);
+		printf("mode %d, reg %d, ",thark.mode,thark.reg);
+		if(thark.b_const)
+			printf("Constant: '%.*s',",1+thark.e_const-thark.b_const,thark.b_const);
+		printf("ireg %d, isiz %d, imul %d ",thark.ireg,thark.isiz,thark.imul);
+		if(thark.b_iadd)
+			printf("Iadd: '%.*s'",1+thark.e_iadd-thark.b_iadd,thark.b_iadd);
+		printf("\n");
+	}
+	exit(0);
+}
+
+#endif
+
+
+static struct hash_control*   op_hash = NULL;	/* handle of the OPCODE hash table
+				   NULL means any use before m68_ip_begin()
+				   will crash */
+
+
+/*
+ *		m 6 8 _ i p ( )
+ *
+ * This converts a string into a 68k instruction.
+ * The string must be a bare single instruction in sun format
+ * with RMS-style 68020 indirects
+ *  (example:  )
+ *
+ * It provides some error messages: at most one fatal error message (which
+ * stops the scan) and at most one warning message for each operand.
+ * The 68k instruction is returned in exploded form, since we have no
+ * knowledge of how you parse (or evaluate) your expressions.
+ * We do however strip off and decode addressing modes and operation
+ * mnemonic.
+ *
+ * This function's value is a string. If it is not "" then an internal
+ * logic error was found: read this code to assign meaning to the string.
+ * No argument string should generate such an error string:
+ * it means a bug in our code, not in the user's text.
+ *
+ * You MUST have called m86_ip_begin() once and m86_ip_end() never before using
+ * this function.
+ */
+
+/* JF this function no longer returns a useful value.  Sorry */
+void
+m68_ip (instring)
+char	*instring;
+{
+	register char *p;
+	register struct m68k_op *opP;
+	register struct m68_incant *opcode;
+	register char *s;
+	register int tmpreg,
+		baseo,
+		outro,
+		nextword;
+	int	siz1,
+		siz2;
+	char	c;
+	int	losing;
+	int	opsfound;
+	LITTLENUM_TYPE words[6];
+	LITTLENUM_TYPE *wordp;
+
+	if (*instring == ' ')
+		instring++;			/* skip leading whitespace */
+
+  /* Scan up to end of operation-code, which MUST end in end-of-string
+     or exactly 1 space. */
+	for (p = instring; *p != '\0'; p++)
+		if (*p == ' ')
+			break;
+
+
+	if (p == instring) {
+		the_ins.error = "No operator";
+		the_ins.opcode[0] = (short) NULL;
+		/* the_ins.numo=1; */
+		return;
+	}
+
+  /* p now points to the end of the opcode name, probably whitespace.
+     make sure the name is null terminated by clobbering the whitespace,
+     look it up in the hash table, then fix it back. */   
+	c = *p;
+	*p = '\0';
+	opcode = (struct m68_incant *)hash_find (op_hash, instring);
+	*p = c;
+
+	if (opcode == NULL) {
+		the_ins.error = "Unknown operator";
+		the_ins.opcode[0] = (short) NULL;
+		/* the_ins.numo=1; */
+		return;
+	}
+
+  /* found a legitimate opcode, start matching operands */
+	for(opP= &the_ins.operands[0];*p;opP++) {
+		p = crack_operand (p, opP);
+		if(opP->error) {
+			the_ins.error=opP->error;
+			return;
+		}
+	}
+
+	opsfound=opP- &the_ins.operands[0];
+	/* This ugly hack is to support the floating pt opcodes in their standard form */
+	/* Essentially, we fake a first enty of type COP#1 */
+	if(opcode->m_operands[0]=='I') {
+		int	n;
+
+		for(n=opsfound;n>0;--n)
+			the_ins.operands[n]=the_ins.operands[n-1];
+
+		/* bcopy((char *)(&the_ins.operands[0]),(char *)(&the_ins.operands[1]),opsfound*sizeof(the_ins.operands[0])); */
+		bzero((char *)(&the_ins.operands[0]),sizeof(the_ins.operands[0]));
+		the_ins.operands[0].mode=MSCR;
+		the_ins.operands[0].reg=COPNUM;		/* COP #1 */
+		opsfound++;
+	}
+		/* We've got the operands.  Find an opcode that'll
+		   accept them */
+	for(losing=0;;) {
+		if(opsfound!=opcode->m_opnum)
+			losing++;
+		else for(s=opcode->m_operands,opP= &the_ins.operands[0];*s && !losing;s+=2,opP++) {
+				/* Warning: this switch is huge! */
+				/* I've tried to organize the cases into  this order:
+				   non-alpha first, then alpha by letter.  lower-case goes directly
+				   before uppercase counterpart. */
+				/* Code with multiple case ...: gets sorted by the lowest case ...
+				   it belongs to.  I hope this makes sense. */
+			switch(*s) {
+			case '!':
+				if(opP->mode==MSCR || opP->mode==IMMED ||
+ opP->mode==DREG || opP->mode==AREG || opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
+					losing++;
+				break;
+
+			case '#':
+				if(opP->mode!=IMMED)
+					losing++;
+				else {
+					long t;
+
+					t=get_num(opP->con1,80);
+					if(s[1]=='b' && !isbyte(t))
+						losing++;
+					else if(s[1]=='w' && !isword(t))
+						losing++;
+				}
+				break;
+
+			case '^':
+			case 'T':
+				if(opP->mode!=IMMED)
+					losing++;
+				break;
+
+			case '$':
+				if(opP->mode==MSCR || opP->mode==AREG ||
+ opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
+					losing++;
+				break;
+
+			case '%':
+				if(opP->mode==MSCR || opP->reg==PC ||
+ opP->reg==ZPC || opP->mode==REGLST)
+					losing++;
+				break;
+
+
+			case '&':
+				if(opP->mode==MSCR || opP->mode==DREG ||
+ opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC ||
+ opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
+					losing++;
+				break;
+
+			case '*':
+				if(opP->mode==MSCR || opP->mode==REGLST)
+					losing++;
+				break;
+
+			case '+':
+				if(opP->mode!=AINC)
+					losing++;
+				break;
+
+			case '-':
+				if(opP->mode!=ADEC)
+					losing++;
+				break;
+
+			case '/':
+				if(opP->mode==MSCR || opP->mode==AREG ||
+ opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->mode==REGLST)
+					losing++;
+				break;
+
+			case ';':
+				if(opP->mode==MSCR || opP->mode==AREG || opP->mode==REGLST)
+					losing++;
+				break;
+
+			case '?':
+				if(opP->mode==MSCR || opP->mode==AREG ||
+ opP->mode==AINC || opP->mode==ADEC || opP->mode==IMMED || opP->reg==PC ||
+ opP->reg==ZPC || opP->mode==REGLST)
+					losing++;
+				break;
+
+			case '@':
+				if(opP->mode==MSCR || opP->mode==AREG ||
+ opP->mode==IMMED || opP->mode==REGLST)
+					losing++;
+				break;
+
+			case '~':		/* For now! (JF FOO is this right?) */
+				if(opP->mode==MSCR || opP->mode==DREG ||
+ opP->mode==AREG || opP->mode==IMMED || opP->reg==PC || opP->reg==ZPC || opP->mode==REGLST)
+					losing++;
+				break;
+
+			case 'A':
+				if(opP->mode!=AREG)
+					losing++;
+				break;
+
+			case 'B':	/* FOO */
+				if(opP->mode!=ABSL)
+					losing++;
+				break;
+
+			case 'C':
+				if(opP->mode!=MSCR || opP->reg!=CCR)
+					losing++;
+				break;
+
+			case 'd':	/* FOO This mode is a KLUDGE!! */
+				if(opP->mode!=AOFF && (opP->mode!=ABSL ||
+ opP->con1->e_beg[0]!='(' || opP->con1->e_end[0]!=')'))
+					losing++;
+				break;
+
+			case 'D':
+				if(opP->mode!=DREG)
+					losing++;
+				break;
+
+			case 'F':
+				if(opP->mode!=MSCR || opP->reg<(FPREG+0) || opP->reg>(FPREG+7))
+					losing++;
+				break;
+
+			case 'I':
+				if(opP->mode!=MSCR || opP->reg<COPNUM ||
+ opP->reg>=COPNUM+7)
+					losing++;
+				break;
+
+			case 'J':
+				if(opP->mode!=MSCR || opP->reg<USP || opP->reg>MSP)
+					losing++;
+				break;
+
+			case 'k':
+				if(opP->mode!=IMMED)
+					losing++;
+				break;
+
+			case 'l':
+			case 'L':
+				if(opP->mode==DREG || opP->mode==AREG || opP->mode==FPREG) {
+					if(s[1]=='8')
+						losing++;
+					else {
+						opP->mode=REGLST;
+						opP->reg=1<<(opP->reg-DATA);
+					}
+				} else if(opP->mode!=REGLST) {
+					losing++;
+				} else if(s[1]=='8' && opP->reg&0x0FFffFF)
+					losing++;
+				else if(s[1]=='3' && opP->reg&0x7000000)
+					losing++;
+				break;
+
+			case 'M':
+				if(opP->mode!=IMMED)
+					losing++;
+				else {
+					long t;
+
+					t=get_num(opP->con1,80);
+					if(!issbyte(t) || isvar(opP->con1))
+						losing++;
+				}
+				break;
+
+			case 'O':
+				if(opP->mode!=DREG && opP->mode!=IMMED)
+					losing++;
+				break;
+
+			case 'Q':
+				if(opP->mode!=IMMED)
+					losing++;
+				else {
+					long t;
+
+					t=get_num(opP->con1,80);
+					if(t<1 || t>8 || isvar(opP->con1))
+						losing++;
+				}
+				break;
+
+			case 'R':
+				if(opP->mode!=DREG && opP->mode!=AREG)
+					losing++;
+				break;
+
+			case 's':
+				if(opP->mode!=MSCR || !(opP->reg==FPI || opP->reg==FPS || opP->reg==FPC))
+					losing++;
+				break;
+
+			case 'S':
+				if(opP->mode!=MSCR || opP->reg!=SR)
+					losing++;
+				break;
+
+			case 'U':
+				if(opP->mode!=MSCR || opP->reg!=USP)
+					losing++;
+				break;
+
+			/* JF these are out of order.  We could put them
+			   in order if we were willing to put up with
+			   bunches of #ifdef m68851s in the code */
+#ifdef m68851
+			/* Memory addressing mode used by pflushr */
+			case '|':
+				if(opP->mode==MSCR || opP->mode==DREG ||
+ opP->mode==AREG || opP->mode==REGLST)
+					losing++;
+				break;
+
+			case 'f':
+				if (opP->mode != MSCR || (opP->reg != SFC && opP->reg != DFC))
+					losing++;
+				break;
+
+			case 'P':
+				if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
+				    opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
+					losing++;
+				break;
+
+			case 'V':
+				if (opP->reg != VAL)
+					losing++;
+				break;
+
+			case 'W':
+				if (opP->mode != MSCR || (opP->reg != DRP && opP->reg != SRP &&
+				    opP->reg != CRP))
+					losing++;
+				break;
+
+			case 'X':
+				if (opP->mode != MSCR ||
+				    (!(opP->reg >= BAD && opP->reg <= BAD+7) &&
+				     !(opP->reg >= BAC && opP->reg <= BAC+7)))
+					losing++;
+				break;
+
+			case 'Y':
+				if (opP->reg != PSR)
+					losing++;
+				break;
+
+			case 'Z':
+				if (opP->reg != PCSR)
+					losing++;
+				break;
+#endif
+			default:
+				as_fatal("Internal error:  Operand mode %c unknown in line %s of file \"%s\"",
+					 *s, __LINE__, __FILE__);
+			}
+		}
+		if(!losing)
+			break;
+		opcode=opcode->m_next;
+		if(!opcode) {		/* Fell off the end */
+			the_ins.error="instruction/operands mismatch";
+			return;
+		}
+		losing=0;
+	}
+	the_ins.args=opcode->m_operands;
+	the_ins.numargs=opcode->m_opnum;
+	the_ins.numo=opcode->m_codenum;
+	the_ins.opcode[0]=getone(opcode);
+	the_ins.opcode[1]=gettwo(opcode);
+
+	for(s=the_ins.args,opP= &the_ins.operands[0];*s;s+=2,opP++) {
+			/* This switch is a doozy.
+			   What the first step; its a big one! */
+		switch(s[0]) {
+
+		case '*':
+		case '~':
+		case '%':
+		case ';':
+		case '@':
+		case '!':
+		case '&':
+		case '$':
+		case '?':
+		case '/':
+#ifdef m68851
+		case '|':
+#endif
+			switch(opP->mode) {
+			case IMMED:
+				tmpreg=0x3c;	/* 7.4 */
+				if(strchr("bwl",s[1])) nextword=get_num(opP->con1,80);
+				else nextword=nextword=get_num(opP->con1,0);
+				if(isvar(opP->con1))
+					add_fix(s[1],opP->con1,0);
+				switch(s[1]) {
+				case 'b':
+					if(!isbyte(nextword))
+						opP->error="operand out of range";
+					addword(nextword);
+					baseo=0;
+					break;
+				case 'w':
+					if(!isword(nextword))
+						opP->error="operand out of range";
+					addword(nextword);
+					baseo=0;
+					break;
+				case 'l':
+					addword(nextword>>16);
+					addword(nextword);
+					baseo=0;
+					break;
+
+				case 'f':
+					baseo=2;
+					outro=8;
+					break;
+				case 'F':
+					baseo=4;
+					outro=11;
+					break;
+				case 'x':
+					baseo=6;
+					outro=15;
+					break;
+				case 'p':
+					baseo=6;
+					outro= -1;
+					break;
+				default:
+					as_fatal("Internal error:  Can't decode %c%c in line %s of file \"%s\"",
+						 *s, s[1], __LINE__, __FILE__);
+				}
+				if(!baseo)
+					break;
+
+				/* We gotta put out some float */
+				if(seg(opP->con1)!=SEG_BIG) {
+					int_to_gen(nextword);
+					gen_to_words(words,baseo,(long)outro);
+					for(wordp=words;baseo--;wordp++)
+						addword(*wordp);
+					break;
+				}		/* Its BIG */
+				if(offs(opP->con1)>0) {
+					as_warn("Bignum assumed to be binary bit-pattern");
+					if(offs(opP->con1)>baseo) {
+						as_bad("Bignum too big for %c format; truncated",s[1]);
+						offs(opP->con1)=baseo;
+					}
+					baseo-=offs(opP->con1);
+					for(wordp=generic_bignum+offs(opP->con1)-1;offs(opP->con1)--;--wordp)
+						addword(*wordp);
+					while(baseo--)
+						addword(0);
+					break;
+				}
+				gen_to_words(words,baseo,(long)outro);
+				for(wordp=words;baseo--;wordp++)
+					addword(*wordp);
+				break;
+			case DREG:
+				tmpreg=opP->reg-DATA; /* 0.dreg */
+				break;
+			case AREG:
+				tmpreg=0x08+opP->reg-ADDR; /* 1.areg */
+				break;
+			case AINDR:
+				tmpreg=0x10+opP->reg-ADDR; /* 2.areg */
+				break;
+			case ADEC:
+				tmpreg=0x20+opP->reg-ADDR; /* 4.areg */
+				break;
+			case AINC:
+				tmpreg=0x18+opP->reg-ADDR; /* 3.areg */
+				break;
+			case AOFF:
+
+				nextword=get_num(opP->con1,80);
+				/* Force into index mode.  Hope this works */
+
+				/* We do the first bit for 32-bit displacements,
+				   and the second bit for 16 bit ones.  It is
+				   possible that we should make the default be
+				   WORD instead of LONG, but I think that'd
+				   break GCC, so we put up with a little
+				   inefficiency for the sake of working output.
+				 */
+
+				if(   !issword(nextword)
+				   || (   isvar(opP->con1)
+				       && (  (   opP->con1->e_siz==0
+					      && flagseen['l']==0)
+					   || opP->con1->e_siz==3))) {
+
+					if(opP->reg==PC)
+						tmpreg=0x3B;	/* 7.3 */
+					else
+						tmpreg=0x30+opP->reg-ADDR;	/* 6.areg */
+					if(isvar(opP->con1)) {
+						if(opP->reg==PC) {
+						       add_frag(adds(opP->con1),
+							 offs(opP->con1),
+							 TAB(PCLEA,SZ_UNDEF));
+							break;
+						} else {
+							addword(0x0170);
+							add_fix('l',opP->con1,1);
+						}
+					} else
+						addword(0x0170);
+					addword(nextword>>16);
+				} else {
+					if(opP->reg==PC)
+						tmpreg=0x3A; /* 7.2 */
+					else
+						tmpreg=0x28+opP->reg-ADDR; /* 5.areg */
+
+					if(isvar(opP->con1)) {
+						if(opP->reg==PC) {
+							add_fix('w',opP->con1,1);
+						} else
+							add_fix('w',opP->con1,0);
+						}
+				}
+				addword(nextword);
+				break;
+			case AINDX:
+			case APODX:
+			case AMIND:
+			case APRDX:
+				nextword=0;
+				baseo=get_num(opP->con1,80);
+				outro=get_num(opP->con2,80);
+					/* Figure out the 'addressing mode' */
+					/* Also turn on the BASE_DISABLE bit, if needed */
+				if(opP->reg==PC || opP->reg==ZPC) {
+					tmpreg=0x3b; /* 7.3 */
+					if(opP->reg==ZPC)
+						nextword|=0x80;
+				} else if(opP->reg==FAIL) {
+					nextword|=0x80;
+					tmpreg=0x30;	/* 6.garbage */
+				} else tmpreg=0x30+opP->reg-ADDR; /* 6.areg */
+
+				siz1= (opP->con1) ? opP->con1->e_siz : 0;
+				siz2= (opP->con2) ? opP->con2->e_siz : 0;
+
+					/* Index register stuff */
+				if(opP->ireg>=DATA+0 && opP->ireg<=ADDR+7) {
+					nextword|=(opP->ireg-DATA)<<12;
+
+					if(opP->isiz==0 || opP->isiz==3)
+						nextword|=0x800;
+					switch(opP->imul) {
+					case 1: break;
+					case 2: nextword|=0x200; break;
+					case 4: nextword|=0x400; break;
+					case 8: nextword|=0x600; break;
+					default: abort();
+					}
+						/* IF its simple,
+						   GET US OUT OF HERE! */
+
+						/* Must be INDEX, with an index
+						   register.  Address register
+						   cannot be ZERO-PC, and either
+						   :b was forced, or we know
+						   it will fit */
+					if(   opP->mode==AINDX
+					   && opP->reg!=FAIL
+					   && opP->reg!=ZPC
+					   && (   siz1==1
+					       || (   issbyte(baseo)
+						   && !isvar(opP->con1)))) {
+						nextword +=baseo&0xff;
+						addword(nextword);
+						if(isvar(opP->con1))
+							add_fix('B',opP->con1,0);
+						break;
+					}
+				} else
+					nextword|=0x40;	/* No index reg */
+
+					/* It aint simple */
+				nextword|=0x100;
+					/* If the guy specified a width, we assume that
+					   it is wide enough.  Maybe it isn't.  Ifso, we lose
+					 */
+				switch(siz1) {
+				case 0:
+					if(isvar(opP->con1) || !issword(baseo)) {
+						siz1=3;
+						nextword|=0x30;
+					} else if(baseo==0)
+						nextword|=0x10;
+					else {	
+						nextword|=0x20;
+						siz1=2;
+					}
+					break;
+				case 1:
+					as_warn("Byte dispacement won't work.  Defaulting to :w");
+				case 2:
+					nextword|=0x20;
+					break;
+				case 3:
+					nextword|=0x30;
+					break;
+				}
+
+					/* Figure out innner displacement stuff */
+				if(opP->mode!=AINDX) {
+					switch(siz2) {
+					case 0:
+						if(isvar(opP->con2) || !issword(outro)) {
+							siz2=3;
+							nextword|=0x3;
+						} else if(outro==0)
+							nextword|=0x1;
+						else {	
+							nextword|=0x2;
+							siz2=2;
+						}
+						break;
+					case 1:
+						as_warn("Byte dispacement won't work.  Defaulting to :w");
+					case 2:
+						nextword|=0x2;
+						break;
+					case 3:
+						nextword|=0x3;
+						break;
+					}
+					if(opP->mode==APODX) nextword|=0x04;
+					else if(opP->mode==AMIND) nextword|=0x40;
+				}
+				addword(nextword);
+
+				if(isvar(opP->con1)) {
+					if(opP->reg==PC || opP->reg==ZPC) {
+						add_fix(siz1==3 ? 'l' : 'w',opP->con1,1);
+						opP->con1->e_exp.X_add_number+=6;
+					} else
+						add_fix(siz1==3 ? 'l' : 'w',opP->con1,0);
+				}
+				if(siz1==3)
+					addword(baseo>>16);
+				if(siz1)
+					addword(baseo);
+
+				if(isvar(opP->con2)) {
+					if(opP->reg==PC || opP->reg==ZPC) {
+						add_fix(siz2==3 ? 'l' : 'w',opP->con2,1);
+						opP->con1->e_exp.X_add_number+=6;
+					} else
+						add_fix(siz2==3 ? 'l' : 'w',opP->con2,0);
+				}
+				if(siz2==3)
+					addword(outro>>16);
+				if(siz2)
+					addword(outro);
+
+				break;
+
+			case ABSL:
+				nextword=get_num(opP->con1,80);
+				switch(opP->con1->e_siz) {
+				default:
+					as_bad("Unknown size for absolute reference");
+				case 0:
+					if(!isvar(opP->con1) && issword(offs(opP->con1))) {
+						tmpreg=0x38; /* 7.0 */
+						addword(nextword);
+						break;
+					}
+					if(isvar(opP->con1) &&
+					   !subs(opP->con1) &&
+					   !strchr("~%&$?", s[0])) {
+						tmpreg=0x3A; /* 7.2 */
+						add_frag(adds(opP->con1),
+							 offs(opP->con1),
+							 TAB(PCREL,SZ_UNDEF));
+						break;
+					}
+				case 3:		/* Fall through into long */
+					if(isvar(opP->con1))
+						add_fix('l',opP->con1,0);
+
+					tmpreg=0x39;	/* 7.1 mode */
+					addword(nextword>>16);
+					addword(nextword);
+					break;
+
+				case 2:		/* Word */
+					if(isvar(opP->con1))
+						add_fix('w',opP->con1,0);
+
+					tmpreg=0x38;	/* 7.0 mode */
+					addword(nextword);
+					break;
+				}
+				break;
+			case MSCR:
+			default:
+				as_bad("unknown/incorrect operand");
+				/* abort(); */
+			}
+			install_gen_operand(s[1],tmpreg);
+			break;
+
+		case '#':
+		case '^':
+			switch(s[1]) {	/* JF: I hate floating point! */
+			case 'j':
+				tmpreg=70;
+				break;
+			case '8':
+				tmpreg=20;
+				break;
+			case 'C':
+				tmpreg=50;
+				break;
+			case '3':
+			default:
+				tmpreg=80;
+				break;
+			}
+			tmpreg=get_num(opP->con1,tmpreg);
+			if(isvar(opP->con1))
+				add_fix(s[1],opP->con1,0);
+			switch(s[1]) {
+			case 'b':	/* Danger:  These do no check for
+					   certain types of overflow.
+					   user beware! */
+				if(!isbyte(tmpreg))
+					opP->error="out of range";
+				insop(tmpreg);
+				if(isvar(opP->con1))
+					the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
+				break;
+			case 'w':
+				if(!isword(tmpreg))
+					opP->error="out of range";
+				insop(tmpreg);
+				if(isvar(opP->con1))
+					the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
+				break;
+			case 'l':
+				insop(tmpreg);		/* Because of the way insop works, we put these two out backwards */
+				insop(tmpreg>>16);
+				if(isvar(opP->con1))
+					the_ins.reloc[the_ins.nrel-1].n=(opcode->m_codenum)*2;
+				break;
+			case '3':
+				tmpreg&=0xFF;
+			case '8':
+			case 'C':
+				install_operand(s[1],tmpreg);
+				break;
+			default:
+				as_fatal("Internal error:  Unknown mode #%c in line %s of file \"%s\"", s[1], __LINE__, __FILE__);
+			}
+			break;
+
+		case '+':
+		case '-':
+		case 'A':
+			install_operand(s[1],opP->reg-ADDR);
+			break;
+
+		case 'B':
+			tmpreg=get_num(opP->con1,80);
+			switch(s[1]) {
+			case 'g':
+				if(opP->con1->e_siz) {	/* Deal with fixed size stuff by hand */
+					switch(opP->con1->e_siz) {
+					case 1:
+						add_fix('b',opP->con1,1);
+						break;
+					case 2:
+						add_fix('w',opP->con1,1);
+						addword(0);
+						break;
+					case 3:
+						add_fix('l',opP->con1,1);
+						addword(0);
+						addword(0);
+						break;
+					default:
+						as_bad("Bad size for expression %d", opP->con1->e_siz);
+					}
+				} else if(subs(opP->con1)) {
+						/* We can't relax it */
+					the_ins.opcode[the_ins.numo-1]|=0xff;
+					add_fix('l',opP->con1,1);
+					addword(0);
+					addword(0);
+				} else if(adds(opP->con1)) {
+					if (flagseen['m'] && 
+					    (the_ins.opcode[0] >= 0x6200) &&
+					    (the_ins.opcode[0] <= 0x6f00)) {
+					  add_frag(adds(opP->con1),offs(opP->con1),TAB(BCC68000,SZ_UNDEF));
+					} else {
+						add_frag(adds(opP->con1),offs(opP->con1),TAB(BRANCH,SZ_UNDEF));
+					}
+				} else {
+					/* JF:  This is the WRONG thing to do
+					add_frag((symbolS *)0,offs(opP->con1),TAB(BRANCH,BYTE)); */
+					the_ins.opcode[the_ins.numo-1]|=0xff;
+					offs(opP->con1)+=4;
+					add_fix('l',opP->con1,1);
+					addword(0);
+					addword(0);
+				}
+				break;
+			case 'w':
+				if(isvar(opP->con1)) {
+				    /* check for DBcc instruction */
+					if ((the_ins.opcode[0] & 0xf0f8) ==0x50c8) {
+					    /* size varies if patch */
+					    /* needed for long form */
+						add_frag(adds(opP->con1),offs(opP->con1),TAB(DBCC,SZ_UNDEF));
+						break;
+					}
+
+						/* Don't ask! */
+					opP->con1->e_exp.X_add_number+=2;
+					add_fix('w',opP->con1,1);
+				}
+				addword(0);
+				break;
+			case 'c':
+				if(opP->con1->e_siz) {
+					switch(opP->con1->e_siz) {
+					case 2:
+						add_fix('w',opP->con1,1)
+						addword(0);
+						break;
+					case 3:
+						the_ins.opcode[the_ins.numo-1]|=0x40;
+						add_fix('l',opP->con1,1);
+						addword(0);
+						addword(0);
+						break;
+					default:
+						as_bad("Bad size for offset, must be word or long");
+						break;
+					}
+				} else if(subs(opP->con1)) {
+					add_fix('l',opP->con1,1);
+					add_frag((symbolS *)0,(long)0,TAB(FBRANCH,LONG));
+				} else if(adds(opP->con1)) {
+					add_frag(adds(opP->con1),offs(opP->con1),TAB(FBRANCH,SZ_UNDEF));
+				} else {
+					/* add_frag((symbolS *)0,offs(opP->con1),TAB(FBRANCH,SHORT)); */
+					the_ins.opcode[the_ins.numo-1]|=0x40;
+					add_fix('l',opP->con1,1);
+					addword(0);
+					addword(4);
+				}
+				break;
+			default:
+				as_fatal("Internal error:  operand type B%c unknown in line %s of file \"%s\"",
+					 s[1], __LINE__, __FILE__);
+			}
+			break;
+
+		case 'C':		/* Ignore it */
+			break;
+
+		case 'd':		/* JF this is a kludge */
+			if(opP->mode==AOFF) {
+				install_operand('s',opP->reg-ADDR);
+			} else {
+				char *tmpP;
+
+				tmpP=opP->con1->e_end-2;
+				opP->con1->e_beg++;
+				opP->con1->e_end-=4;	/* point to the , */
+				baseo=m68k_reg_parse(&tmpP);
+				if(baseo<ADDR+0 || baseo>ADDR+7) {
+					as_bad("Unknown address reg, using A0");
+					baseo=0;
+				} else baseo-=ADDR;
+				install_operand('s',baseo);
+			}
+			tmpreg=get_num(opP->con1,80);
+			if(!issword(tmpreg)) {
+				as_bad("Expression out of range, using 0");
+				tmpreg=0;
+			}
+			addword(tmpreg);
+			break;
+
+		case 'D':
+			install_operand(s[1],opP->reg-DATA);
+			break;
+
+		case 'F':
+			install_operand(s[1],opP->reg-FPREG);
+			break;
+
+		case 'I':
+			tmpreg=1+opP->reg-COPNUM;
+			if(tmpreg==8)
+				tmpreg=0;
+			install_operand(s[1],tmpreg);
+			break;
+
+		case 'J':		/* JF foo */
+			switch(opP->reg) {
+			case SFC:
+				tmpreg=0;
+				break;
+			case DFC:
+				tmpreg=0x001;
+				break;
+			case CACR:
+				tmpreg=0x002;
+				break;
+			case USP:
+				tmpreg=0x800;
+				break;
+			case VBR:
+				tmpreg=0x801;
+				break;
+			case CAAR:
+				tmpreg=0x802;
+				break;
+			case MSP:
+				tmpreg=0x803;
+				break;
+			case ISP:
+				tmpreg=0x804;
+				break;
+			default:
+				abort();
+			}
+			install_operand(s[1],tmpreg);
+			break;
+
+		case 'k':
+			tmpreg=get_num(opP->con1,55);
+			install_operand(s[1],tmpreg&0x7f);
+			break;
+
+		case 'l':
+			tmpreg=opP->reg;
+			if(s[1]=='w') {
+				if(tmpreg&0x7FF0000)
+					as_bad("Floating point register in register list");
+				insop(reverse_16_bits(tmpreg));
+			} else {
+				if(tmpreg&0x700FFFF)
+					as_bad("Wrong register in floating-point reglist");
+				install_operand(s[1],reverse_8_bits(tmpreg>>16));
+			}
+			break;
+
+		case 'L':
+			tmpreg=opP->reg;
+			if(s[1]=='w') {
+				if(tmpreg&0x7FF0000)
+					as_bad("Floating point register in register list");
+				insop(tmpreg);
+			} else if(s[1]=='8') {
+				if(tmpreg&0x0FFFFFF)
+					as_bad("incorrect register in reglist");
+				install_operand(s[1],tmpreg>>24);
+			} else {
+				if(tmpreg&0x700FFFF)
+					as_bad("wrong register in floating-point reglist");
+				else
+					install_operand(s[1],tmpreg>>16);
+			}
+			break;
+
+		case 'M':
+			install_operand(s[1],get_num(opP->con1,60));
+			break;
+
+		case 'O':
+			tmpreg= (opP->mode==DREG)
+				? 0x20+opP->reg-DATA
+				: (get_num(opP->con1,40)&0x1F);
+			install_operand(s[1],tmpreg);
+			break;
+
+		case 'Q':
+			tmpreg=get_num(opP->con1,10);
+			if(tmpreg==8)
+				tmpreg=0;
+			install_operand(s[1],tmpreg);
+			break;
+
+		case 'R':
+			/* This depends on the fact that ADDR registers are
+			   eight more than their corresponding DATA regs, so
+			   the result will have the ADDR_REG bit set */
+			install_operand(s[1],opP->reg-DATA);
+			break;
+
+		case 's':
+			if(opP->reg==FPI) tmpreg=0x1;
+			else if(opP->reg==FPS) tmpreg=0x2;
+			else if(opP->reg==FPC) tmpreg=0x4;
+			else abort();
+			install_operand(s[1],tmpreg);
+			break;
+
+		case 'S':	/* Ignore it */
+			break;
+
+		case 'T':
+			install_operand(s[1],get_num(opP->con1,30));
+			break;
+
+		case 'U':	/* Ignore it */
+			break;
+
+#ifdef m68851
+			/* JF: These are out of order, I fear. */
+		case 'f':
+			switch (opP->reg) {
+			case SFC:
+				tmpreg=0;
+				break;
+			case DFC:
+				tmpreg=1;
+				break;
+			default:
+				abort();
+			}
+			install_operand(s[1],tmpreg);
+			break;
+
+		case 'P':
+			switch(opP->reg) {
+			case TC:
+				tmpreg=0;
+				break;
+			case CAL:
+				tmpreg=4;
+				break;
+			case VAL:
+				tmpreg=5;
+				break;
+			case SCC:
+				tmpreg=6;
+				break;
+			case AC:
+				tmpreg=7;
+				break;
+			default:
+				abort();
+			}
+			install_operand(s[1],tmpreg);
+			break;
+
+		case 'V':
+			if (opP->reg == VAL)
+				break;
+			abort();
+
+		case 'W':
+			switch(opP->reg) {
+
+			case DRP:
+				tmpreg=1;
+				break;
+			case SRP:
+				tmpreg=2;
+				break;
+			case CRP:
+				tmpreg=3;
+				break;
+			default:
+				abort();
+			}
+			install_operand(s[1],tmpreg);
+			break;
+
+		case 'X':
+			switch (opP->reg) {
+			case BAD: case BAD+1: case BAD+2: case BAD+3:
+			case BAD+4: case BAD+5: case BAD+6: case BAD+7:
+				tmpreg = (4 << 10) | ((opP->reg - BAD) << 2);
+				break;
+
+			case BAC: case BAC+1: case BAC+2: case BAC+3:
+			case BAC+4: case BAC+5: case BAC+6: case BAC+7:
+				tmpreg = (5 << 10) | ((opP->reg - BAC) << 2);
+				break;
+
+			default:
+				abort();
+			}
+			install_operand(s[1], tmpreg);
+			break;
+		case 'Y':
+			if (opP->reg == PSR)
+				break;
+			abort();
+
+		case 'Z':
+			if (opP->reg == PCSR)
+				break;
+			abort();
+#endif /* m68851 */
+		default:
+			as_fatal("Internal error:  Operand type %c unknown in line %s of file \"%s\"", s[0], __LINE__, __FILE__);
+		}
+	}
+	/* By the time whe get here (FINALLY) the_ins contains the complete
+	   instruction, ready to be emitted. . . */
+}
+
+static int get_regs(i,str,opP)
+int i;
+struct m68k_op *opP;
+char *str;
+{
+	/*			     26, 25, 24, 23-16,  15-8, 0-7 */
+	/* Low order 24 bits encoded fpc,fps,fpi,fp7-fp0,a7-a0,d7-d0 */
+	unsigned long cur_regs = 0;
+	int	reg1,
+		reg2;
+
+#define ADD_REG(x)	{     if(x==FPI) cur_regs|=(1<<24);\
+			 else if(x==FPS) cur_regs|=(1<<25);\
+			 else if(x==FPC) cur_regs|=(1<<26);\
+			 else cur_regs|=(1<<(x-1));  }
+
+	reg1=i;
+	for(;;) {
+		if(*str=='/') {
+			ADD_REG(reg1);
+			str++;
+		} else if(*str=='-') {
+			str++;
+			reg2=m68k_reg_parse(&str);
+			if(reg2<DATA || reg2>=FPREG+8 || reg1==FPI || reg1==FPS || reg1==FPC) {
+				opP->error="unknown register in register list";
+				return FAIL;
+			}
+			while(reg1<=reg2) {
+				ADD_REG(reg1);
+				reg1++;
+			}
+			if(*str=='\0')
+				break;
+		} else if(*str=='\0') {
+			ADD_REG(reg1);
+			break;
+		} else {
+			opP->error="unknow character in register list";
+			return FAIL;
+		}
+/* DJA -- Bug Fix.  Did't handle d1-d2/a1 until the following instruction was added */
+		if (*str=='/')
+		  str ++;
+		reg1=m68k_reg_parse(&str);
+		if((reg1<DATA || reg1>=FPREG+8) && !(reg1==FPI || reg1==FPS || reg1==FPC)) {
+			opP->error="unknown register in register list";
+			return FAIL;
+		}
+	}
+	opP->reg=cur_regs;
+	return OK;
+} /* get_regs() */
+
+static int reverse_16_bits(in)
+int in;
+{
+	int out=0;
+	int n;
+
+	static int mask[16] = {
+0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
+0x0100,0x0200,0x0400,0x0800,0x1000,0x2000,0x4000,0x8000
+	};
+	for(n=0;n<16;n++) {
+		if(in&mask[n])
+			out|=mask[15-n];
+	}
+	return out;
+} /* reverse_16_bits() */
+
+static int reverse_8_bits(in)
+int in;
+{
+	int out=0;
+	int n;
+
+	static int mask[8] = {
+0x0001,0x0002,0x0004,0x0008,0x0010,0x0020,0x0040,0x0080,
+	};
+
+	for(n=0;n<8;n++) {
+		if(in&mask[n])
+			out|=mask[7-n];
+	}
+	return out;
+} /* reverse_8_bits() */
+
+static void install_operand(mode,val)
+int mode;
+int val;
+{
+	switch(mode) {
+	case 's':
+		the_ins.opcode[0]|=val & 0xFF;	/* JF FF is for M kludge */
+		break;
+	case 'd':
+		the_ins.opcode[0]|=val<<9;
+		break;
+	case '1':
+		the_ins.opcode[1]|=val<<12;
+		break;
+	case '2':
+		the_ins.opcode[1]|=val<<6;
+		break;
+	case '3':
+		the_ins.opcode[1]|=val;
+		break;
+	case '4':
+		the_ins.opcode[2]|=val<<12;
+		break;
+	case '5':
+		the_ins.opcode[2]|=val<<6;
+		break;
+	case '6':
+			/* DANGER!  This is a hack to force cas2l and cas2w cmds
+			   to be three words long! */
+		the_ins.numo++;
+		the_ins.opcode[2]|=val;
+		break;
+	case '7':
+		the_ins.opcode[1]|=val<<7;
+		break;
+	case '8':
+		the_ins.opcode[1]|=val<<10;
+		break;
+#ifdef m68851
+	case '9':
+		the_ins.opcode[1]|=val<<5;
+		break;
+#endif
+
+	case 't':
+		the_ins.opcode[1]|=(val<<10)|(val<<7);
+		break;
+	case 'D':
+		the_ins.opcode[1]|=(val<<12)|val;
+		break;
+	case 'g':
+		the_ins.opcode[0]|=val=0xff;
+		break;
+	case 'i':
+		the_ins.opcode[0]|=val<<9;
+		break;
+	case 'C':
+		the_ins.opcode[1]|=val;
+		break;
+	case 'j':
+		the_ins.opcode[1]|=val;
+		the_ins.numo++;		/* What a hack */
+		break;
+	case 'k':
+		the_ins.opcode[1]|=val<<4;
+		break;
+	case 'b':
+	case 'w':
+	case 'l':
+		break;
+	case 'c':
+	default:
+		abort();
+	}
+} /* install_operand() */
+
+static void install_gen_operand(mode,val)
+int mode;
+int val;
+{
+	switch(mode) {
+	case 's':
+		the_ins.opcode[0]|=val;
+		break;
+	case 'd':
+			/* This is a kludge!!! */
+		the_ins.opcode[0]|=(val&0x07)<<9|(val&0x38)<<3;
+		break;
+	case 'b':
+	case 'w':
+	case 'l':
+	case 'f':
+	case 'F':
+	case 'x':
+	case 'p':
+		the_ins.opcode[0]|=val;
+		break;
+		/* more stuff goes here */
+	default:
+		abort();
+	}
+} /* install_gen_operand() */
+
+static char *crack_operand(str,opP)
+register char *str;
+register struct m68k_op *opP;
+{
+	register int parens;
+	register int c;
+	register char *beg_str;
+
+	if(!str) {
+		return str;
+	}
+	beg_str=str;
+	for(parens=0;*str && (parens>0 || notend(str));str++) {
+		if(*str=='(') parens++;
+		else if(*str==')') {
+			if(!parens) {		/* ERROR */
+				opP->error="Extra )";
+				return str;
+			}
+			--parens;
+		}
+	}
+	if(!*str && parens) {		/* ERROR */
+		opP->error="Missing )";
+		return str;
+	}
+	c= *str;
+	*str='\0';
+	if(m68k_ip_op(beg_str,opP)==FAIL) {
+		*str=c;
+		return str;
+	}
+	*str=c;
+	if(c=='}')
+		c= *++str;		/* JF bitfield hack */
+	if(c) {
+		c= *++str;
+		if(!c)
+			as_bad("Missing operand");
+	}
+	return str;
+}
+
+/* See the comment up above where the #define notend(... is */
+#if 0
+notend(s)
+char *s;
+{
+	if(*s==',') return 0;
+	if(*s=='{' || *s=='}')
+		return 0;
+	if(*s!=':') return 1;
+		/* This kludge here is for the division cmd, which is a kludge */
+	if(strchr("aAdD#",s[1])) return 0;
+	return 1;
+}
+#endif
+
+/* This is the guts of the machine-dependent assembler.  STR points to a
+   machine dependent instruction.  This funciton is supposed to emit
+   the frags/bytes it assembles to.
+ */
+void
+md_assemble(str)
+char *str;
+{
+	char *er;
+	short	*fromP;
+	char	*toP;
+	int	m,n;
+	char	*to_beg_P;
+	int	shorts_this_frag;
+
+	bzero((char *)(&the_ins),sizeof(the_ins));	/* JF for paranoia sake */
+	m68_ip(str);
+	er=the_ins.error;
+	if(!er) {
+		for(n=the_ins.numargs;n;--n)
+			if(the_ins.operands[n].error) {
+				er=the_ins.operands[n].error;
+				break;
+			}
+	}
+	if(er) {
+		as_bad("\"%s\" -- Statement '%s' ignored",er,str);
+		return;
+	}
+
+	if(the_ins.nfrag==0) {	/* No frag hacking involved; just put it out */
+		toP=frag_more(2*the_ins.numo);
+		fromP= &the_ins.opcode[0];
+		for(m=the_ins.numo;m;--m) {
+			md_number_to_chars(toP,(long)(*fromP),2);
+			toP+=2;
+			fromP++;
+		}
+			/* put out symbol-dependent info */
+		for(m=0;m<the_ins.nrel;m++) {
+			switch(the_ins.reloc[m].wid) {
+			case 'B':
+				n=1;
+				break;
+			case 'b':
+				n=1;
+				break;
+			case '3':
+				n=2;
+				break;
+			case 'w':
+				n=2;
+				break;
+			case 'l':
+				n=4;
+				break;
+			default:
+				as_fatal("Don't know how to figure width of %c in md_assemble()",the_ins.reloc[m].wid);
+			}
+
+			fix_new(frag_now,
+				(toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
+				n,
+				the_ins.reloc[m].add,
+				the_ins.reloc[m].sub,
+				the_ins.reloc[m].off,
+				the_ins.reloc[m].pcrel,
+				NO_RELOC);
+		}
+		return;
+	}
+
+		/* There's some frag hacking */
+	for(n=0,fromP= &the_ins.opcode[0];n<the_ins.nfrag;n++) {
+		int wid;
+
+		if(n==0) wid=2*the_ins.fragb[n].fragoff;
+		else wid=2*(the_ins.numo-the_ins.fragb[n-1].fragoff);
+		toP=frag_more(wid);
+		to_beg_P=toP;
+		shorts_this_frag=0;
+		for(m=wid/2;m;--m) {
+			md_number_to_chars(toP,(long)(*fromP),2);
+			toP+=2;
+			fromP++;
+			shorts_this_frag++;
+		}
+		for(m=0;m<the_ins.nrel;m++) {
+			if((the_ins.reloc[m].n)>= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */) {
+				the_ins.reloc[m].n-= 2*shorts_this_frag /* 2*the_ins.fragb[n].fragoff */;
+				break;
+			}
+			wid=the_ins.reloc[m].wid;
+			if(wid==0)
+				continue;
+			the_ins.reloc[m].wid=0;
+			wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
+
+			fix_new(frag_now,
+			    (toP-frag_now->fr_literal)-the_ins.numo*2+the_ins.reloc[m].n,
+			    wid,
+			    the_ins.reloc[m].add,
+			    the_ins.reloc[m].sub,
+			    the_ins.reloc[m].off,
+			    the_ins.reloc[m].pcrel,
+				NO_RELOC);
+		}
+		know(the_ins.fragb[n].fadd);
+		(void)frag_var(rs_machine_dependent,10,0,(relax_substateT)(the_ins.fragb[n].fragty),
+ the_ins.fragb[n].fadd,the_ins.fragb[n].foff,to_beg_P);
+	}
+	n=(the_ins.numo-the_ins.fragb[n-1].fragoff);
+	shorts_this_frag=0;
+	if(n) {
+		toP=frag_more(n*sizeof(short));
+		while(n--) {
+			md_number_to_chars(toP,(long)(*fromP),2);
+			toP+=2;
+			fromP++;
+			shorts_this_frag++;
+		}
+	}
+	for(m=0;m<the_ins.nrel;m++) {
+		int wid;
+
+		wid=the_ins.reloc[m].wid;
+		if(wid==0)
+			continue;
+		the_ins.reloc[m].wid=0;
+		wid = (wid=='b') ? 1 : (wid=='w') ? 2 : (wid=='l') ? 4 : 4000;
+
+		fix_new(frag_now,
+		    (the_ins.reloc[m].n + toP-frag_now->fr_literal)-/* the_ins.numo */ shorts_this_frag*2,
+		    wid,
+		    the_ins.reloc[m].add,
+		    the_ins.reloc[m].sub,
+		    the_ins.reloc[m].off,
+		    the_ins.reloc[m].pcrel,
+				NO_RELOC);
+	}
+}
+
+/* This function is called once, at assembler startup time.  This should
+   set up all the tables, etc that the MD part of the assembler needs
+ */
+void
+md_begin()
+{
+/*
+ * md_begin -- set up hash tables with 68000 instructions.
+ * similar to what the vax assembler does.  ---phr
+ */
+	/* RMS claims the thing to do is take the m68k-opcode.h table, and make
+	   a copy of it at runtime, adding in the information we want but isn't
+	   there.  I think it'd be better to have an awk script hack the table
+	   at compile time.  Or even just xstr the table and use it as-is.  But
+	   my lord ghod hath spoken, so we do it this way.  Excuse the ugly var
+	   names.  */
+
+	register const struct m68k_opcode *ins;
+	register struct m68_incant *hack,
+		*slak;
+	register char *retval = 0;		/* empty string, or error msg text */
+	register unsigned int i;
+	register char c;
+
+	if ((op_hash = hash_new()) == NULL)
+		as_fatal("Virtual memory exhausted");
+
+	obstack_begin(&robyn,4000);
+	for (ins = m68k_opcodes; ins < endop; ins++) {
+		hack=slak=(struct m68_incant *)obstack_alloc(&robyn,sizeof(struct m68_incant));
+		do {
+			slak->m_operands=ins->args;
+			slak->m_opnum=strlen(slak->m_operands)/2;
+			slak->m_opcode=ins->opcode;
+				/* This is kludgey */
+			slak->m_codenum=((ins->match)&0xffffL) ? 2 : 1;
+			if((ins+1)!=endop && !strcmp(ins->name,(ins+1)->name)) {
+				slak->m_next=(struct m68_incant *)
+obstack_alloc(&robyn,sizeof(struct m68_incant));
+				ins++;
+			} else
+				slak->m_next=0;
+			slak=slak->m_next;
+		} while(slak);
+
+		retval = hash_insert (op_hash, ins->name,(char *)hack);
+			/* Didn't his mommy tell him about null pointers? */
+		if(retval && *retval)
+			as_fatal("Internal Error:  Can't hash %s: %s", ins->name,retval);
+	}
+
+	for (i = 0; i < sizeof(mklower_table) ; i++)
+		mklower_table[i] = (isupper(c = (char) i)) ? tolower(c) : c;
+
+	for (i = 0 ; i < sizeof(notend_table) ; i++) {
+		notend_table[i] = 0;
+		alt_notend_table[i] = 0;
+	}
+	notend_table[','] = 1;
+	notend_table['{'] = 1;
+	notend_table['}'] = 1;
+	alt_notend_table['a'] = 1;
+	alt_notend_table['A'] = 1;
+	alt_notend_table['d'] = 1;
+	alt_notend_table['D'] = 1;
+	alt_notend_table['#'] = 1;
+	alt_notend_table['f'] = 1;
+	alt_notend_table['F'] = 1;
+#ifdef REGISTER_PREFIX
+	alt_notend_table[REGISTER_PREFIX] = 1;
+#endif
+}
+
+#if 0
+#define notend(s) ((*s == ',' || *s == '}' || *s == '{' \
+                   || (*s == ':' && strchr("aAdD#", s[1]))) \
+               ? 0 : 1)
+#endif
+
+/* This funciton is called once, before the assembler exits.  It is
+   supposed to do any final cleanup for this part of the assembler.
+ */
+void
+md_end()
+{
+}
+
+/* Equal to MAX_PRECISION in atof-ieee.c */
+#define MAX_LITTLENUMS 6
+
+/* Turn a string in input_line_pointer into a floating point constant of type
+   type, and store the appropriate bytes in *litP.  The number of LITTLENUMS
+   emitted is stored in *sizeP .  An error message is returned, or NULL on OK.
+ */
+char *
+md_atof(type,litP,sizeP)
+char type;
+char *litP;
+int *sizeP;
+{
+	int	prec;
+	LITTLENUM_TYPE words[MAX_LITTLENUMS];
+	LITTLENUM_TYPE *wordP;
+	char	*t;
+
+	switch(type) {
+	case 'f':
+	case 'F':
+	case 's':
+	case 'S':
+		prec = 2;
+		break;
+
+	case 'd':
+	case 'D':
+	case 'r':
+	case 'R':
+		prec = 4;
+		break;
+
+	case 'x':
+	case 'X':
+		prec = 6;
+		break;
+
+	case 'p':
+	case 'P':
+		prec = 6;
+		break;
+
+	default:
+		*sizeP=0;
+		return "Bad call to MD_ATOF()";
+	}
+	t=atof_ieee(input_line_pointer,type,words);
+	if(t)
+		input_line_pointer=t;
+
+	*sizeP=prec * sizeof(LITTLENUM_TYPE);
+	for(wordP=words;prec--;) {
+		md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
+		litP+=sizeof(LITTLENUM_TYPE);
+	}
+	return "";	/* Someone should teach Dean about null pointers */
+}
+
+/* Turn an integer of n bytes (in val) into a stream of bytes appropriate
+   for use in the a.out file, and stores them in the array pointed to by buf.
+   This knows about the endian-ness of the target machine and does
+   THE RIGHT THING, whatever it is.  Possible values for n are 1 (byte)
+   2 (short) and 4 (long)  Floating numbers are put out as a series of
+   LITTLENUMS (shorts, here at least)
+ */
+void
+md_number_to_chars(buf,val,n)
+char	*buf;
+long	val;
+int n;
+{
+	switch(n) {
+	case 1:
+		*buf++=val;
+		break;
+	case 2:
+		*buf++=(val>>8);
+		*buf++=val;
+		break;
+	case 4:
+		*buf++=(val>>24);
+		*buf++=(val>>16);
+		*buf++=(val>>8);
+		*buf++=val;
+		break;
+	default:
+		abort();
+	}
+}
+
+void
+md_apply_fix(fixP, val)
+	fixS *fixP;
+	long val;
+{
+	char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
+
+	switch(fixP->fx_size) {
+	case 1:
+		*buf++=val;
+		break;
+	case 2:
+		*buf++=(val>>8);
+		*buf++=val;
+		break;
+	case 4:
+		*buf++=(val>>24);
+		*buf++=(val>>16);
+		*buf++=(val>>8);
+		*buf++=val;
+		break;
+	default:
+		BAD_CASE (fixP->fx_size);
+	}
+}
+
+
+/* *fragP has been relaxed to its final size, and now needs to have
+   the bytes inside it modified to conform to the new size  There is UGLY
+   MAGIC here. ..
+ */
+void
+md_convert_frag(fragP)
+register fragS *fragP;
+{
+  long disp;
+  long ext;
+
+  /* Address in gas core of the place to store the displacement.  */
+  register char *buffer_address = fragP -> fr_fix + fragP -> fr_literal;
+  /* Address in object code of the displacement.  */
+  register int object_address = fragP -> fr_fix + fragP -> fr_address;
+
+  know(fragP->fr_symbol);
+
+  /* The displacement of the address, from current location.  */
+  disp = (S_GET_VALUE(fragP->fr_symbol) + fragP->fr_offset) - object_address;
+
+  switch(fragP->fr_subtype) {
+  case TAB(BCC68000,BYTE):
+  case TAB(BRANCH,BYTE):
+    know(issbyte(disp));
+    if(disp==0)
+      as_bad("short branch with zero offset: use :w");
+    fragP->fr_opcode[1]=disp;
+    ext=0;
+    break;
+  case TAB(DBCC,SHORT):
+    know(issword(disp));
+    ext=2;
+    break;
+  case TAB(BCC68000,SHORT):
+  case TAB(BRANCH,SHORT):
+    know(issword(disp));
+    fragP->fr_opcode[1]=0x00;
+    ext=2;
+    break;
+  case TAB(BRANCH,LONG):
+    if(flagseen['m']) {
+      if(fragP->fr_opcode[0]==0x61) {
+	fragP->fr_opcode[0]= 0x4E;
+	fragP->fr_opcode[1]= 0xB9;	/* JSR with ABSL LONG offset */
+	subseg_change(SEG_TEXT, 0);
+
+	fix_new(fragP,
+		fragP->fr_fix,
+		4,
+		fragP->fr_symbol,
+		0,
+		fragP->fr_offset,
+		0,
+		NO_RELOC);
+
+	fragP->fr_fix+=4;
+	ext=0;
+      } else if(fragP->fr_opcode[0]==0x60) {
+        fragP->fr_opcode[0]= 0x4E;
+        fragP->fr_opcode[1]= 0xF9;      /* JMP  with ABSL LONG offset */
+        subseg_change(SEG_TEXT, 0);
+        fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset,0,
+				NO_RELOC);
+        fragP->fr_fix+=4;
+        ext=0;
+      }else {
+        as_bad("Long branch offset not supported.");
+      }
+    } else {
+      fragP->fr_opcode[1]=0xff;
+      ext=4;
+    }
+    break;
+  case TAB(BCC68000,LONG):
+	/* only Bcc 68000 instructions can come here */
+        /* change bcc into b!cc/jmp absl long */
+	fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
+        fragP->fr_opcode[1] = 0x6;   /* branch offset = 6 */
+
+	/* JF: these used to be fr_opcode[2,3], but they may be in a
+	   different frag, in which case refering to them is a no-no.
+	   Only fr_opcode[0,1] are guaranteed to work. */
+        *buffer_address++ = 0x4e;  /* put in jmp long (0x4ef9) */ 
+        *buffer_address++ = 0xf9;  
+        fragP->fr_fix += 2;	     /* account for jmp instruction */
+        subseg_change(SEG_TEXT,0);
+        fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, 
+					 fragP->fr_offset,0,
+				NO_RELOC);
+        fragP->fr_fix += 4;
+        ext=0;
+	break;
+  case TAB(DBCC,LONG):
+        /* only DBcc 68000 instructions can come here */
+        /* change dbcc into dbcc/jmp absl long */
+	/* JF: these used to be fr_opcode[2-7], but that's wrong */
+        *buffer_address++ = 0x00;  /* branch offset = 4 */
+        *buffer_address++ = 0x04;  
+        *buffer_address++ = 0x60;  /* put in bra pc+6 */ 
+        *buffer_address++ = 0x06;  
+        *buffer_address++ = 0x4e;  /* put in jmp long (0x4ef9) */ 
+        *buffer_address++ = 0xf9;  
+
+        fragP->fr_fix += 6;	     /* account for bra/jmp instructions */
+        subseg_change(SEG_TEXT,0);
+        fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, 
+					 fragP->fr_offset,0,
+				NO_RELOC);
+        fragP->fr_fix += 4;
+        ext=0;
+    break;
+  case TAB(FBRANCH,SHORT):
+    know((fragP->fr_opcode[1]&0x40)==0);
+    ext=2;
+    break;
+  case TAB(FBRANCH,LONG):
+    fragP->fr_opcode[1]|=0x40;	/* Turn on LONG bit */
+    ext=4;
+    break;
+  case TAB(PCREL,SHORT):
+    ext=2;
+    break;
+  case TAB(PCREL,LONG):
+    /* FIXME-SOMEDAY, this should allow pcrel-long to be generated if -pic is on.
+       Else we can't handle position independent code.  Pcrel-long costs an
+       extra index word though.  Doing it requires more relax tables and
+       stuff elsewhere in this module though. */
+    /* The thing to do here is force it to ABSOLUTE LONG, since
+       PCREL is really trying to shorten an ABSOLUTE address anyway */
+    subseg_change(SEG_TEXT,0);
+    fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, fragP->fr_offset, 0,
+				NO_RELOC);
+    if((fragP->fr_opcode[1] & 0x3F) != 0x3A)
+  	as_bad("Internal error (long PC-relative operand) for insn 0x%04lx at 0x%lx",
+	        fragP->fr_opcode[0],fragP->fr_address);
+    fragP->fr_opcode[1]&= ~0x3F;
+    fragP->fr_opcode[1]|=0x39;	/* Mode 7.1 */
+    fragP->fr_fix+=4;
+    ext=0;
+    break;
+  case TAB(PCLEA,SHORT):
+    subseg_change(SEG_TEXT,0);
+    fix_new(fragP,(int)(fragP->fr_fix),2,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset,1,
+				NO_RELOC);
+    fragP->fr_opcode[1] &= ~0x3F;
+    fragP->fr_opcode[1] |= 0x3A;
+    ext=2;
+    break;
+  case TAB(PCLEA,LONG):
+    subseg_change(SEG_TEXT,0);
+    fix_new(fragP,(int)(fragP->fr_fix)+2,4,fragP->fr_symbol,(symbolS *)0,fragP->fr_offset+2,1,
+				NO_RELOC);
+    *buffer_address++ = 0x01;
+    *buffer_address++ = 0x70;
+    fragP->fr_fix+=2;
+    /* buffer_address+=2; */
+    ext=4;
+    break;
+
+  }
+  if(ext) {
+    md_number_to_chars(buffer_address,(long)disp,(int)ext);
+    fragP->fr_fix+=ext;
+  }
+}
+
+/* Force truly undefined symbols to their maximum size, and generally set up
+   the frag list to be relaxed
+ */
+int md_estimate_size_before_relax(fragP, segment)
+register fragS *fragP;
+segT segment;
+{
+	int	old_fix;
+	register char *buffer_address = fragP -> fr_fix + fragP -> fr_literal;
+
+	old_fix=fragP->fr_fix;
+
+	/* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
+	switch(fragP->fr_subtype) {
+	case TAB(BRANCH,SZ_UNDEF):
+		if(S_GET_SEGMENT(fragP->fr_symbol) == segment) {
+			/* Symbol now defined; start at byte-size.  */
+			fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),BYTE);
+			break;
+		} else if(!flagseen['p'] || (!flagseen['l'] && flagseen['m'])) {
+			/* Symbol in another segment, or undef.
+			   If we don't care about position independent code,
+			   or if we're using long displacements on a 68000,
+			   rewrite to short or long absolute. */
+			if(fragP->fr_opcode[0]==0x61) {
+				if(flagseen['l']) {
+					fragP->fr_opcode[0]= 0x4E;
+					fragP->fr_opcode[1]= 0xB9;	/* JBSR with ABSL WORD offset */
+					subseg_change(SEG_TEXT, 0);
+					fix_new(fragP, fragP->fr_fix, 2, 
+						fragP->fr_symbol, 0, fragP->fr_offset, 0,
+				NO_RELOC);
+					fragP->fr_fix+=2;
+				} else {
+					fragP->fr_opcode[0]= 0x4E;
+					fragP->fr_opcode[1]= 0xB9;	/* JBSR with ABSL LONG offset */
+					subseg_change(SEG_TEXT, 0);
+					fix_new(fragP, fragP->fr_fix, 4, 
+						fragP->fr_symbol, 0, fragP->fr_offset, 0,
+				NO_RELOC);
+					fragP->fr_fix+=4;
+				}
+				frag_wane(fragP);
+			} else if(fragP->fr_opcode[0]==0x60) {
+				if(flagseen['l']) {
+					fragP->fr_opcode[0]= 0x4E;
+					fragP->fr_opcode[1]= 0xF8;	/* JMP	with ABSL WORD offset */
+					subseg_change(SEG_TEXT, 0);
+					fix_new(fragP, fragP->fr_fix, 2, 
+						fragP->fr_symbol, 0, fragP->fr_offset, 0,
+				NO_RELOC);
+					fragP->fr_fix+=2;
+				} else {
+					fragP->fr_opcode[0]= 0x4E;
+					fragP->fr_opcode[1]= 0xF9;	/* JMP	with ABSL LONG offset */
+					subseg_change(SEG_TEXT, 0);
+					fix_new(fragP, fragP->fr_fix, 4, 
+						fragP->fr_symbol, 0, fragP->fr_offset, 0,
+				NO_RELOC);
+					fragP->fr_fix+=4;
+				}
+				frag_wane(fragP);
+			} else {
+				as_bad("Long branch offset to extern symbol not supported.");
+			}
+		} else if(flagseen['l']) {
+			/* Symbol in other seg or undefined, and user
+			   wants short pcrel offsets (-l).  Set size to 2, fix
+			   pcrel displacement after relax.  */
+			fix_new(fragP,(int)(fragP->fr_fix),2,fragP->fr_symbol,
+				(symbolS *)0,fragP->fr_offset+2,1,
+				NO_RELOC);
+			fragP->fr_fix+=2;
+			fragP->fr_opcode[1]=0x00;
+			frag_wane(fragP);
+		} else {
+			/* Symbol in other seg or undefined, and user
+			   wants long pcrel offsets.  Set size to 4, and fix
+			   pcrel displacement after relax.  */
+			fix_new(fragP,(int)(fragP->fr_fix),4,fragP->fr_symbol,
+				(symbolS *)0,fragP->fr_offset + 4,1,
+				NO_RELOC);
+			fragP->fr_fix+=4;
+			fragP->fr_opcode[1]=0xff;
+			frag_wane(fragP);
+			break;
+		}
+		break;
+
+	case TAB(FBRANCH,SZ_UNDEF):
+		if(S_GET_SEGMENT(fragP->fr_symbol) == segment
+		   || flagseen['l']) {
+			fragP->fr_subtype=TAB(FBRANCH,SHORT);
+			fragP->fr_var+=2;
+		} else {
+			fragP->fr_subtype=TAB(FBRANCH,LONG);
+			fragP->fr_var+=4;
+		}
+		break;
+
+	case TAB(PCREL,SZ_UNDEF):
+		if(S_GET_SEGMENT(fragP->fr_symbol) == segment
+		   || flagseen['l']) {
+			fragP->fr_subtype=TAB(PCREL,SHORT);
+			fragP->fr_var+=2;
+		} else {
+			fragP->fr_subtype=TAB(PCREL,LONG);
+			fragP->fr_var+=4;
+		}
+		break;
+
+	case TAB(BCC68000,SZ_UNDEF):
+		if(S_GET_SEGMENT(fragP->fr_symbol) == segment) {
+			fragP->fr_subtype=TAB(BCC68000,BYTE);
+			break;
+		}
+		/* only Bcc 68000 instructions can come here */
+		/* change bcc into b!cc/jmp absl long */
+		fragP->fr_opcode[0] ^= 0x01; /* invert bcc */
+		if(flagseen['l']) {
+			fragP->fr_opcode[1] = 0x04;   /* branch offset = 6 */
+			/* JF: these were fr_opcode[2,3] */
+			buffer_address[0] = 0x4e;  /* put in jmp long (0x4ef9) */ 
+			buffer_address[1] = 0xf8;
+			fragP->fr_fix += 2;	     /* account for jmp instruction */
+			subseg_change(SEG_TEXT,0);
+			fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0, 
+							 fragP->fr_offset,0,
+				NO_RELOC);
+			fragP->fr_fix += 2;
+		} else {
+			fragP->fr_opcode[1] = 0x06;   /* branch offset = 6 */
+			/* JF: these were fr_opcode[2,3] */
+			buffer_address[2] = 0x4e;  /* put in jmp long (0x4ef9) */ 
+			buffer_address[3] = 0xf9;
+			fragP->fr_fix += 2;	     /* account for jmp instruction */
+			subseg_change(SEG_TEXT,0);
+			fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, 
+							 fragP->fr_offset,0,
+				NO_RELOC);
+			fragP->fr_fix += 4;
+		}
+		frag_wane(fragP);
+		break;
+
+	case TAB(DBCC,SZ_UNDEF):
+		if(S_GET_SEGMENT(fragP->fr_symbol) == segment) {
+			fragP->fr_subtype=TAB(DBCC,SHORT);
+			fragP->fr_var+=2;
+			break;
+		}
+		/* only DBcc 68000 instructions can come here */
+		/* change dbcc into dbcc/jmp absl long */
+		/* JF: these used to be fr_opcode[2-4], which is wrong. */
+		buffer_address[0] = 0x00;  /* branch offset = 4 */
+		buffer_address[1] = 0x04;  
+		buffer_address[2] = 0x60;  /* put in bra pc + ... */ 
+		if(flagseen['l']) {
+			/* JF: these were fr_opcode[5-7] */
+			buffer_address[3] = 0x04; /* plus 4 */
+			buffer_address[4] = 0x4e;/* Put in Jump Word */
+			buffer_address[5] = 0xf8;
+			fragP->fr_fix += 6;	  /* account for bra/jmp instruction */
+			subseg_change(SEG_TEXT,0);
+			fix_new(fragP, fragP->fr_fix, 2, fragP->fr_symbol, 0, 
+							 fragP->fr_offset,0,
+				NO_RELOC);
+			fragP->fr_fix+=2;
+		} else {
+			/* JF: these were fr_opcode[5-7] */
+			buffer_address[3] = 0x06;  /* Plus 6 */
+			buffer_address[4] = 0x4e;  /* put in jmp long (0x4ef9) */ 
+			buffer_address[5] = 0xf9;  
+			fragP->fr_fix += 6;	  /* account for bra/jmp instruction */
+			subseg_change(SEG_TEXT,0);
+			fix_new(fragP, fragP->fr_fix, 4, fragP->fr_symbol, 0, 
+							 fragP->fr_offset,0,
+				NO_RELOC);
+			fragP->fr_fix += 4;
+		}
+		frag_wane(fragP);
+		break;
+
+	case TAB(PCLEA,SZ_UNDEF):
+		if((S_GET_SEGMENT(fragP->fr_symbol))==segment || flagseen['l']) {
+			fragP->fr_subtype=TAB(PCLEA,SHORT);
+			fragP->fr_var+=2;
+		} else {
+			fragP->fr_subtype=TAB(PCLEA,LONG);
+			fragP->fr_var+=6;
+		}
+		break;
+
+	default:
+		break;
+	}
+
+	/* now that SZ_UNDEF are taken care of, check others */
+	switch(fragP->fr_subtype) {
+	case TAB(BCC68000,BYTE):
+	case TAB(BRANCH,BYTE):
+			/* We can't do a short jump to the next instruction,
+			   so we force word mode.  */
+		if(fragP->fr_symbol && S_GET_VALUE(fragP->fr_symbol)==0 &&
+ fragP->fr_symbol->sy_frag==fragP->fr_next) {
+			fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),SHORT);
+			fragP->fr_var+=2;
+		}
+		break;
+	default:
+		break;
+	}
+	return fragP->fr_var + fragP->fr_fix - old_fix;
+}
+
+#if defined(OBJ_AOUT) | defined(OBJ_BOUT)
+/* the bit-field entries in the relocation_info struct plays hell 
+   with the byte-order problems of cross-assembly.  So as a hack,
+   I added this mach. dependent ri twiddler.  Ugly, but it gets
+   you there. -KWK */
+/* on m68k: first 4 bytes are normal unsigned long, next three bytes
+are symbolnum, most sig. byte first.  Last byte is broken up with
+bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
+nibble as nuthin. (on Sun 3 at least) */
+/* Translate the internal relocation information into target-specific
+   format. */
+void
+md_ri_to_chars(the_bytes, ri)
+     char *the_bytes;
+     struct reloc_info_generic *ri;
+{
+  /* this is easy */
+  md_number_to_chars(the_bytes, ri->r_address, 4);
+  /* now the fun stuff */
+  the_bytes[4] = (ri->r_symbolnum >> 16) & 0x0ff;
+  the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
+  the_bytes[6] = ri->r_symbolnum & 0x0ff;
+  the_bytes[7] = (((ri->r_pcrel << 7)  & 0x80) | ((ri->r_length << 5) & 0x60) | 
+    ((ri->r_extern << 4)  & 0x10)); 
+}
+#endif /* OBJ_AOUT or OBJ_BOUT */
+
+#ifndef WORKING_DOT_WORD
+const int md_short_jump_size = 4;
+const int md_long_jump_size = 6;
+
+void
+md_create_short_jump(ptr,from_addr,to_addr,frag,to_symbol)
+char	*ptr;
+long	from_addr,
+	to_addr;
+fragS	*frag;
+symbolS	*to_symbol;
+{
+	long offset;
+
+	offset = to_addr - (from_addr+2);
+
+	md_number_to_chars(ptr  ,(long)0x6000,2);
+	md_number_to_chars(ptr+2,(long)offset,2);
+}
+
+void
+md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)
+char	*ptr;
+long	from_addr,
+	to_addr;
+fragS	*frag;
+symbolS	*to_symbol;
+{
+	long offset;
+
+	if(flagseen['m']) {
+		offset=to_addr-S_GET_VALUE(to_symbol);
+		md_number_to_chars(ptr  ,(long)0x4EF9,2);
+		md_number_to_chars(ptr+2,(long)offset,4);
+		fix_new(frag,(ptr+2)-frag->fr_literal,4,to_symbol,(symbolS *)0,(long)0,0,
+				NO_RELOC);
+	} else {
+		offset=to_addr - (from_addr+2);
+		md_number_to_chars(ptr  ,(long)0x60ff,2);
+		md_number_to_chars(ptr+2,(long)offset,4);
+	}
+}
+
+#endif
+/* Different values of OK tell what its OK to return.  Things that aren't OK are an error (what a shock, no?)
+
+	0:  Everything is OK
+	10:  Absolute 1:8	only
+	20:  Absolute 0:7	only
+	30:  absolute 0:15	only
+	40:  Absolute 0:31	only
+	50:  absolute 0:127	only
+	55:  absolute -64:63    only
+	60:  absolute -128:127	only
+	70:  absolute 0:4095	only
+	80:  No bignums
+
+*/
+
+static int get_num(exp,ok)
+struct m68k_exp *exp;
+int ok;
+{
+#ifdef TEST2
+	long	l = 0;
+
+	if(!exp->e_beg)
+		return 0;
+	if(*exp->e_beg=='0') {
+		if(exp->e_beg[1]=='x')
+			sscanf(exp->e_beg+2,"%x",&l);
+		else
+			sscanf(exp->e_beg+1,"%O",&l);
+		return l;
+	}
+	return atol(exp->e_beg);
+#else
+	char	*save_in;
+	char	c_save;
+
+	if(!exp) {
+		/* Can't do anything */
+		return 0;
+	}
+	if(!exp->e_beg || !exp->e_end) {
+		seg(exp)=SEG_ABSOLUTE;
+		adds(exp)=0;
+		subs(exp)=0;
+		offs(exp)= (ok==10) ? 1 : 0;
+		as_bad("Null expression defaults to %ld", offs(exp));
+		return 0;
+	}
+
+	exp->e_siz=0;
+	if(/* ok!=80 && */exp->e_end[-1]==':' && (exp->e_end-exp->e_beg)>=2) {
+		switch(exp->e_end[0]) {
+		case 's':
+		case 'S':
+		case 'b':
+		case 'B':
+			exp->e_siz=1;
+			break;
+		case 'w':
+		case 'W':
+			exp->e_siz=2;
+			break;
+		case 'l':
+		case 'L':
+			exp->e_siz=3;
+			break;
+		default:
+			as_bad("Unknown size for expression \"%c\"", exp->e_end[0]);
+		}
+		exp->e_end-=2;
+	}
+	c_save=exp->e_end[1];
+	exp->e_end[1]='\0';
+	save_in=input_line_pointer;
+	input_line_pointer=exp->e_beg;
+	switch(expression(&(exp->e_exp))) {
+	case SEG_PASS1:
+		seg(exp)=SEG_ABSOLUTE;
+		adds(exp)=0;
+		subs(exp)=0;
+		offs(exp)= (ok==10) ? 1 : 0;
+		as_bad("Unknown expression: '%s' defaulting to %d",exp->e_beg,offs(exp));
+		break;
+
+	case SEG_ABSENT:
+		/* Do the same thing the VAX asm does */
+		seg(exp)=SEG_ABSOLUTE;
+		adds(exp)=0;
+		subs(exp)=0;
+		offs(exp)=0;
+		if(ok==10) {
+			as_bad("expression out of range: defaulting to 1");
+			offs(exp)=1;
+		}
+		break;
+	case SEG_ABSOLUTE:
+		switch(ok) {
+		case 10:
+			if(offs(exp)<1 || offs(exp)>8) {
+				as_bad("expression out of range: defaulting to 1");
+				offs(exp)=1;
+			}
+			break;
+		case 20:
+			if(offs(exp)<0 || offs(exp)>7)
+				goto outrange;
+			break;
+		case 30:
+			if(offs(exp)<0 || offs(exp)>15)
+				goto outrange;
+			break;
+		case 40:
+			if(offs(exp)<0 || offs(exp)>32)
+				goto outrange;
+			break;
+		case 50:
+			if(offs(exp)<0 || offs(exp)>127)
+				goto outrange;
+			break;
+		case 55:
+			if(offs(exp)<-64 || offs(exp)>63)
+				goto outrange;
+			break;
+		case 60:
+			if(offs(exp)<-128 || offs(exp)>127)
+				goto outrange;
+			break;
+		case 70:
+			if(offs(exp)<0 || offs(exp)>4095) {
+			outrange:
+				as_bad("expression out of range: defaulting to 0");
+				offs(exp)=0;
+			}
+			break;
+		default:
+			break;
+		}
+		break;
+	case SEG_TEXT:
+	case SEG_DATA:
+	case SEG_BSS:
+	case SEG_UNKNOWN:
+	case SEG_DIFFERENCE:
+		if(ok>=10 && ok<=70) {
+			seg(exp)=SEG_ABSOLUTE;
+			adds(exp)=0;
+			subs(exp)=0;
+			offs(exp)= (ok==10) ? 1 : 0;
+			as_bad("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
+		}
+		break;
+	case SEG_BIG:
+		if(ok==80 && offs(exp)<0) {	/* HACK! Turn it into a long */
+			LITTLENUM_TYPE words[6];
+
+			gen_to_words(words,2,8L);/* These numbers are magic! */
+			seg(exp)=SEG_ABSOLUTE;
+			adds(exp)=0;
+			subs(exp)=0;
+			offs(exp)=words[1]|(words[0]<<16);
+		} else if(ok!=0) {
+			seg(exp)=SEG_ABSOLUTE;
+			adds(exp)=0;
+			subs(exp)=0;
+			offs(exp)= (ok==10) ? 1 : 0;
+			as_bad("Can't deal with expression \"%s\": defaulting to %ld",exp->e_beg,offs(exp));
+		}
+		break;
+	default:
+		abort();
+	}
+	if(input_line_pointer!=exp->e_end+1)
+		as_bad("Ignoring junk after expression");
+	exp->e_end[1]=c_save;
+	input_line_pointer=save_in;
+	if(exp->e_siz) {
+		switch(exp->e_siz) {
+		case 1:
+			if(!isbyte(offs(exp)))
+				as_bad("expression doesn't fit in BYTE");
+			break;
+		case 2:
+			if(!isword(offs(exp)))
+				as_bad("expression doesn't fit in WORD");
+			break;
+		}
+	}
+	return offs(exp);
+#endif
+} /* get_num() */
+
+/* These are the back-ends for the various machine dependent pseudo-ops.  */
+
+static void s_data1() {
+	subseg_new(SEG_DATA,1);
+	demand_empty_rest_of_line();
+} /* s_data1() */
+
+static void s_data2() {
+	subseg_new(SEG_DATA,2);
+	demand_empty_rest_of_line();
+} /* s_data2() */
+
+static void s_bss() {
+	/* We don't support putting frags in the BSS segment, but we
+	   can put them into initialized data for now... */
+	subseg_new(SEG_DATA,255);	/* FIXME-SOON */
+	demand_empty_rest_of_line();
+} /* s_bss() */
+
+static void s_even() {
+	register int temp;
+	register long temp_fill;
+
+	temp = 1;		/* JF should be 2? */
+	temp_fill = get_absolute_expression ();
+	if ( ! need_pass_2 ) /* Never make frag if expect extra pass. */
+		frag_align (temp, (int)temp_fill);
+	demand_empty_rest_of_line();
+} /* s_even() */
+
+static void s_proc() {
+	demand_empty_rest_of_line();
+} /* s_proc() */
+
+/* s_space is defined in read.c .skip is simply an alias to it. */
+
+int
+md_parse_option(argP,cntP,vecP)
+char **argP;
+int *cntP;
+char ***vecP;
+{
+	switch(**argP) {
+	case 'l':	/* -l means keep externals to 2 byte branch offsets
+			   rather than 4 byte branch offsets */
+		break;
+
+	case 'm':
+		/* Gas almost ignores this option! */
+		(*argP)++;
+		if(**argP=='c')
+			(*argP)++;
+		if(!strcmp(*argP,"68000"))
+			flagseen['m']=2;
+		else if(!strcmp(*argP,"68010")) {
+#ifdef TE_SUN
+			magic_number_for_object_file = 1<<16|OMAGIC;
+#endif
+			flagseen['m']=1;
+		} else if(!strcmp(*argP,"68020"))
+			flagseen['m']=0;
+		else
+			as_warn("Unknown -m option ignored");
+		while(**argP)
+			(*argP)++;
+		break;
+
+	case 'p':
+		if (!strcmp(*argP,"pic")) {
+			(*argP) += 3;
+			break;		/* -pic, Position Independent Code */
+		}
+		else
+			return 0;
+	default:
+		return 0;
+	}
+	return 1;
+}
+
+
+#ifdef TEST2
+
+/* TEST2:  Test md_assemble() */
+/* Warning, this routine probably doesn't work anymore */
+
+main()
+{
+	struct m68_it the_ins;
+	char buf[120];
+	char *cp;
+	int	n;
+
+	m68_ip_begin();
+	for(;;) {
+		if(!gets(buf) || !*buf)
+			break;
+		if(buf[0]=='|' || buf[1]=='.')
+			continue;
+		for(cp=buf;*cp;cp++)
+			if(*cp=='\t')
+				*cp=' ';
+		if(is_label(buf))
+			continue;
+		bzero(&the_ins,sizeof(the_ins));
+		m68_ip(&the_ins,buf);
+		if(the_ins.error) {
+			printf("Error %s in %s\n",the_ins.error,buf);
+		} else {
+			printf("Opcode(%d.%s): ",the_ins.numo,the_ins.args);
+			for(n=0;n<the_ins.numo;n++)
+				printf(" 0x%x",the_ins.opcode[n]&0xffff);
+			printf("    ");
+			print_the_insn(&the_ins.opcode[0],stdout);
+			(void)putchar('\n');
+		}
+		for(n=0;n<strlen(the_ins.args)/2;n++) {
+			if(the_ins.operands[n].error) {
+				printf("op%d Error %s in %s\n",n,the_ins.operands[n].error,buf);
+				continue;
+			}
+			printf("mode %d, reg %d, ",the_ins.operands[n].mode,the_ins.operands[n].reg);
+			if(the_ins.operands[n].b_const)
+				printf("Constant: '%.*s', ",1+the_ins.operands[n].e_const-the_ins.operands[n].b_const,the_ins.operands[n].b_const);
+			printf("ireg %d, isiz %d, imul %d, ",the_ins.operands[n].ireg,the_ins.operands[n].isiz,the_ins.operands[n].imul);
+			if(the_ins.operands[n].b_iadd)
+				printf("Iadd: '%.*s',",1+the_ins.operands[n].e_iadd-the_ins.operands[n].b_iadd,the_ins.operands[n].b_iadd);
+			(void)putchar('\n');
+		}
+	}
+	m68_ip_end();
+	return 0;
+}
+
+is_label(str)
+char *str;
+{
+	while(*str==' ')
+		str++;
+	while(*str && *str!=' ')
+		str++;
+	if(str[-1]==':' || str[1]=='=')
+		return 1;
+	return 0;
+}
+
+#endif
+
+/* Possible states for relaxation:
+
+0 0	branch offset	byte	(bra, etc)
+0 1			word
+0 2			long
+
+1 0	indexed offsets	byte	a0@(32,d4:w:1) etc
+1 1			word
+1 2			long
+
+2 0	two-offset index word-word a0@(32,d4)@(45) etc
+2 1			word-long
+2 2			long-word
+2 3			long-long
+
+*/
+
+
+
+#ifdef DONTDEF
+abort()
+{
+	printf("ABORT!\n");
+	exit(12);
+}
+
+char *index(s,c)
+char *s;
+{
+	while(*s!=c) {
+		if(!*s) return 0;
+		s++;
+	}
+	return s;
+}
+
+bzero(s,n)
+char *s;
+{
+	while(n--)
+		*s++=0;
+}
+
+print_frags()
+{
+	fragS *fragP;
+	extern fragS *text_frag_root;
+
+	for(fragP=text_frag_root;fragP;fragP=fragP->fr_next) {
+		printf("addr %lu  next 0x%x  fix %ld  var %ld  symbol 0x%x  offset %ld\n",
+ fragP->fr_address,fragP->fr_next,fragP->fr_fix,fragP->fr_var,fragP->fr_symbol,fragP->fr_offset);
+		printf("opcode 0x%x  type %d  subtype %d\n\n",fragP->fr_opcode,fragP->fr_type,fragP->fr_subtype);
+	}
+	fflush(stdout);
+	return 0;
+}
+#endif
+
+#ifdef DONTDEF
+/*VARARGS1*/
+panic(format,args)
+char *format;
+{
+	fputs("Internal error:",stderr);
+	_doprnt(format,&args,stderr);
+	(void)putc('\n',stderr);
+	as_where();
+	abort();
+}
+#endif
+
+/* We have no need to default values of symbols.  */
+
+/* ARGSUSED */
+symbolS *
+md_undefined_symbol (name)
+     char *name;
+{
+  return 0;
+}
+
+/* Parse an operand that is machine-specific.  
+   We just return without modifying the expression if we have nothing
+   to do.  */
+
+/* ARGSUSED */
+void
+md_operand (expressionP)
+     expressionS *expressionP;
+{
+}
+
+/* Round up a section size to the appropriate boundary.  */
+long
+md_section_align (segment, size)
+     segT segment;
+     long size;
+{
+  return size;		/* Byte alignment is fine */
+}
+
+/* Exactly what point is a PC-relative offset relative TO?
+   On the 68k, they're relative to the address of the offset, plus
+   its size. (??? Is this right?  FIXME-SOON!) */
+long
+md_pcrel_from (fixP)
+     fixS *fixP;
+{
+  return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
+}
+
+/* Opcode table for m68000/m68020 and m68881.
+   Copyright (C) 1989, Free Software Foundation.
+
+This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
+
+Both GDB and GAS are free software; you can redistribute and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GDB and GAS are distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GDB or GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+   
+/* We store four bytes of opcode for all opcodes because that
+   is the most any of them need.  The actual length of an instruction
+   is always at least 2 bytes, and is as much longer as necessary to
+   hold the operands it has.
+
+   The match component is a mask saying which bits must match
+   particular opcode in order for an instruction to be an instance
+   of that opcode.
+
+   The args component is a string containing two characters
+   for each operand of the instruction.  The first specifies
+   the kind of operand; the second, the place it is stored.  */
+
+/* Kinds of operands:
+   D  data register only.  Stored as 3 bits.
+   A  address register only.  Stored as 3 bits.
+   R  either kind of register.  Stored as 4 bits.
+   F  floating point coprocessor register only.   Stored as 3 bits.
+   O  an offset (or width): immediate data 0-31 or data register.
+      Stored as 6 bits in special format for BF... insns.
+   +  autoincrement only.  Stored as 3 bits (number of the address register).
+   -  autodecrement only.  Stored as 3 bits (number of the address register).
+   Q  quick immediate data.  Stored as 3 bits.
+      This matches an immediate operand only when value is in range 1 .. 8.
+   M  moveq immediate data.  Stored as 8 bits.
+      This matches an immediate operand only when value is in range -128..127
+   T  trap vector immediate data.  Stored as 4 bits.
+
+   k  K-factor for fmove.p instruction.   Stored as a 7-bit constant or
+      a three bit register offset, depending on the field type.
+
+   #  immediate data.  Stored in special places (b, w or l)
+      which say how many bits to store.
+   ^  immediate data for floating point instructions.   Special places
+      are offset by 2 bytes from '#'...
+   B  pc-relative address, converted to an offset
+      that is treated as immediate data.
+   d  displacement and register.  Stores the register as 3 bits
+      and stores the displacement in the entire second word.
+
+   C  the CCR.  No need to store it; this is just for filtering validity.
+   S  the SR.  No need to store, just as with CCR.
+   U  the USP.  No need to store, just as with CCR.
+
+   I  Coprocessor ID.   Not printed if 1.   The Coprocessor ID is always
+      extracted from the 'd' field of word one, which means that an extended
+      coprocessor opcode can be skipped using the 'i' place, if needed.
+
+   s  System Control register for the floating point coprocessor.
+   S  List of system control registers for floating point coprocessor.
+
+   J  Misc register for movec instruction, stored in 'j' format.
+	Possible values:
+	000	SFC	Source Function Code reg
+	001	DFC	Data Function Code reg
+	002	CACR	Cache Control Register
+	800	USP	User Stack Pointer
+	801	VBR	Vector Base reg
+	802	CAAR	Cache Address Register
+	803	MSP	Master Stack Pointer
+	804	ISP	Interrupt Stack Pointer
+
+    L  Register list of the type d0-d7/a0-a7 etc.
+       (New!  Improved!  Can also hold fp0-fp7, as well!)
+       The assembler tries to see if the registers match the insn by
+       looking at where the insn wants them stored.
+
+    l  Register list like L, but with all the bits reversed.
+       Used for going the other way. . .
+
+ They are all stored as 6 bits using an address mode and a register number;
+ they differ in which addressing modes they match.
+
+   *  all					(modes 0-6,7.*)
+   ~  alterable memory				(modes 2-6,7.0,7.1)(not 0,1,7.~)
+   %  alterable					(modes 0-6,7.0,7.1)(not 7.~)
+   ;  data					(modes 0,2-6,7.*)(not 1)
+   @  data, but not immediate			(modes 0,2-6,7.? ? ?)(not 1,7.?)  This may really be ;, the 68020 book says it is
+   !  control					(modes 2,5,6,7.*-)(not 0,1,3,4,7.4)
+   &  alterable control				(modes 2,5,6,7.0,7.1)(not 0,1,7.? ? ?)
+   $  alterable data				(modes 0,2-6,7.0,7.1)(not 1,7.~)
+   ?  alterable control, or data register	(modes 0,2,5,6,7.0,7.1)(not 1,3,4,7.~)
+   /  control, or data register			(modes 0,2,5,6,7.0,7.1,7.2,7.3)(not 1,3,4,7.4)
+*/
+
+/* JF: for the 68851 */
+/*
+   I didn't use much imagination in choosing the 
+   following codes, so many of them aren't very
+   mnemonic. -rab
+
+   P  pmmu register
+	Possible values:
+	000	TC	Translation Control reg
+	100	CAL	Current Access Level
+	101	VAL	Validate Access Level
+	110	SCC	Stack Change Control
+	111	AC	Access Control
+
+   W  wide pmmu registers
+	Possible values:
+	001	DRP	Dma Root Pointer
+	010	SRP	Supervisor Root Pointer
+	011	CRP	Cpu Root Pointer
+
+   f	function code register
+	0	SFC
+	1	DFC
+
+   V	VAL register only
+
+   X	BADx, BACx
+	100	BAD	Breakpoint Acknowledge Data
+	101	BAC	Breakpoint Acknowledge Control
+
+   Y	PSR
+   Z	PCSR
+
+   |	memory 		(modes 2-6, 7.*)
+
+*/
+
+/* Places to put an operand, for non-general operands:
+   s  source, low bits of first word.
+   d  dest, shifted 9 in first word
+   1  second word, shifted 12
+   2  second word, shifted 6
+   3  second word, shifted 0
+   4  third word, shifted 12
+   5  third word, shifted 6
+   6  third word, shifted 0
+   7  second word, shifted 7
+   8  second word, shifted 10
+   D  store in both place 1 and place 3; for divul and divsl.
+   b  second word, low byte
+   w  second word (entire)
+   l  second and third word (entire)
+   g  branch offset for bra and similar instructions.
+      The place to store depends on the magnitude of offset.
+   t  store in both place 7 and place 8; for floating point operations
+   c  branch offset for cpBcc operations.
+      The place to store is word two if bit six of word one is zero,
+      and words two and three if bit six of word one is one.
+   i  Increment by two, to skip over coprocessor extended operands.   Only
+      works with the 'I' format.
+   k  Dynamic K-factor field.   Bits 6-4 of word 2, used as a register number.
+      Also used for dynamic fmovem instruction.
+   C  floating point coprocessor constant - 7 bits.  Also used for static
+      K-factors...
+   j  Movec register #, stored in 12 low bits of second word.
+
+ Places to put operand, for general operands:
+   d  destination, shifted 6 bits in first word
+   b  source, at low bit of first word, and immediate uses one byte
+   w  source, at low bit of first word, and immediate uses two bytes
+   l  source, at low bit of first word, and immediate uses four bytes
+   s  source, at low bit of first word.
+      Used sometimes in contexts where immediate is not allowed anyway.
+   f  single precision float, low bit of 1st word, immediate uses 4 bytes
+   F  double precision float, low bit of 1st word, immediate uses 8 bytes
+   x  extended precision float, low bit of 1st word, immediate uses 12 bytes
+   p  packed float, low bit of 1st word, immediate uses 12 bytes
+*/
+
+#define one(x) ((x) << 16)
+#define two(x, y) (((x) << 16) + y)
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of tc-m68k.c */
diff --git a/gas/config/tc-m68k.h b/gas/config/tc-m68k.h
new file mode 100644
index 0000000..4fa516c
--- /dev/null
+++ b/gas/config/tc-m68k.h
@@ -0,0 +1,26 @@
+/*
+ * This file is tp-generic.h and is intended to be a template for
+ * target processor specific header files. 
+ */
+
+#define TC_M68K 1
+
+#ifdef TE_SUN3
+/* This variable contains the value to write out at the beginning of
+   the a.out file.  The 2<<16 means that this is a 68020 file instead
+   of an old-style 68000 file */
+
+#define DEFAULT_MAGIC_NUMBER_FOR_OBJECT_FILE (2<<16|OMAGIC);	/* Magic byte for file header */
+#endif /* TE_SUN3 */
+
+#define tc_crawl_symbol_chain(a)	; /* not used */
+#define tc_headers_hook(a)		; /* not used */
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of tc-m68k.h */
diff --git a/gas/config/tc-ns32k.c b/gas/config/tc-ns32k.c
new file mode 100644
index 0000000..f4fd883
--- /dev/null
+++ b/gas/config/tc-ns32k.c
@@ -0,0 +1,1867 @@
+/* ns32k.c  -- Assemble on the National Semiconductor 32k series
+   Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/*#define SHOW_NUM 1*/ /* uncomment for debugging */
+
+#include <stdio.h>
+#include <ctype.h>
+#ifdef USG
+#include <string.h>
+#else
+#include <strings.h>
+#endif
+#include "ns32k-opcode.h"
+
+#include "as.h"
+
+#include "obstack.h"
+
+/* Macros */
+#define IIF_ENTRIES 13				/* number of entries in iif */ 
+#define PRIVATE_SIZE 256			/* size of my garbage memory */
+#define MAX_ARGS 4
+#define DEFAULT	-1		/* addr_mode returns this value when plain constant or label is encountered */
+
+#define IIF(ptr,a1,c1,e1,g1,i1,k1,m1,o1,q1,s1,u1) \
+  iif.iifP[ptr].type= a1; \
+  iif.iifP[ptr].size= c1; \
+  iif.iifP[ptr].object= e1; \
+  iif.iifP[ptr].object_adjust= g1; \
+  iif.iifP[ptr].pcrel= i1; \
+  iif.iifP[ptr].pcrel_adjust= k1; \
+  iif.iifP[ptr].im_disp= m1; \
+  iif.iifP[ptr].relax_substate= o1; \
+  iif.iifP[ptr].bit_fixP= q1; \
+  iif.iifP[ptr].addr_mode= s1; \
+  iif.iifP[ptr].bsr= u1;
+
+#ifdef SEQUENT_COMPATABILITY
+#define LINE_COMMENT_CHARS "|"
+#define ABSOLUTE_PREFIX '@'
+#define IMMEDIATE_PREFIX '#'
+#endif
+
+#ifndef LINE_COMMENT_CHARS
+#define LINE_COMMENT_CHARS "#"
+#endif
+
+char comment_chars[] = "#";
+char line_comment_chars[] = LINE_COMMENT_CHARS;
+#if !defined(ABSOLUTE_PREFIX) && !defined(IMMEDIATE_PREFIX)
+#define ABSOLUTE_PREFIX '@'	/* One or the other MUST be defined */
+#endif
+
+struct addr_mode {
+  char mode;			/* addressing mode of operand (0-31) */
+  char scaled_mode;		/* mode combined with scaled mode */
+  char scaled_reg;		/* register used in scaled+1 (1-8) */
+  char float_flag;		/* set if R0..R7 was F0..F7 ie a floating-point-register */
+  char am_size;			/* estimated max size of general addr-mode parts*/
+  char im_disp;			/* if im_disp==1 we have a displacement */
+  char pcrel;			/* 1 if pcrel, this is really redundant info */
+  char disp_suffix[2];		/* length of displacement(s), 0=undefined */
+  char *disp[2];		/* pointer(s) at displacement(s)
+				              or immediates(s)     (ascii) */
+  char index_byte;		/* index byte */
+};
+typedef struct addr_mode addr_modeS;
+
+
+char *freeptr,*freeptr_static; /* points at some number of free bytes */
+struct hash_control *inst_hash_handle;
+
+struct ns32k_opcode *desc; /* pointer at description of instruction */
+addr_modeS addr_modeP;
+char EXP_CHARS[] = "eE";
+char FLT_CHARS[] = "fd"; /* we don't want to support lowercase, do we */
+
+/* UPPERCASE denotes live names 
+ * when an instruction is built, IIF is used as an intermidiate form to store
+ * the actual parts of the instruction. A ns32k machine instruction can
+ * be divided into a couple of sub PARTs. When an instruction is assembled
+ * the appropriate PART get an assignment. When an IIF has been completed it's
+ * converted to a FRAGment as specified in AS.H */
+
+/* internal structs */
+struct option {
+  char *pattern;
+  unsigned long or;
+  unsigned long and;
+};
+
+typedef struct {
+  int			type;		/* how to interpret object */
+  int			size;		/* Estimated max size of object */
+  unsigned long		object;		/* binary data */
+  int			object_adjust;	/* number added to object */
+  int			pcrel;		/* True if object is pcrel */
+  int			pcrel_adjust;	/* It's value reflects the length in bytes from the instruction start to the displacement */
+  int			im_disp;	/* True if the object is a displacement */
+  relax_substateT	relax_substate; /* Initial relaxsubstate */
+  bit_fixS		*bit_fixP;	/* Pointer at bit_fix struct */ 
+  int			addr_mode;	/* What addrmode do we associate with this iif-entry */
+  char			bsr;		/* Sequent hack */
+}iif_entryT;				/* Internal Instruction Format */
+struct int_ins_form {
+  int		instr_size;		/* Max size of instruction in bytes. */
+  iif_entryT    iifP[IIF_ENTRIES+1];
+};
+struct int_ins_form iif;
+expressionS exprP;
+char *input_line_pointer;
+/* description of the PARTs in IIF 
+ *object[n]:
+ * 0	total length in bytes of entries in iif
+ * 1	opcode
+ * 2	index_byte_a
+ * 3	index_byte_b
+ * 4	disp_a_1
+ * 5	disp_a_2
+ * 6	disp_b_1
+ * 7	disp_b_2
+ * 8	imm_a
+ * 9	imm_b
+ * 10	implied1
+ * 11	implied2
+ * 
+ * For every entry there is a datalength in bytes. This is stored in size[n].
+ *	 0,	the objectlength is not explicitly given by the instruction
+ *		and the operand is undefined. This is a case for relaxation.
+ *		Reserve 4 bytes for the final object.
+ *
+ *	 1,	the entry contains one byte
+ *	 2,	the entry contains two bytes
+ *	 3,	the entry contains three bytes
+ *	 4,	the entry contains four bytes
+ *	etc
+ *
+ * Furthermore, every entry has a data type identifier in type[n].
+ *
+ * 	 0,	the entry is void, ignore it.
+ * 	 1,	the entry is a binary number.
+ *	 2,	the entry is a pointer at an expression.
+ *		Where expression may be as simple as a single '1',
+ *		and as complicated as  foo-bar+12,
+ * 		foo and bar may be undefined but suffixed by :{b|w|d} to
+ *		control the length of the object.
+ *
+ *	 3,	the entry is a pointer at a bignum struct
+ *
+ *
+ * The low-order-byte coresponds to low physical memory.
+ * Obviously a FRAGment must be created for each valid disp in PART whose
+ * datalength is undefined (to bad) .
+ * The case where just the expression is undefined is less severe and is
+ * handled by fix. Here the number of bytes in the objectfile is known.
+ * With this representation we simplify the assembly and separates the
+ * machine dependent/independent parts in a more clean way (said OE)
+ */
+
+struct option opt1[]= /* restore, exit */
+{
+  { "r0",	0x80,	0xff	},
+  { "r1",	0x40,	0xff	},
+  { "r2",	0x20,	0xff	},
+  { "r3",	0x10,	0xff	},
+  { "r4",	0x08,	0xff	},
+  { "r5",	0x04,	0xff	},
+  { "r6",	0x02,	0xff	},
+  { "r7",	0x01,	0xff	},
+  {  0 ,	0x00,	0xff	}
+};
+struct option opt2[]= /* save, enter */
+{
+  { "r0",	0x01,	0xff	},
+  { "r1",	0x02,	0xff	},
+  { "r2",	0x04,	0xff	},
+  { "r3",	0x08,	0xff	},
+  { "r4",	0x10,	0xff	},
+  { "r5",	0x20,	0xff	},
+  { "r6",	0x40,	0xff	},
+  { "r7",	0x80,	0xff	},
+  {  0 ,	0x00,	0xff	}
+};
+struct option opt3[]= /* setcfg */
+{
+  { "c",	0x8,	0xff	},
+  { "m",	0x4,	0xff	},
+  { "f",	0x2,	0xff	},
+  { "i",	0x1,	0xff	},
+  {  0 ,	0x0,	0xff	}
+};
+struct option opt4[]= /* cinv */
+{
+  { "a",	0x4,	0xff	},
+  { "i",	0x2,	0xff	},
+  { "d",	0x1,	0xff	},
+  {  0 ,	0x0,	0xff	}
+};
+struct option opt5[]= /* string inst */
+{
+  { "b",	0x2,	0xff	},
+  { "u",	0xc,	0xff	},
+  { "w",	0x4,	0xff	},
+  {  0 ,	0x0,	0xff	}
+};
+struct option opt6[]= /* plain reg ext,cvtp etc */
+{
+  { "r0",	0x00,	0xff	},
+  { "r1",	0x01,	0xff	},
+  { "r2",	0x02,	0xff	},
+  { "r3",	0x03,	0xff	},
+  { "r4",	0x04,	0xff	},
+  { "r5",	0x05,	0xff	},
+  { "r6",	0x06,	0xff	},
+  { "r7",	0x07,	0xff	},
+  {  0 ,	0x00,	0xff	}
+};
+
+#if !defined(NS32032) && !defined(NS32532)
+#define NS32032
+#endif
+
+struct option cpureg_532[]= /* lpr spr */
+{
+  { "us",	0x0,	0xff	},
+  { "dcr",	0x1,	0xff	},
+  { "bpc",	0x2,	0xff	},
+  { "dsr",	0x3,	0xff	},
+  { "car",	0x4,	0xff	},
+  { "fp",	0x8,	0xff	},
+  { "sp",	0x9,	0xff	},
+  { "sb",	0xa,	0xff	},
+  { "usp",	0xb,	0xff	},
+  { "cfg",	0xc,	0xff	},
+  { "psr",	0xd,	0xff	},
+  { "intbase",	0xe,	0xff	},
+  { "mod",	0xf,	0xff	},
+  {  0 ,	0x00,	0xff	}
+};
+struct option mmureg_532[]= /* lmr smr */
+{
+  { "mcr",	0x9,	0xff	},
+  { "msr",	0xa,	0xff	},
+  { "tear",	0xb,	0xff	},
+  { "ptb0",	0xc,	0xff	},
+  { "ptb1",	0xd,	0xff	},
+  { "ivar0",	0xe,	0xff	},
+  { "ivar1",	0xf,	0xff	},
+  {  0 ,	0x0,	0xff	}
+};
+
+struct option cpureg_032[]= /* lpr spr */
+{
+  { "upsr",	0x0,	0xff	},
+  { "fp",	0x8,	0xff	},
+  { "sp",	0x9,	0xff	},
+  { "sb",	0xa,	0xff	},
+  { "psr",	0xd,	0xff	},
+  { "intbase",	0xe,	0xff	},
+  { "mod",	0xf,	0xff	},
+  {  0 ,	0x0,	0xff	}
+};
+struct option mmureg_032[]= /* lmr smr */
+{
+  { "bpr0",	0x0,	0xff	},
+  { "bpr1",	0x1,	0xff	},
+  { "pf0",	0x4,	0xff	},
+  { "pf1",	0x5,	0xff	},
+  { "sc",	0x8,	0xff	},
+  { "msr",	0xa,	0xff	},
+  { "bcnt",	0xb,	0xff	},
+  { "ptb0",	0xc,	0xff	},
+  { "ptb1",	0xd,	0xff	},
+  { "eia",	0xf,	0xff	},
+  {  0 ,	0x0,	0xff	}
+};
+
+#if defined(NS32532)
+struct option *cpureg = cpureg_532;
+struct option *mmureg = mmureg_532;
+#else
+struct option *cpureg = cpureg_032;
+struct option *mmureg = mmureg_032;
+#endif
+
+
+const pseudo_typeS md_pseudo_table[]={ /* so far empty */
+  { 0,	0,	0	}
+};
+
+#define IND(x,y)	(((x)<<2)+(y))
+
+/* those are index's to relax groups in md_relax_table 
+   ie it must be multiplied by 4 to point at a group start. Viz IND(x,y)
+   Se function relax_segment in write.c for more info */
+
+#define BRANCH		1
+#define PCREL		2 
+
+/* those are index's to entries in a relax group */
+
+#define BYTE		0
+#define WORD		1
+#define DOUBLE		2
+#define UNDEF           3
+/* Those limits are calculated from the displacement start in memory.
+   The ns32k uses the begining of the instruction as displacement base.
+   This type of displacements could be handled here by moving the limit window
+   up or down. I choose to use an internal displacement base-adjust as there
+   are other routines that must consider this. Also, as we have two various
+   offset-adjusts in the ns32k (acb versus br/brs/jsr/bcond), two set of limits
+   would have had to be used.
+   Now we dont have to think about that. */
+
+
+const relax_typeS md_relax_table[]={
+  { 1,		1,		0,	0			},
+  { 1,		1,		0,	0			},
+  { 1,		1,		0,	0			},
+  { 1,		1,		0,	0			},
+
+  { (63),	(-64),		1,	IND(BRANCH,WORD)	},
+  { (8192),	(-8192),	2,	IND(BRANCH,DOUBLE)	},
+  { 0,		0,		4,	0			},
+  { 1,		1,		0,	0			}
+};
+
+/* Array used to test if mode contains displacements.
+   Value is true if mode contains displacement. */
+
+char disp_test[]={ 0,0,0,0,0,0,0,0,
+		   1,1,1,1,1,1,1,1,
+		   1,1,1,0,0,1,1,0,
+		   1,1,1,1,1,1,1,1 };
+
+/* Array used to calculate max size of displacements */
+
+char disp_size[]={ 4,1,2,0,4 };
+
+
+#ifdef __STDC__
+
+static segT evaluate_expr(expressionS *resultP, char *ptr);
+static void md_number_to_disp(char *buf, long val, int n);
+static void md_number_to_imm(char *buf, long val, int n);
+
+#else /* __STDC__ */
+
+static segT evaluate_expr();
+static void md_number_to_disp();
+static void md_number_to_imm();
+
+#endif /* __STDC__ */
+
+/* Parses a general operand into an addressingmode struct 
+
+   in:  pointer at operand in ascii form
+        pointer at addr_mode struct for result
+	the level of recursion. (always 0 or 1)
+
+   out: data in addr_mode struct
+ */
+int addr_mode(operand,addr_modeP,recursive_level)
+     char *operand;
+     register addr_modeS *addr_modeP;
+int recursive_level;
+{
+  register char *str;
+  register int i;
+  register int strl;
+  register int mode;
+  int j;
+  mode = DEFAULT;			 	/* default */
+  addr_modeP->scaled_mode=0;		/* why not */
+  addr_modeP->scaled_reg=0;		/* if 0, not scaled index */
+  addr_modeP->float_flag=0;
+  addr_modeP->am_size=0;
+  addr_modeP->im_disp=0;
+  addr_modeP->pcrel=0;			/* not set in this function */
+  addr_modeP->disp_suffix[0]=0;
+  addr_modeP->disp_suffix[1]=0;
+  addr_modeP->disp[0]=NULL;
+  addr_modeP->disp[1]=NULL;
+  str=operand;
+  if (str[0]==0) {return (0);}		/* we don't want this */
+  strl=strlen(str);               
+  switch (str[0]) {
+    /* the following three case statements controls the mode-chars
+       this is the place to ed if you want to change them */
+#ifdef ABSOLUTE_PREFIX
+  case ABSOLUTE_PREFIX:
+    if (str[strl-1]==']') break;
+    addr_modeP->mode=21;		/* absolute */
+    addr_modeP->disp[0]=str+1;
+    return (-1);
+#endif
+#ifdef IMMEDIATE_PREFIX
+  case IMMEDIATE_PREFIX:
+    if (str[strl-1]==']') break;
+    addr_modeP->mode=20;		/* immediate */
+    addr_modeP->disp[0]=str+1;
+    return (-1);
+#endif
+  case '.':
+    if (str[strl-1]!=']') {
+      switch (str[1]) {
+      case'-':case'+':
+        if (str[2]!='\000') {
+	  addr_modeP->mode=27;		/* pc-relativ */
+	  addr_modeP->disp[0]=str+2;
+	  return (-1);
+	}
+      default:
+        as_warn("Invalid syntax in PC-relative addressing mode");
+        return(0);
+      }
+    }
+    break;
+  case'e':
+    if (str[strl-1]!=']') {
+      if((!strncmp(str,"ext(",4)) && strl>7) {	/* external */
+	addr_modeP->disp[0]=str+4;
+	i=0;
+	j=2;
+	do {				 /* disp[0]'s termination point */
+	  j+=1;
+	  if (str[j]=='(') i++;
+	  if (str[j]==')') i--;
+	} while (j<strl && i!=0);
+	if (i!=0 || !(str[j+1]=='-' || str[j+1]=='+') ) {
+	  as_warn("Invalid syntax in External addressing mode");
+	  return(0);
+	}
+	str[j]='\000';			/* null terminate disp[0] */
+	addr_modeP->disp[1]=str+j+2;
+	addr_modeP->mode=22;
+	return (-1);
+      }
+    }
+  break;
+  default:;
+  }
+  strl=strlen(str);               
+  switch(strl) {
+  case 2:
+    switch (str[0]) {
+    case'f':addr_modeP->float_flag=1;
+    case'r':
+      if (str[1]>='0' && str[1]<'8') {
+	addr_modeP->mode=str[1]-'0';
+	return (-1);
+      }
+    }
+  case 3:
+    if (!strncmp(str,"tos",3)) {
+      addr_modeP->mode=23; /* TopOfStack */
+      return (-1);
+    }
+  default:;
+  }
+  if (strl>4) {
+    if (str[strl-1]==')') {
+      if (str[strl-2]==')') {
+	if (!strncmp(&str[strl-5],"(fp",3)) {
+	  mode=16; /* Memory Relative */
+	}
+	if (!strncmp(&str[strl-5],"(sp",3)) {
+	  mode=17;
+	}
+	if (!strncmp(&str[strl-5],"(sb",3)) {
+	  mode=18;
+	}
+	if (mode!=DEFAULT) {	      /* memory relative */
+	  addr_modeP->mode=mode;
+	  j=strl-5; /* temp for end of disp[0] */
+	  i=0;
+	  do {
+	    strl-=1;
+	    if (str[strl]==')') i++;
+	    if (str[strl]=='(') i--;
+	  } while (strl>-1 && i!=0);
+	  if (i!=0) {
+	    as_warn("Invalid syntax in Memory Relative addressing mode");
+	    return(0);
+	  }
+	  addr_modeP->disp[1]=str;
+	  addr_modeP->disp[0]=str+strl+1;
+	  str[j]='\000'; /* null terminate disp[0] */
+	  str[strl]='\000'; /* null terminate disp[1] */
+	  return (-1);
+	}
+      }
+      switch (str[strl-3]) {
+      case'r':case'R':
+        if (str[strl-2]>='0' && str[strl-2]<'8' && str[strl-4]=='(') {
+	  addr_modeP->mode=str[strl-2]-'0'+8;
+	  addr_modeP->disp[0]=str;
+	  str[strl-4]=0;
+	  return (-1); /* reg rel */
+	}
+      default:
+        if (!strncmp(&str[strl-4],"(fp",3)) {
+	  mode=24;
+	}
+        if (!strncmp(&str[strl-4],"(sp",3)) {
+	  mode=25;
+	}
+        if (!strncmp(&str[strl-4],"(sb",3)) {
+	  mode=26;
+	}
+	if (!strncmp(&str[strl-4],"(pc",3)) {
+	  mode=27;
+	}
+        if (mode!=DEFAULT) {
+	  addr_modeP->mode=mode;
+	  addr_modeP->disp[0]=str;
+	  str[strl-4]='\0';
+	  return (-1); /* memory space */
+	}
+      }
+    }
+     /* no trailing ')' do we have a ']' ? */
+    if (str[strl-1]==']') {
+      switch (str[strl-2]) {
+      case'b':mode=28;break;
+      case'w':mode=29;break;
+      case'd':mode=30;break;
+      case'q':mode=31;break;
+      default:;
+        as_warn("Invalid scaled-indexed mode, use (b,w,d,q)");
+        if (str[strl-3]!=':' || str[strl-6]!='[' ||
+	    str[strl-5]=='r' || str[strl-4]<'0' || str[strl-4]>'7') {
+	  as_warn("Syntax in scaled-indexed mode, use [Rn:m] where n=[0..7] m={b,w,d,q}");
+	}
+      }  /* scaled index */
+      {
+	if (recursive_level>0) {
+	  as_warn("Scaled-indexed addressing mode combined with scaled-index");
+	  return(0);
+	}
+	addr_modeP->am_size+=1;		/* scaled index byte */
+	j=str[strl-4]-'0';		/* store temporary */
+	str[strl-6]='\000';		/* nullterminate for recursive call */
+	i=addr_mode(str,addr_modeP,1);
+	if (!i || addr_modeP->mode==20) {
+	  as_warn("Invalid or illegal addressing mode combined with scaled-index");
+	  return(0);
+	}
+	addr_modeP->scaled_mode=addr_modeP->mode; /* store the inferior mode */
+	addr_modeP->mode=mode;
+	addr_modeP->scaled_reg=j+1;
+	return (-1);
+      }
+    }
+  }
+  addr_modeP->mode = DEFAULT;	/* default to whatever */
+  addr_modeP->disp[0]=str;
+  return (-1);
+}
+
+/* ptr points at string
+   addr_modeP points at struct with result
+   This routine calls addr_mode to determine the general addr.mode of
+   the operand. When this is ready it parses the displacements for size
+   specifying suffixes and determines size of immediate mode via ns32k-opcode.
+   Also builds index bytes if needed.
+ */
+int get_addr_mode(ptr,addr_modeP)
+     char *ptr;
+     addr_modeS *addr_modeP;
+{
+  int tmp;
+  addr_mode(ptr,addr_modeP,0);
+  if (addr_modeP->mode == DEFAULT || addr_modeP->scaled_mode == -1) {
+			       /* resolve ambigious operands, this shouldn't
+				  be necessary if one uses standard NSC operand
+				  syntax. But the sequent compiler doesn't!!!
+				  This finds a proper addressinging mode if it
+				  is implicitly stated. See ns32k-opcode.h */
+    (void)evaluate_expr(&exprP,ptr); /* this call takes time Sigh! */
+    if (addr_modeP->mode == DEFAULT) {
+      if (exprP.X_add_symbol || exprP.X_subtract_symbol) {
+	addr_modeP->mode=desc->default_model; /* we have a label */
+      } else {
+	addr_modeP->mode=desc->default_modec; /* we have a constant */
+      }
+    } else {
+      if (exprP.X_add_symbol || exprP.X_subtract_symbol) {
+	addr_modeP->scaled_mode=desc->default_model;
+      } else {
+	addr_modeP->scaled_mode=desc->default_modec;
+      }
+    }
+    /* must put this mess down in addr_mode to handle the scaled case better */
+  }
+  /* It appears as the sequent compiler wants an absolute when we have a
+     label without @. Constants becomes immediates besides the addr case.
+     Think it does so with local labels too, not optimum, pcrel is better.
+     When I have time I will make gas check this and select pcrel when possible
+     Actually that is trivial.
+     */
+  if (tmp=addr_modeP->scaled_reg) { /* build indexbyte */
+    tmp--; /* remember regnumber comes incremented for flagpurpose */
+    tmp|=addr_modeP->scaled_mode<<3;
+    addr_modeP->index_byte=(char)tmp;
+    addr_modeP->am_size+=1;
+  }
+  if (disp_test[addr_modeP->mode]) { /* there was a displacement, probe for length specifying suffix*/
+    {
+      register char c;
+      register char suffix;
+      register char suffix_sub;
+      register int i;
+      register char *toP;
+      register char *fromP;
+
+      addr_modeP->pcrel=0;
+      if (disp_test[addr_modeP->mode]) { /* there is a displacement */
+	if (addr_modeP->mode==27 || addr_modeP->scaled_mode==27) { /* do we have pcrel. mode */
+	  addr_modeP->pcrel=1;
+	}
+	addr_modeP->im_disp=1;
+	for(i=0;i<2;i++) {
+	  suffix_sub=suffix=0;
+	  if (toP=addr_modeP->disp[i]) { /* suffix of expression, the largest size rules */
+	    fromP=toP;
+	    while (c = *fromP++) {
+	      *toP++=c;
+	      if (c==':') {
+		switch (*fromP) {
+		case '\0':
+		  as_warn("Premature end of suffix--Defaulting to d");
+		  suffix=4;
+		  continue;
+		case 'b':suffix_sub=1;break;
+		case 'w':suffix_sub=2;break;
+		case 'd':suffix_sub=4;break;
+		default:
+		  as_warn("Bad suffix after ':' use {b|w|d} Defaulting to d");
+		  suffix=4;
+		}
+		fromP++;
+		toP--; /* So we write over the ':' */
+		if (suffix<suffix_sub) suffix=suffix_sub;
+	      }
+	    }
+	    *toP='\0'; /* terminate properly */
+	    addr_modeP->disp_suffix[i]=suffix;
+	    addr_modeP->am_size+=suffix ? suffix : 4;
+	  }
+	}
+      }
+    }
+  } else {
+    if (addr_modeP->mode==20) { /* look in ns32k_opcode for size */
+      addr_modeP->disp_suffix[0]=addr_modeP->am_size=desc->im_size;
+      addr_modeP->im_disp=0;
+    }
+  }
+  return addr_modeP->mode;
+}
+
+
+/* read an optionlist */
+void optlist(str,optionP,default_map)
+     char *str;			 /* the string to extract options from */
+     struct option *optionP;	 /* how to search the string */
+     unsigned long *default_map; /* default pattern and output */
+{
+  register int i,j,k,strlen1,strlen2;
+  register char *patternP,*strP;
+  strlen1=strlen(str);
+  if (strlen1<1) { 
+    as_fatal("Very short instr to option, ie you can't do it on a NULLstr");
+  }
+  for (i=0;optionP[i].pattern!=0;i++) {
+    strlen2=strlen(optionP[i].pattern);
+    for (j=0;j<strlen1;j++) {
+      patternP=optionP[i].pattern;
+      strP = &str[j];
+      for (k=0;k<strlen2;k++) {
+	if (*(strP++)!=*(patternP++)) break;
+      }
+      if (k==strlen2) { /* match */
+	*default_map|=optionP[i].or;
+	*default_map&=optionP[i].and;
+      }
+    }
+  }
+}
+/* search struct for symbols 
+   This function is used to get the short integer form of reg names
+   in the instructions lmr, smr, lpr, spr
+   return true if str is found in list */
+
+int list_search(str,optionP,default_map)
+     char *str;			 /* the string to match */
+     struct option *optionP;	 /* list to search */
+     unsigned long *default_map; /* default pattern and output */
+{
+  register int i;
+  for (i=0;optionP[i].pattern!=0;i++) {
+    if (!strncmp(optionP[i].pattern,str,20)) { /* use strncmp to be safe */
+      *default_map|=optionP[i].or;
+      *default_map&=optionP[i].and;
+      return -1;
+    }
+  }
+  as_warn("No such entry in list. (cpu/mmu register)");
+  return 0;
+}
+static segT evaluate_expr(resultP,ptr)
+expressionS *resultP;
+char *ptr;
+{
+  register char *tmp_line;
+  register segT segment;
+  tmp_line=input_line_pointer;
+  input_line_pointer=ptr;
+  segment=expression(&exprP);
+  input_line_pointer=tmp_line;
+  return (segment);
+}
+
+/* Convert operands to iif-format and adds bitfields to the opcode.
+   Operands are parsed in such an order that the opcode is updated from
+   its most significant bit, that is when the operand need to alter the
+   opcode.
+   Be carefull not to put to objects in the same iif-slot.
+   */
+
+void encode_operand(argc,argv,operandsP,suffixP,im_size,opcode_bit_ptr)
+     int argc;
+     char **argv;
+     char *operandsP;
+     char *suffixP;
+     char im_size;
+     char opcode_bit_ptr;
+{
+  register int i,j;
+  int pcrel,tmp,b,loop,pcrel_adjust;
+  for(loop=0;loop<argc;loop++) {
+    i=operandsP[loop<<1]-'1'; /* what operand are we supposed to work on */
+    if (i>3) as_fatal("Internal consistency error.  check ns32k-opcode.h");
+    pcrel=0;
+    pcrel_adjust=0;
+    tmp=0;
+    switch (operandsP[(loop<<1)+1]) {
+    case 'f':  /* operand of sfsr turns out to be a nasty specialcase */
+      opcode_bit_ptr-=5;
+    case 'F':		/* 32 bit float	general form */
+    case 'L':		/* 64 bit float	*/
+    case 'Q':		/* quad-word	*/
+    case 'B':		/* byte	 */
+    case 'W':		/* word	 */
+    case 'D':		/* double-word	*/
+    case 'A':		/* double-word	gen-address-form ie no regs allowed */
+      get_addr_mode(argv[i],&addr_modeP);
+      iif.instr_size+=addr_modeP.am_size;
+      if (opcode_bit_ptr==desc->opcode_size) b=4; else b=6;
+      for (j=b;j<(b+2);j++) { 
+	if (addr_modeP.disp[j-b]) { 
+	  IIF(j,
+	      2,
+	      addr_modeP.disp_suffix[j-b],
+	      (unsigned long)addr_modeP.disp[j-b],
+	      0,
+	      addr_modeP.pcrel,
+	      iif.instr_size-addr_modeP.am_size, /* this aint used (now) */
+	      addr_modeP.im_disp,
+	      IND(BRANCH,BYTE),
+	      NULL,
+	      addr_modeP.scaled_reg ? addr_modeP.scaled_mode:addr_modeP.mode,
+	      0);
+	}
+      }
+      opcode_bit_ptr-=5;
+      iif.iifP[1].object|=((long)addr_modeP.mode)<<opcode_bit_ptr;
+      if (addr_modeP.scaled_reg) { 
+	j=b/2;
+	IIF(j,1,1, (unsigned long)addr_modeP.index_byte,0,0,0,0,0, NULL,-1,0);
+      }
+      break;
+    case 'b':		/* multiple instruction disp */
+      freeptr++;	/* OVE:this is an useful hack */
+      tmp=(int)sprintf(freeptr,"((%s-1)*%d)\000",argv[i],desc->im_size);
+      argv[i]=freeptr;
+      freeptr=(char*)tmp;
+      pcrel-=1; /* make pcrel 0 inspite of what case 'p': wants */
+      /* fall thru */
+    case 'p':		/* displacement - pc relative addressing */
+      pcrel+=1;
+      /* fall thru */
+    case 'd':					/* displacement */
+      iif.instr_size+=suffixP[i] ? suffixP[i] : 4;
+      IIF(12, 2, suffixP[i], (unsigned long)argv[i], 0,
+	  pcrel, pcrel_adjust, 1, IND(BRANCH,BYTE), NULL,-1,0);
+      break;
+    case 'H': /* sequent-hack: the linker wants a bit set when bsr */
+      pcrel=1;
+      iif.instr_size+=suffixP[i] ? suffixP[i] : 4;
+      IIF(12, 2, suffixP[i], (unsigned long)argv[i], 0,
+	  pcrel, pcrel_adjust, 1, IND(BRANCH,BYTE), NULL,-1,1);break;
+    case 'q':					/* quick */
+      opcode_bit_ptr-=4;
+      IIF(11,2,42,(unsigned long)argv[i],0,0,0,0,0,
+	  bit_fix_new(4,opcode_bit_ptr,-8,7,0,1,0),-1,0);
+      break;
+    case 'r':				/* register number (3 bits) */
+      list_search(argv[i],opt6,&tmp);
+      opcode_bit_ptr-=3;
+      iif.iifP[1].object|=tmp<<opcode_bit_ptr;
+      break;
+    case 'O':				/* setcfg instruction optionslist */
+      optlist(argv[i],opt3,&tmp);
+      opcode_bit_ptr-=4;
+      iif.iifP[1].object|=tmp<<15;
+      break;
+    case 'C':				/* cinv instruction optionslist */
+      optlist(argv[i],opt4,&tmp);
+      opcode_bit_ptr-=4;
+      iif.iifP[1].object|=tmp<<15;/*insert the regtype in opcode */
+      break;
+    case 'S':				/* stringinstruction optionslist */
+      optlist(argv[i],opt5,&tmp);
+      opcode_bit_ptr-=4;
+      iif.iifP[1].object|=tmp<<15;
+      break;
+    case 'u':case 'U':				/* registerlist */
+      IIF(10,1,1,0,0,0,0,0,0,NULL,-1,0);
+      switch (operandsP[(i<<1)+1]) {
+      case 'u':			       	/* restore, exit */
+	optlist(argv[i],opt1,&iif.iifP[10].object);
+	break;
+      case 'U':					/* save,enter */
+	optlist(argv[i],opt2,&iif.iifP[10].object);
+	break;
+      }
+      iif.instr_size+=1;
+      break;
+    case 'M':					/* mmu register */
+      list_search(argv[i],mmureg,&tmp);
+      opcode_bit_ptr-=4;
+      iif.iifP[1].object|=tmp<<opcode_bit_ptr;
+      break;
+    case 'P':					/* cpu register  */
+      list_search(argv[i],cpureg,&tmp);
+      opcode_bit_ptr-=4;
+      iif.iifP[1].object|=tmp<<opcode_bit_ptr;
+      break;
+    case 'g': /* inss exts */
+      iif.instr_size+=1; /* 1 byte is allocated after the opcode */
+      IIF(10,2,1,
+	  (unsigned long)argv[i], /* i always 2 here */
+	  0,0,0,0,0,
+	  bit_fix_new(3,5,0,7,0,0,0), /* a bit_fix is targeted to the byte */
+	  -1,0);
+    case 'G':
+      IIF(11,2,42,
+	  (unsigned long)argv[i], /* i always 3 here */
+	  0,0,0,0,0,
+	  bit_fix_new(5,0,1,32,-1,0,-1),-1,0);
+      break;
+    case 'i':
+      iif.instr_size+=1;
+      b=2+i;  /* put the extension byte after opcode */
+      IIF(b,2,1,0,0,0,0,0,0,0,-1,0);
+    default:
+      as_fatal("Bad opcode-table-option, check in file ns32k-opcode.h");
+    }
+  }
+}
+
+/* in:  instruction line
+   out: internal structure of instruction
+        that has been prepared for direct conversion to fragment(s) and
+	fixes in a systematical fashion
+	Return-value = recursive_level
+*/
+/* build iif of one assembly text line */
+int parse(line,recursive_level)
+     char *line;
+     int recursive_level;
+{
+  register char			*lineptr,c,suffix_separator;
+  register int			i;
+  int				argc,arg_type;
+  char				sqr,sep;
+  char suffix[MAX_ARGS],*argv[MAX_ARGS];/* no more than 4 operands */
+  if (recursive_level<=0) { /* called from md_assemble */
+    for (lineptr=line;(*lineptr)!='\0' && (*lineptr)!=' ';lineptr++); 
+    c = *lineptr;
+    *lineptr='\0';
+    if (!(desc=(struct ns32k_opcode*)hash_find(inst_hash_handle,line))) {
+      as_fatal("No such opcode");
+    }
+    *lineptr=c;
+  } else {
+    lineptr=line;
+  }
+  argc=0;
+  if (*desc->operands) {
+    if (*lineptr++!='\0') {
+      sqr='[';
+      sep=',';
+      while (*lineptr!='\0') {
+	if (desc->operands[argc<<1]) {
+	  suffix[argc]=0;
+	  arg_type=desc->operands[(argc<<1)+1];
+	  switch (arg_type) {
+	  case 'd': case 'b': case 'p': case 'H':  /* the operand is supposed to be a displacement */
+	    /* Hackwarning: do not forget to update the 4 cases above when editing ns32k-opcode.h */
+	    suffix_separator=':';
+	    break;
+	  default:
+	    suffix_separator='\255'; /* if this char occurs we loose */
+	  }
+	  suffix[argc]=0; /* 0 when no ':' is encountered */
+	  argv[argc]=freeptr;
+	  *freeptr='\0';
+	  while ((c = *lineptr)!='\0' && c!=sep) {
+	    if (c==sqr) {
+	      if (sqr=='[') {
+		sqr=']';sep='\0';
+	      } else {
+		sqr='[';sep=',';
+	      }
+	    }
+	    if (c==suffix_separator) { /* ':' - label/suffix separator */
+	      switch (lineptr[1]) {
+	      case 'b':suffix[argc]=1;break;
+	      case 'w':suffix[argc]=2;break;
+	      case 'd':suffix[argc]=4;break;
+	      default: as_warn("Bad suffix, defaulting to d");
+		suffix[argc]=4;
+		if (lineptr[1]=='\0' || lineptr[1]==sep) {
+		  lineptr+=1;
+		  continue;
+		}
+	      }
+	      lineptr+=2;
+	      continue;
+	    }
+	    *freeptr++=c;
+	    lineptr++;
+	  }
+	  *freeptr++='\0';
+	  argc+=1;
+	  if (*lineptr=='\0') continue;
+	  lineptr+=1;
+	} else {
+	  as_fatal("Too many operands passed to instruction");
+	}
+      }
+    }
+  }
+  if (argc!=strlen(desc->operands)/2) {
+    if (strlen(desc->default_args)) { /* we can apply default, dont goof */
+      if (parse(desc->default_args,1)!=1) { /* check error in default */
+	as_fatal("Wrong numbers of operands in default, check ns32k-opcodes.h");
+      }
+    } else {
+      as_fatal("Wrong number of operands");
+    }
+
+  }
+  for (i=0;i<IIF_ENTRIES;i++) {
+    iif.iifP[i].type=0; /* mark all entries as void*/
+  }
+
+    /* build opcode iif-entry */
+  iif.instr_size=desc->opcode_size/8;
+  IIF(1,1,iif.instr_size,desc->opcode_seed,0,0,0,0,0,0,-1,0);
+
+    /* this call encodes operands to iif format */
+  if (argc) {
+    encode_operand(argc,
+		   argv,
+		   &desc->operands[0],
+		   &suffix[0],
+		   desc->im_size,
+		   desc->opcode_size);
+  }
+  return recursive_level;
+}
+
+
+  /* Convert iif to fragments.
+     From this point we start to dribble with functions in other files than
+     this one.(Except hash.c) So, if it's possible to make an iif for an other
+     CPU, you don't need to know what frags, relax, obstacks, etc is in order
+     to port this assembler. You only need to know if it's possible to reduce
+     your cpu-instruction to iif-format (takes some work) and adopt the other
+     md_? parts according to given instructions
+     Note that iif was invented for the clean ns32k`s architecure.
+     */
+void convert_iif() {
+  register int			i,j;
+  fragS 			*inst_frag;
+  char				*inst_offset,*inst_opcode;
+  char				*memP;
+  segT				segment;
+  int				l,k;
+  register int rem_size; /* count the remaining bytes of instruction */
+  register char type;
+  register char size = 0;
+  int	size_so_far=0; /* used to calculate pcrel_adjust */
+
+    rem_size=iif.instr_size;
+    memP=frag_more(iif.instr_size); /* make sure we have enough bytes for instruction */
+    inst_opcode=memP;
+    inst_offset=(char*)(memP-frag_now->fr_literal);
+    inst_frag=frag_now;
+    for (i=0;i<IIF_ENTRIES;i++) {
+      if (type=iif.iifP[i].type) {			/* the object exist, so handle it */
+	switch (size=iif.iifP[i].size) {
+	case 42: size=0; /* it's a bitfix that operates on an existing object*/
+	  if (iif.iifP[i].bit_fixP->fx_bit_base) { /* expand fx_bit_base to point at opcode */
+	    iif.iifP[i].bit_fixP->fx_bit_base=(long)inst_opcode;
+	  }
+	case 8: /* bignum or doublefloat */
+	  bzero (memP,8);
+	case 1:case 2:case 3:case 4:/* the final size in objectmemory is known */
+	  j=(unsigned long)iif.iifP[i].bit_fixP;
+	  switch (type) {
+	  case 1:				/* the object is pure binary */
+	    if (j || iif.iifP[i].pcrel) {
+	      fix_new_ns32k(frag_now,
+			    (long)(memP-frag_now->fr_literal),
+			    size,
+			    0,
+			    0,
+			    iif.iifP[i].object,
+			    iif.iifP[i].pcrel,
+			    (char)size_so_far, /*iif.iifP[i].pcrel_adjust,*/
+			    iif.iifP[i].im_disp,
+			    j,
+			    iif.iifP[i].bsr); /* sequent hack */
+	    } else {			/* good, just put them bytes out */
+	      switch (iif.iifP[i].im_disp) {
+	      case 0:
+		md_number_to_chars(memP,iif.iifP[i].object,size);break;
+	      case 1:
+		md_number_to_disp(memP,iif.iifP[i].object,size);break;
+	      default: as_fatal("iif convert internal pcrel/binary");
+	      }
+	    }
+	    memP+=size;
+	    rem_size-=size;
+	    break;
+	  case 2:	/* the object is a pointer at an expression, so unpack
+	  		   it, note that bignums may result from the expression
+			 */
+	    if ((segment=evaluate_expr(&exprP,(char*)iif.iifP[i].object))==SEG_BIG || size==8) {
+	      if ((k=exprP.X_add_number)>0) { /* we have a bignum ie a quad */
+		/* this can only happens in a long suffixed instruction */
+		bzero(memP,size); /* size normally is 8 */
+		if (k*2>size) as_warn("Bignum too big for long");
+		if (k==3) memP+=2;
+		for (l=0;k>0;k--,l+=2) {
+		  md_number_to_chars(memP+l,generic_bignum[l>>1],sizeof(LITTLENUM_TYPE));
+		}
+	      } else { /* flonum */
+		LITTLENUM_TYPE words[4];
+
+		switch(size) {
+		case 4:
+		  gen_to_words(words,2,8);
+		  md_number_to_imm(memP                       ,(long)words[0],sizeof(LITTLENUM_TYPE));
+		  md_number_to_imm(memP+sizeof(LITTLENUM_TYPE),(long)words[1],sizeof(LITTLENUM_TYPE));
+		  break;
+		case 8:
+		  gen_to_words(words,4,11);
+		  md_number_to_imm(memP                         ,(long)words[0],sizeof(LITTLENUM_TYPE));
+		  md_number_to_imm(memP+sizeof(LITTLENUM_TYPE)  ,(long)words[1],sizeof(LITTLENUM_TYPE));
+		  md_number_to_imm(memP+2*sizeof(LITTLENUM_TYPE),(long)words[2],sizeof(LITTLENUM_TYPE));
+		  md_number_to_imm(memP+3*sizeof(LITTLENUM_TYPE),(long)words[3],sizeof(LITTLENUM_TYPE));
+		  break;
+		}
+	      }
+	    memP+=size;
+	    rem_size-=size;
+	    break;
+	    }
+	    if (j ||
+		exprP.X_add_symbol ||
+		exprP.X_subtract_symbol ||
+		iif.iifP[i].pcrel) {		/* fixit */
+	      /* the expression was undefined due to an undefined label */
+	      /* create a fix so we can fix the object later */
+	      exprP.X_add_number+=iif.iifP[i].object_adjust;
+	      fix_new_ns32k(frag_now,
+			    (long)(memP-frag_now->fr_literal),
+			    size,
+			    exprP.X_add_symbol,
+			    exprP.X_subtract_symbol,
+			    exprP.X_add_number,
+			    iif.iifP[i].pcrel,
+			    (char)size_so_far, /*iif.iifP[i].pcrel_adjust,*/
+			    iif.iifP[i].im_disp,
+			    j,
+			    iif.iifP[i].bsr); /* sequent hack */
+	      
+	    } else {			/* good, just put them bytes out */
+	      switch (iif.iifP[i].im_disp) {
+	      case 0:
+		md_number_to_imm(memP,exprP.X_add_number,size);break;
+	      case 1:
+		md_number_to_disp(memP,exprP.X_add_number,size);break;
+	      default: as_fatal("iif convert internal pcrel/pointer");
+	      }
+	    }
+	    memP+=size;
+	    rem_size-=size;
+	    break;
+	  default: as_fatal("Internal logic error in iif.iifP[n].type");
+	  }
+	  break;
+	case 0: 	 /* To bad, the object may be undefined as far as its final
+			    nsize in object memory is concerned. The size of the object
+			    in objectmemory is not explicitly given.
+			    If the object is defined its length can be determined and
+			    a fix can replace the frag.
+			    */
+	  {
+	    int temp;
+	    segment=evaluate_expr(&exprP,(char*)iif.iifP[i].object);
+	    if ((exprP.X_add_symbol || exprP.X_subtract_symbol) &&
+		!iif.iifP[i].pcrel) { /* OVE: hack, clamp to 4 bytes */
+	      size=4; /* we dont wan't to frag this, use 4 so it reaches */
+	      fix_new_ns32k(frag_now,
+			    (long)(memP-frag_now->fr_literal),
+			    size,
+			    exprP.X_add_symbol,
+			    exprP.X_subtract_symbol,
+			    exprP.X_add_number,
+			    0, /* never iif.iifP[i].pcrel, */
+			    (char)size_so_far, /*iif.iifP[i].pcrel_adjust,*/
+			    1, /* always iif.iifP[i].im_disp, */
+			    0,0);
+	      memP+=size;
+	      rem_size-=4;
+	      break; /* exit this absolute hack */
+	    }
+
+	    if (exprP.X_add_symbol || exprP.X_subtract_symbol) { /* frag it */
+	      if (exprP.X_subtract_symbol) { /* We cant relax this case */
+		as_fatal("Can't relax difference");
+	      }
+	      else {
+		/* at this stage we must undo some of the effect caused
+		   by frag_more, ie we must make sure that frag_var causes
+		   frag_new to creat a valid fix-size in the frag it`s closing
+		   */
+		temp = -(rem_size-4);
+		obstack_blank_fast(&frags,temp);
+		  /* we rewind none, some or all of the requested size we
+		     requested by the first frag_more for this iif chunk.
+		     Note: that we allocate 4 bytes to an object we NOT YET 
+		     know the size of, thus rem_size-4.
+		     */
+		(void)frag_variant(rs_machine_dependent,
+				   4,
+				   0,
+				   IND(BRANCH,UNDEF), /* expecting the worst */
+				   exprP.X_add_symbol,
+				   exprP.X_add_number,
+				   (char*)inst_opcode,
+				   (char)size_so_far, /*iif.iifP[i].pcrel_adjust);*/
+		                   iif.iifP[i].bsr); /* sequent linker hack */
+		rem_size-=4;
+		if (rem_size>0) {
+		  memP=frag_more(rem_size);
+		}
+	      }
+	    }
+	    else {/* Double work, this is done in md_number_to_disp */
+/*	      exprP.X_add_number; what was this supposed to be?
+  xoxorich. */
+	      if (-64<=exprP.X_add_number && exprP.X_add_number<=63) {
+		size=1;
+	      } else {
+		if (-8192<=exprP.X_add_number && exprP.X_add_number<=8191) {
+		  size=2;
+		} else {
+		  if (-0x1f000000<=exprP.X_add_number &&
+		      exprP.X_add_number<=0x1fffffff)
+		  /* if (-0x40000000<=exprP.X_add_number &&
+		      exprP.X_add_number<=0x3fffffff) */
+		  {
+		    size=4;
+		  } else {
+		    as_warn("Displacement to large for :d");
+		    size=4;
+		  }
+		}
+	      }
+	      /* rewind the bytes not used */
+	      temp = -(4-size);
+	      md_number_to_disp(memP,exprP.X_add_number,size);
+	      obstack_blank_fast(&frags,temp);
+	      memP+=size;
+	      rem_size-=4; /* we allocated this amount */
+	    }
+	  }
+	  break;
+	default:
+	  as_fatal("Internal logic error in iif.iifP[].type");
+	}
+	size_so_far+=size;
+	size=0;
+      }
+    }
+}
+
+void md_assemble(line)
+char *line;
+{
+  freeptr=freeptr_static;
+  parse(line,0); /* explode line to more fix form in iif */
+  convert_iif(); /* convert iif to frags, fix's etc */
+#ifdef SHOW_NUM
+  printf(" \t\t\t%s\n",line);
+#endif
+}
+
+
+void md_begin() {
+  /* build a hashtable of the instructions */
+  register const struct ns32k_opcode *ptr;
+  register char *stat;
+  inst_hash_handle=hash_new();
+  for (ptr=ns32k_opcodes;ptr<endop;ptr++) {
+    if (*(stat=hash_insert(inst_hash_handle,ptr->name,(char*)ptr))) {
+	as_fatal("Can't hash %s: %s", ptr->name,stat); /*fatal*/
+      exit(0);
+    }
+  }
+  freeptr_static=(char*)malloc(PRIVATE_SIZE); /* some private space please! */
+}
+
+
+void
+md_end() {
+  free(freeptr_static);
+}
+
+/* Must be equal to MAX_PRECISON in atof-ieee.c */
+#define MAX_LITTLENUMS 6
+
+/* Turn the string pointed to by litP into a floating point constant of type
+   type, and emit the appropriate bytes.  The number of LITTLENUMS emitted
+   is stored in *sizeP .  An error message is returned, or NULL on OK.
+ */
+char *
+md_atof(type,litP,sizeP)
+char type;
+char *litP;
+int *sizeP;
+{
+	int	prec;
+	LITTLENUM_TYPE words[MAX_LITTLENUMS];
+	LITTLENUM_TYPE *wordP;
+	char	*t;
+
+	switch(type) {
+	case 'f':
+		prec = 2;
+		break;
+
+	case 'd':
+		prec = 4;
+		break;
+	default:
+		*sizeP=0;
+		return "Bad call to MD_ATOF()";
+	}
+	t=atof_ieee(input_line_pointer,type,words);
+	if(t)
+		input_line_pointer=t;
+
+	*sizeP=prec * sizeof(LITTLENUM_TYPE);
+	for(wordP=words+prec;prec--;) {
+		md_number_to_chars(litP,(long)(*--wordP),sizeof(LITTLENUM_TYPE));
+		litP+=sizeof(LITTLENUM_TYPE);
+	}
+	return "";	/* Someone should teach Dean about null pointers */
+}
+
+/* Convert number to chars in correct order */
+
+void
+md_number_to_chars (buf, value, nbytes)
+     char	*buf;
+     long	value;
+     int	nbytes;
+{
+  while (nbytes--)
+    {
+#ifdef SHOW_NUM
+      printf("%x ",value & 0xff);
+#endif
+      *buf++ = value;		/* Lint wants & MASK_CHAR. */
+      value >>= BITS_PER_CHAR;
+    }
+}
+/* Convert number to chars in correct order */
+
+
+
+/* This is a variant of md_numbers_to_chars. The reason for its' existence
+   is the fact that ns32k uses Huffman coded displacements. This implies
+   that the bit order is reversed in displacements and that they are prefixed
+   with a size-tag.
+
+   binary: msb -> lsb	0xxxxxxx				byte
+   			10xxxxxx xxxxxxxx			word
+   			11xxxxxx xxxxxxxx xxxxxxxx xxxxxxxx	double word
+          
+   This must be taken care of and we do it here! 		  
+ */
+static void md_number_to_disp(buf,val,n)
+     char	*buf;
+     long	val;
+     char       n;
+{ 
+  switch(n) {
+  case 1:
+    if (val < -64 || val > 63)
+      as_warn("Byte displacement out of range.  line number not valid");
+    val&=0x7f;
+#ifdef SHOW_NUM
+		printf("%x ",val & 0xff);
+#endif
+    *buf++=val;
+    break;
+  case 2:
+    if (val < -8192 || val > 8191)
+      as_warn("Word displacement out of range.  line number not valid");
+    val&=0x3fff;
+    val|=0x8000;
+#ifdef SHOW_NUM
+		printf("%x ",val>>8 & 0xff);
+#endif
+    *buf++=(val>>8);
+#ifdef SHOW_NUM
+		printf("%x ",val & 0xff);
+#endif
+    *buf++=val;
+    break;
+  case 4:
+    if (val < -0x1f000000 || val >= 0x20000000)
+    /* if (val < -0x20000000 || val >= 0x20000000) */
+      as_warn("Double word displacement out of range");
+    val|=0xc0000000;
+#ifdef SHOW_NUM
+		printf("%x ",val>>24 & 0xff);
+#endif
+    *buf++=(val>>24);
+#ifdef SHOW_NUM
+		printf("%x ",val>>16 & 0xff);
+#endif
+    *buf++=(val>>16);
+#ifdef SHOW_NUM
+		printf("%x ",val>>8 & 0xff);
+#endif
+    *buf++=(val>>8);
+#ifdef SHOW_NUM
+		printf("%x ",val & 0xff);
+#endif
+    *buf++=val;
+    break;
+  default:
+    as_fatal("Internal logic error.  line %s, file \"%s\"", __LINE__, __FILE__);
+  }
+}
+
+static void md_number_to_imm(buf,val,n)
+     char	*buf;
+     long	val;
+     char       n;
+{ 
+  switch(n) {
+  case 1:
+#ifdef SHOW_NUM
+    printf("%x ",val & 0xff);
+#endif
+    *buf++=val;
+    break;
+  case 2:
+#ifdef SHOW_NUM
+		printf("%x ",val>>8 & 0xff);
+#endif
+    *buf++=(val>>8);
+#ifdef SHOW_NUM
+		printf("%x ",val & 0xff);
+#endif
+    *buf++=val;
+    break;
+  case 4:
+#ifdef SHOW_NUM
+		printf("%x ",val>>24 & 0xff);
+#endif
+    *buf++=(val>>24);
+#ifdef SHOW_NUM
+		printf("%x ",val>>16 & 0xff);
+#endif
+    *buf++=(val>>16);
+#ifdef SHOW_NUM
+		printf("%x ",val>>8 & 0xff);
+#endif
+    *buf++=(val>>8);
+#ifdef SHOW_NUM
+		printf("%x ",val & 0xff);
+#endif
+    *buf++=val;
+    break;
+  default:
+    as_fatal("Internal logic error. line %s, file \"%s\"", __LINE__, __FILE__);
+  }
+}
+
+/* Translate internal representation of relocation info into target format.
+
+   OVE: on a ns32k the twiddling continues at an even deeper level
+   here we have to distinguish between displacements and immediates.
+
+   The sequent has a bit for this. It also has a bit for relocobjects that
+   points at the target for a bsr (BranchSubRoutine) !?!?!?!
+
+   This md_ri.... is tailored for sequent.
+   */
+
+void
+md_ri_to_chars(the_bytes, ri)
+     char *the_bytes;
+     struct reloc_info_generic *ri;
+{	
+  if (ri->r_bsr) {ri->r_pcrel=0;} /* sequent seems to want this */
+  md_number_to_chars(the_bytes, ri->r_address, sizeof(ri->r_address));
+  md_number_to_chars(the_bytes+4,
+		     (long)(ri->r_symbolnum       ) |
+		     (long)(ri->r_pcrel     << 24 ) |
+		     (long)(ri->r_length	   << 25 ) |
+		     (long)(ri->r_extern	   << 27 ) |
+		     (long)(ri->r_bsr	   << 28 ) |
+		     (long)(ri->r_disp	   << 29 ),
+		     4);
+  /* the first and second md_number_to_chars never overlaps (32bit cpu case) */
+}
+
+/* fast bitfiddling support */
+/* mask used to zero bitfield before oring in the true field */
+
+static unsigned long l_mask[]={	0xffffffff, 0xfffffffe, 0xfffffffc, 0xfffffff8,
+				0xfffffff0, 0xffffffe0, 0xffffffc0, 0xffffff80,
+				0xffffff00, 0xfffffe00, 0xfffffc00, 0xfffff800,
+				0xfffff000, 0xffffe000, 0xffffc000, 0xffff8000,
+				0xffff0000, 0xfffe0000, 0xfffc0000, 0xfff80000,
+				0xfff00000, 0xffe00000, 0xffc00000, 0xff800000,
+				0xff000000, 0xfe000000, 0xfc000000, 0xf8000000,
+				0xf0000000, 0xe0000000, 0xc0000000, 0x80000000,
+				};
+static unsigned long r_mask[]={	0x00000000, 0x00000001, 0x00000003, 0x00000007,
+				0x0000000f, 0x0000001f, 0x0000003f, 0x0000007f,
+				0x000000ff, 0x000001ff, 0x000003ff, 0x000007ff,
+				0x00000fff, 0x00001fff, 0x00003fff, 0x00007fff,
+				0x0000ffff, 0x0001ffff, 0x0003ffff, 0x0007ffff,
+				0x000fffff, 0x001fffff, 0x003fffff, 0x007fffff,
+				0x00ffffff, 0x01ffffff, 0x03ffffff, 0x07ffffff,
+				0x0fffffff, 0x1fffffff, 0x3fffffff, 0x7fffffff,
+				};
+#define MASK_BITS 31
+/* Insert bitfield described by field_ptr and val at buf
+   This routine is written for modification of the first 4 bytes pointed
+   to by buf, to yield speed.
+   The ifdef stuff is for selection between a ns32k-dependent routine
+   and a general version. (My advice: use the general version!)
+ */
+
+static void
+md_number_to_field(buf,val,field_ptr)
+     register char	*buf;
+     register long	val;
+     register bit_fixS  *field_ptr;
+{ 
+  register unsigned long object;
+  register unsigned long mask;
+/* define ENDIAN on a ns32k machine */
+#ifdef ENDIAN
+  register unsigned long *mem_ptr;
+#else
+  register char *mem_ptr;
+#endif
+  if (field_ptr->fx_bit_min<=val && val<=field_ptr->fx_bit_max) {
+#ifdef ENDIAN
+    if (field_ptr->fx_bit_base) { /* override buf */
+      mem_ptr=(unsigned long*)field_ptr->fx_bit_base;
+    } else {
+      mem_ptr=(unsigned long*)buf;
+    }
+#else
+    if (field_ptr->fx_bit_base) { /* override buf */
+      mem_ptr=(char*)field_ptr->fx_bit_base;
+    } else {
+      mem_ptr=buf;
+    }
+#endif
+    mem_ptr+=field_ptr->fx_bit_base_adj;
+#ifdef ENDIAN  /* we have a nice ns32k machine with lowbyte at low-physical mem */
+    object = *mem_ptr; /* get some bytes */
+#else /* OVE Goof! the machine is a m68k or dito */
+      /* That takes more byte fiddling */
+    object=0;
+    object|=mem_ptr[3] & 0xff;
+    object<<=8;
+    object|=mem_ptr[2] & 0xff;
+    object<<=8;
+    object|=mem_ptr[1] & 0xff;
+    object<<=8;
+    object|=mem_ptr[0] & 0xff;
+#endif
+    mask=0;
+    mask|=(r_mask[field_ptr->fx_bit_offset]);
+    mask|=(l_mask[field_ptr->fx_bit_offset+field_ptr->fx_bit_size]);
+    object&=mask;
+    val+=field_ptr->fx_bit_add;
+    object|=((val<<field_ptr->fx_bit_offset) & (mask ^ 0xffffffff));
+#ifdef ENDIAN
+    *mem_ptr=object;
+#else
+    mem_ptr[0]=(char)object;
+    object>>=8;
+    mem_ptr[1]=(char)object;
+    object>>=8;
+    mem_ptr[2]=(char)object;
+    object>>=8;
+    mem_ptr[3]=(char)object;
+#endif
+  } else {
+    as_warn("Bit field out of range");
+  }
+}
+
+/* Apply a fixS (fixup of an instruction or data that we didn't have
+   enough info to complete immediately) to the data in a frag.
+
+   On the ns32k, everything is in a different format, so we have broken
+   out separate functions for each kind of thing we could be fixing.  
+   They all get called from here.  */
+
+void
+md_apply_fix(fixP, val)
+    fixS *fixP;
+    long val;
+{
+    char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
+
+    if (fixP->fx_bit_fixP) {	/* Bitfields to fix, sigh */
+	md_number_to_field (buf, val, fixP->fx_bit_fixP);
+    } else switch (fixP->fx_im_disp) {
+
+    case 0:			/* Immediate field */
+	md_number_to_imm (buf, val, fixP->fx_size);
+	break;
+
+    case 1:			/* Displacement field */
+	md_number_to_disp (buf, 
+	    fixP->fx_pcrel? val + fixP->fx_pcrel_adjust: val,
+	    fixP->fx_size);
+	break;
+
+    case 2:			/* Pointer in a data object */
+	md_number_to_chars (buf, val, fixP->fx_size);
+	break;
+    }
+}
+
+/* Convert a relaxed displacement to ditto in final output */
+
+void
+md_convert_frag(fragP)
+register fragS *fragP;
+{
+  long disp;
+  long ext;
+
+  /* Address in gas core of the place to store the displacement.  */
+  register char *buffer_address = fragP -> fr_fix + fragP -> fr_literal;
+  /* Address in object code of the displacement.  */
+  register int object_address = fragP -> fr_fix + fragP -> fr_address;
+
+  know(fragP->fr_symbol);
+
+  /* The displacement of the address, from current location.  */
+  disp = (S_GET_VALUE(fragP->fr_symbol) + fragP->fr_offset) - object_address;
+  disp+= fragP->fr_pcrel_adjust;
+
+  switch(fragP->fr_subtype) {
+  case IND(BRANCH,BYTE):
+    ext=1;
+    break;
+  case IND(BRANCH,WORD):
+    ext=2;
+    break;
+  case IND(BRANCH,DOUBLE):
+    ext=4;
+    break;
+  }
+  if(ext) {
+    md_number_to_disp(buffer_address,(long)disp,(int)ext);
+    fragP->fr_fix+=ext;
+  }
+}
+
+
+
+/* This function returns the estimated size a variable object will occupy,
+   one can say that we tries to guess the size of the objects before we
+   actually know it */
+   
+int md_estimate_size_before_relax(fragP, segment)
+     register fragS *fragP;
+     segT segment;
+{
+  int	old_fix;
+  old_fix=fragP->fr_fix;
+  switch(fragP->fr_subtype) {
+  case IND(BRANCH,UNDEF):
+    if(S_GET_SEGMENT(fragP->fr_symbol) == segment) {
+      /* the symbol has been assigned a value */
+      fragP->fr_subtype=IND(BRANCH,BYTE);
+    } else {
+      /* we don't relax symbols defined in an other segment
+         the thing to do is to assume the object will occupy 4 bytes */
+      fix_new_ns32k(fragP,
+		    (int)(fragP->fr_fix),
+		    4,
+		    fragP->fr_symbol,
+		    (symbolS *)0,
+		    fragP->fr_offset,
+		    1,
+		    fragP->fr_pcrel_adjust,
+		    1,
+		    0,
+		    fragP->fr_bsr); /*sequent hack */
+      fragP->fr_fix+=4;
+      /* fragP->fr_opcode[1]=0xff; */
+      frag_wane(fragP);
+      break;
+    }
+  case IND(BRANCH,BYTE):
+    fragP->fr_var+=1;
+    break;
+  default:
+    break;
+  }
+  return fragP->fr_var + fragP->fr_fix - old_fix;
+}
+
+int md_short_jump_size = 3;
+int md_long_jump_size  = 5;
+int md_reloc_size = 8;		/* Size of relocation record */
+
+void
+md_create_short_jump(ptr,from_addr,to_addr,frag,to_symbol)
+char	*ptr;
+long	from_addr,
+	to_addr;
+fragS	*frag;
+symbolS	*to_symbol;
+{
+	long offset;
+
+	offset = to_addr - from_addr;
+	md_number_to_chars(ptr, (long)0xEA  ,1);
+	md_number_to_disp(ptr+1,(long)offset,2);
+}
+
+void
+md_create_long_jump(ptr,from_addr,to_addr,frag,to_symbol)
+char	*ptr;
+long	from_addr,
+	to_addr;
+fragS	*frag;
+symbolS	*to_symbol;
+{
+	long offset;
+
+	offset= to_addr - from_addr;
+	md_number_to_chars(ptr, (long)0xEA,  2);
+	md_number_to_disp(ptr+2,(long)offset,4);
+}
+
+/* JF this is a new function to parse machine-dep options */
+int
+md_parse_option(argP,cntP,vecP)
+char **argP;
+int *cntP;
+char ***vecP;
+{
+	switch(**argP) {
+	case 'm':
+	  (*argP)++;
+
+	  if(!strcmp(*argP,"32032")) {
+	    cpureg = cpureg_032;
+	    mmureg = mmureg_032;
+	  } else if(!strcmp(*argP, "32532")) {
+	    cpureg = cpureg_532;
+	    mmureg = mmureg_532;
+	  } else
+	    as_warn("Unknown -m option ignored");
+
+	  while(**argP)
+	    (*argP)++;
+	  break;
+
+	default:
+	  return 0;
+	}
+	return 1;
+}
+
+/*
+ *			bit_fix_new()
+ *
+ * Create a bit_fixS in obstack 'notes'.
+ * This struct is used to profile the normal fix. If the bit_fixP is a
+ * valid pointer (not NULL) the bit_fix data will be used to format the fix.
+ */
+bit_fixS *bit_fix_new (size,offset,min,max,add,base_type,base_adj)
+     char	size;		/* Length of bitfield		*/
+     char	offset;		/* Bit offset to bitfield	*/
+     long	base_type;	/* 0 or 1, if 1 it's exploded to opcode ptr */
+     long	base_adj;
+     long	min;		/* Signextended min for bitfield */
+     long	max;		/* Signextended max for bitfield */
+     long	add;		/* Add mask, used for huffman prefix */
+{
+  register bit_fixS *	bit_fixP;
+
+  bit_fixP = (bit_fixS *)obstack_alloc(&notes,sizeof(bit_fixS));
+
+  bit_fixP -> fx_bit_size	= size;
+  bit_fixP -> fx_bit_offset	= offset;
+  bit_fixP -> fx_bit_base	= base_type;
+  bit_fixP -> fx_bit_base_adj	= base_adj;
+  bit_fixP -> fx_bit_max	= max;
+  bit_fixP -> fx_bit_min	= min;
+  bit_fixP -> fx_bit_add	= add;
+
+  return bit_fixP;
+}
+
+void
+fix_new_ns32k (frag, where, size, add_symbol, sub_symbol, offset, pcrel,
+	 pcrel_adjust, im_disp, bit_fixP, bsr)
+     fragS *	frag;		/* Which frag? */
+     int	where;		/* Where in that frag? */
+     short int	size;		/* 1, 2  or 4 usually. */
+     symbolS *	add_symbol;	/* X_add_symbol. */
+     symbolS *	sub_symbol;	/* X_subtract_symbol. */
+     long	offset;		/* X_add_number. */
+     int	pcrel;		/* TRUE if PC-relative relocation. */
+     char	pcrel_adjust;	/* not zero if adjustment of pcrel offset is needed */
+     char	im_disp;	/* true if the value to write is a displacement */
+     bit_fixS *bit_fixP;	/* pointer at struct of bit_fix's, ignored if NULL */
+     char	bsr;		/* sequent-linker-hack: 1 when relocobject is a bsr */
+     
+{
+  register fixS *	fixP;
+
+  fixP = (fixS *)obstack_alloc(&notes,sizeof(fixS));
+  fixP -> fx_frag		= frag;
+  fixP -> fx_where		= where;
+  fixP -> fx_size		= size;
+  fixP -> fx_addsy		= add_symbol;
+  fixP -> fx_subsy		= sub_symbol;
+  fixP -> fx_offset		= offset;
+  fixP -> fx_pcrel		= pcrel;
+  fixP -> fx_pcrel_adjust	= pcrel_adjust;
+  fixP -> fx_im_disp		= im_disp;
+  fixP -> fx_bit_fixP		= bit_fixP;
+  fixP -> fx_bsr		= bsr;
+  fixP -> fx_next		= * seg_fix_rootP;
+
+  * seg_fix_rootP = fixP;
+}
+
+/* We have no need to default values of symbols.  */
+
+symbolS *
+md_undefined_symbol (name)
+     char *name;
+{
+  return 0;
+}
+
+/* Parse an operand that is machine-specific.  
+   We just return without modifying the expression if we have nothing
+   to do.  */
+
+/* ARGSUSED */
+void
+md_operand (expressionP)
+     expressionS *expressionP;
+{
+}
+
+/* Round up a section size to the appropriate boundary.  */
+long
+md_section_align (segment, size)
+     segT segment;
+     long size;
+{
+  return size;		/* Byte alignment is fine */
+}
+
+/* Exactly what point is a PC-relative offset relative TO?
+   On the National warts, they're relative to the address of the offset,
+   with some funny adjustments in some circumstances during blue moons.
+   (??? Is this right?  FIXME-SOON) */
+long
+md_pcrel_from (fixP)
+     fixS *fixP;
+{
+  long res;
+  res = fixP->fx_where + fixP->fx_frag->fr_address;
+#ifdef SEQUENT_COMPATABILITY
+  if (fixP->fx_frag->fr_bsr)
+    res += 0x12		/* FOO Kludge alert! */
+#endif
+  return res;
+}
+
+/*
+ * $Log$
+ * Revision 1.1  1991/04/04 18:17:05  rich
+ * Initial revision
+ *
+ *
+ */
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * End:
+ */
+
+/* end of tc-ns32k.c */
diff --git a/gas/config/tc-ns32k.h b/gas/config/tc-ns32k.h
new file mode 100644
index 0000000..b96b650
--- /dev/null
+++ b/gas/config/tc-ns32k.h
@@ -0,0 +1,57 @@
+/* ns32k-opcode.h -- Opcode table for National Semi 32k processor
+   Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+
+#ifdef SEQUENT_COMPATABILITY
+#define DEF_MODEC 20
+#define DEF_MODEL 21
+#endif
+
+#ifndef DEF_MODEC
+#define DEF_MODEC 20
+#endif
+
+#ifndef DEF_MODEL
+#define DEF_MODEL 20
+#endif
+
+#define MAX_ARGS 4
+#define ARG_LEN 50
+
+#ifdef __STDC__
+
+void fix_new_ns32k(fragS *frag,
+		   int where,
+		   void *add_symbol, /* really symbolS */
+		   void *sub_symbol, /* really symbolS */
+		   long offset,
+		   int pcrel,
+		   int pcrel_adjust,
+		   int im_disp,
+		   void *bit_fixP, /* really bit_fixS */
+		   int bsr);
+
+#else /* __STDC__ */
+
+void fix_new_ns32k();
+
+#endif /* __STDC__ */
+
+
+/* end of tc-ns32k.h */
diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c
new file mode 100644
index 0000000..bd71fa8
--- /dev/null
+++ b/gas/config/tc-sparc.c
@@ -0,0 +1,1297 @@
+/* tc-sparc.c -- Assemble for the SPARC
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+   
+   This file is part of GAS, the GNU Assembler.
+   
+   GAS is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 1, or (at your option)
+   any later version.
+   
+   GAS is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+   
+   You should have received a copy of the GNU General Public License
+   along with GAS; see the file COPYING.  If not, write to
+   the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+/* static const char rcsid[] = "$Id$"; */
+
+#include <stdio.h>
+#include <ctype.h>
+
+#include "as.h"
+
+/* careful, this file includes data *declarations* */
+#include "sparc-opcode.h"
+
+void md_begin();
+void md_end();
+void md_number_to_chars();
+void md_assemble();
+char *md_atof();
+void md_convert_frag();
+void md_create_short_jump();
+void md_create_long_jump();
+int md_estimate_size_before_relax();
+void md_ri_to_chars();
+symbolS *md_undefined_symbol();
+static void sparc_ip();
+
+const relax_typeS md_relax_table[] = {
+	0 };
+
+/* handle of the OPCODE hash table */
+static struct hash_control *op_hash = NULL;
+
+static void s_seg(), s_proc(), s_data1(), s_reserve(), s_common();
+extern void s_globl(), s_long(), s_short(), s_space(), cons();
+extern void s_align_bytes(), s_ignore();
+
+const pseudo_typeS md_pseudo_table[] = {
+	{ "align",	s_align_bytes,	0	},    /* Defaulting is invalid (0) */
+	{ "common",	s_common,	0	},
+	{ "global",	s_globl,	0	},
+	{ "half",	cons,		2	},
+	{ "optim",	s_ignore,	0	},
+	{ "proc",	s_proc,		0	},
+	{ "reserve",	s_reserve,	0	},
+	{ "seg",	s_seg,		0	},
+	{ "skip",	s_space,	0	},
+	{ "word",	cons,		4	},
+	{ NULL,	0,		0	},
+};
+
+int md_short_jump_size = 4;
+int md_long_jump_size = 4;
+int md_reloc_size = 12;			/* Size of relocation record */
+
+/* This array holds the chars that always start a comment.  If the
+   pre-processor is disabled, these aren't very useful */
+char comment_chars[] = "!";	/* JF removed '|' from comment_chars */
+
+/* This array holds the chars that only start a comment at the beginning of
+   a line.  If the line seems to have the form '# 123 filename'
+   .line and .file directives will appear in the pre-processed output */
+/* Note that input_file.c hand checks for '#' at the beginning of the
+   first line of the input file.  This is because the compiler outputs
+   #NO_APP at the beginning of its output. */
+/* Also note that comments started like this one will always work */
+char line_comment_chars[] = "#";
+
+/* Chars that can be used to separate mant from exp in floating point nums */
+char EXP_CHARS[] = "eE";
+
+/* Chars that mean this number is a floating point constant */
+/* As in 0f12.456 */
+/* or    0d1.2345e12 */
+char FLT_CHARS[] = "rRsSfFdDxXpP";
+
+/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
+   changed in read.c .  Ideally it shouldn't have to know about it at all,
+   but nothing is ideal around here.
+   */
+
+static unsigned char octal[256];
+#define isoctal(c)  octal[c]
+static unsigned char toHex[256];
+
+/*
+ *  anull bit - causes the branch delay slot instructions to not be executed
+ */
+#define ANNUL       (1 << 29)
+
+struct sparc_it {
+	char *error;
+	unsigned long opcode;
+	struct nlist *nlistp;
+	expressionS exp;
+	int pcrel;
+	enum reloc_type reloc;
+} the_insn, set_insn;
+
+#ifdef __STDC__
+#if 0
+static void print_insn(struct sparc_it *insn);
+#endif
+static int getExpression(char *str);
+#else
+#if 0
+static void print_insn();
+#endif
+static int getExpression();
+#endif
+static char *expr_end;
+static int special_case;
+
+/*
+ * Instructions that require wierd handling because they're longer than
+ * 4 bytes.
+ */
+#define	SPECIAL_CASE_SET	1
+#define	SPECIAL_CASE_FDIV	2
+
+/*
+ * sort of like s_lcomm
+ *
+ */
+static void s_reserve() {
+	char *name;
+	char c;
+	char *p;
+	int temp;
+	symbolS *symbolP;
+	
+	name = input_line_pointer;
+	c = get_symbol_end();
+	p = input_line_pointer;
+	*p = c;
+	SKIP_WHITESPACE();
+	if (* input_line_pointer != ',') {
+		as_bad("Expected comma after name");
+		ignore_rest_of_line();
+		return;
+	}
+	input_line_pointer ++;
+	if ((temp = get_absolute_expression()) < 0) {
+		as_bad("BSS length (%d.) <0! Ignored.", temp);
+		ignore_rest_of_line();
+		return;
+	}
+	*p = 0;
+	symbolP = symbol_find_or_make(name);
+	*p = c;
+	if (strncmp(input_line_pointer, ",\"bss\"", 6) != 0) {
+		as_bad("bad .reserve segment: `%s'", input_line_pointer);
+		return;
+	}
+	input_line_pointer += 6;
+	if (S_GET_OTHER(symbolP) == 0
+	    && S_GET_DESC(symbolP) == 0
+	    && ((S_GET_TYPE(symbolP) == N_BSS
+		 && S_GET_VALUE(symbolP) == local_bss_counter)
+		|| !S_IS_DEFINED(symbolP))) {
+		S_SET_VALUE(symbolP, local_bss_counter);
+		S_SET_SEGMENT(symbolP, SEG_BSS);
+		symbolP->sy_frag  = & bss_address_frag;
+		local_bss_counter += temp;
+	} else {
+		as_warn("Ignoring attempt to re-define symbol from %d. to %d.",
+			S_GET_VALUE(symbolP), local_bss_counter);
+	}
+	demand_empty_rest_of_line();
+	return;
+} /* s_reserve() */
+
+static void s_common() {
+	register char *name;
+	register char c;
+	register char *p;
+	register int temp;
+	register symbolS *	symbolP;
+	
+	name = input_line_pointer;
+	c = get_symbol_end();
+	/* just after name is now '\0' */
+	p = input_line_pointer;
+	*p = c;
+	SKIP_WHITESPACE();
+	if (* input_line_pointer != ',') {
+		as_bad("Expected comma after symbol-name");
+		ignore_rest_of_line();
+		return;
+	}
+	input_line_pointer ++; /* skip ',' */
+	if ((temp = get_absolute_expression ()) < 0) {
+		as_bad(".COMMon length (%d.) <0! Ignored.", temp);
+		ignore_rest_of_line();
+		return;
+	}
+	*p = 0;
+	symbolP = symbol_find_or_make(name);
+	*p = c;
+	if (S_IS_DEFINED(symbolP)) {
+		as_bad("Ignoring attempt to re-define symbol");
+		ignore_rest_of_line();
+		return;
+	}
+	if (S_GET_VALUE(symbolP) != 0) {
+		if (S_GET_VALUE(symbolP) != temp) {
+			as_warn("Length of .comm \"%s\" is already %d. Not changed to %d.",
+				S_GET_NAME(symbolP), S_GET_VALUE(symbolP), temp);
+		}
+	} else {
+		S_SET_VALUE(symbolP, temp);
+		S_SET_EXTERNAL(symbolP);
+	}
+	know(symbolP->sy_frag == &zero_address_frag);
+	if (strncmp(input_line_pointer, ",\"bss\"", 6) != 0
+	    && strncmp(input_line_pointer, ",\"data\"", 7) != 0) {
+		p=input_line_pointer;
+		while(*p && *p!='\n')
+		    p++;
+		c= *p;
+		*p='\0';
+		as_bad("bad .common segment: `%s'", input_line_pointer);
+		*p=c;
+		return;
+	}
+	input_line_pointer += 6 + (input_line_pointer[2] == 'd'); /* Skip either */
+	demand_empty_rest_of_line();
+	return;
+} /* s_common() */
+
+static void s_seg() {
+	
+	if (strncmp(input_line_pointer, "\"text\"", 6) == 0) {
+		input_line_pointer += 6;
+		s_text();
+		return;
+	}
+	if (strncmp(input_line_pointer, "\"data\"", 6) == 0) {
+		input_line_pointer += 6;
+		s_data();
+		return;
+	}
+	if (strncmp(input_line_pointer, "\"data1\"", 7) == 0) {
+		input_line_pointer += 7;
+		s_data1();
+		return;
+	}
+	if (strncmp(input_line_pointer, "\"bss\"", 5) == 0) {
+		input_line_pointer += 5;
+		/* We only support 2 segments -- text and data -- for now, so
+		   things in the "bss segment" will have to go into data for now.
+		   You can still allocate SEG_BSS stuff with .lcomm or .reserve. */
+		subseg_new(SEG_DATA, 255);	/* FIXME-SOMEDAY */
+		return;
+	}
+	as_bad("Unknown segment type");
+	demand_empty_rest_of_line();
+	return;
+} /* s_seg() */
+
+static void s_data1() {
+	subseg_new(SEG_DATA, 1);
+	demand_empty_rest_of_line();
+	return;
+} /* s_data1() */
+
+static void s_proc() {
+	extern char is_end_of_line[];
+	
+	while (!is_end_of_line[*input_line_pointer]) {
+		++input_line_pointer;
+	}
+	++input_line_pointer;
+	return;
+} /* s_proc() */
+
+/* This function is called once, at assembler startup time.  It should
+   set up all the tables, etc. that the MD part of the assembler will need. */
+void md_begin() {
+	register char *retval = NULL;
+	int lose = 0;
+	register unsigned int i = 0;
+	
+	op_hash = hash_new();
+	if (op_hash == NULL)
+	    as_fatal("Virtual memory exhausted");
+	
+	while (i < NUMOPCODES) {
+		const char *name = sparc_opcodes[i].name;
+		retval = hash_insert(op_hash, name, &sparc_opcodes[i]);
+		if(retval != NULL && *retval != '\0') {
+			fprintf (stderr, "internal error: can't hash `%s': %s\n",
+				 sparc_opcodes[i].name, retval);
+			lose = 1;
+		}
+		do
+		    {
+			    if (sparc_opcodes[i].match & sparc_opcodes[i].lose) {
+				    fprintf (stderr, "internal error: losing opcode: `%s' \"%s\"\n",
+					     sparc_opcodes[i].name, sparc_opcodes[i].args);
+				    lose = 1;
+			    }
+			    ++i;
+		    } while (i < NUMOPCODES
+			     && !strcmp(sparc_opcodes[i].name, name));
+	}
+	
+	if (lose)
+	    as_fatal("Broken assembler.  No assembly attempted.");
+	
+	for (i = '0'; i < '8'; ++i)
+	    octal[i] = 1;
+	for (i = '0'; i <= '9'; ++i)
+	    toHex[i] = i - '0';
+	for (i = 'a'; i <= 'f'; ++i)
+	    toHex[i] = i + 10 - 'a';
+	for (i = 'A'; i <= 'F'; ++i)
+	    toHex[i] = i + 10 - 'A';
+} /* md_begin() */
+
+void md_end() {
+	return;
+} /* md_end() */
+
+void md_assemble(str)
+char *str;
+{
+	char *toP;
+	int rsd;
+	
+	know(str);
+	sparc_ip(str);
+	
+	/* See if "set" operand is absolute and small; skip sethi if so. */
+	if (special_case == SPECIAL_CASE_SET && the_insn.exp.X_seg == SEG_ABSOLUTE) {
+		if (the_insn.exp.X_add_number >= -(1<<12)
+		    && the_insn.exp.X_add_number <   (1<<12)) {
+			the_insn.opcode = 0x80102000 		/* or %g0,imm,... */
+			    | (the_insn.opcode & 0x3E000000)	/* dest reg */
+				| (the_insn.exp.X_add_number & 0x1FFF); /* imm */
+			special_case = 0;		/* No longer special */
+			the_insn.reloc = NO_RELOC;	/* No longer relocated */
+		}
+	}
+	
+	toP = frag_more(4);
+	/* put out the opcode */
+	md_number_to_chars(toP, the_insn.opcode, 4);
+	
+	/* put out the symbol-dependent stuff */
+	if (the_insn.reloc != NO_RELOC) {
+		fix_new(frag_now,                           /* which frag */
+			(toP - frag_now->fr_literal), /* where */
+			4,                                  /* size */
+			the_insn.exp.X_add_symbol,
+			the_insn.exp.X_subtract_symbol,
+			the_insn.exp.X_add_number,
+			the_insn.pcrel,
+			the_insn.reloc);
+	}
+	switch (special_case) {
+		
+	case SPECIAL_CASE_SET:
+		special_case = 0;
+		assert(the_insn.reloc == RELOC_HI22);
+		/* See if "set" operand has no low-order bits; skip OR if so. */
+		if (the_insn.exp.X_seg == SEG_ABSOLUTE
+		    && ((the_insn.exp.X_add_number & 0x3FF) == 0))
+		    return;
+		toP = frag_more(4);
+		rsd = (the_insn.opcode >> 25) & 0x1f;
+		the_insn.opcode = 0x80102000 | (rsd << 25) | (rsd << 14);
+		md_number_to_chars(toP, the_insn.opcode, 4);
+		fix_new(frag_now,                           /* which frag */
+			(toP - frag_now->fr_literal),       /* where */
+			4,                                  /* size */
+			the_insn.exp.X_add_symbol,
+			the_insn.exp.X_subtract_symbol,
+			the_insn.exp.X_add_number,
+			the_insn.pcrel,
+			RELOC_LO10);
+		return;
+		
+	case SPECIAL_CASE_FDIV:
+		/* According to information leaked from Sun, the "fdiv" instructions
+		   on early SPARC machines would produce incorrect results sometimes.
+		   The workaround is to add an fmovs of the destination register to
+		   itself just after the instruction.  This was true on machines
+		   with Weitek 1165 float chips, such as the Sun-4/260 and /280. */
+		special_case = 0;
+		assert(the_insn.reloc == NO_RELOC);
+		toP = frag_more(4);
+		rsd = (the_insn.opcode >> 25) & 0x1f;
+		the_insn.opcode = 0x81A00020 | (rsd << 25) | rsd;  /* fmovs dest,dest */
+		md_number_to_chars(toP, the_insn.opcode, 4);
+		return;
+		
+	case 0:
+		return;
+		
+	default:
+		abort();
+	}
+} /* md_assemble() */
+
+static void sparc_ip(str)
+char *str;
+{
+	char *s;
+	const char *args;
+	char c;
+	struct sparc_opcode *insn;
+	char *argsStart;
+	unsigned long opcode;
+	unsigned int mask;
+	int match = 0;
+	int comma = 0;
+	
+	for (s = str; islower(*s) || (*s >= '0' && *s <= '3'); ++s)
+	    ;
+	switch (*s) {
+		
+	case '\0':
+		break;
+		
+	case ',':
+		comma = 1;
+		
+		/*FALLTHROUGH */
+		
+	case ' ':
+		*s++ = '\0';
+		break;
+		
+	default:
+		as_bad("Unknown opcode: `%s'", str);
+		exit(1);
+	}
+	if ((insn = (struct sparc_opcode *) hash_find(op_hash, str)) == NULL) {
+		as_bad("Unknown opcode: `%s'", str);
+		return;
+	}
+	if (comma) {
+		*--s = ',';
+	}
+	argsStart = s;
+	for (;;) {
+		opcode = insn->match;
+		bzero(&the_insn, sizeof(the_insn));
+		the_insn.reloc = NO_RELOC;
+		
+		/*
+		 * Build the opcode, checking as we go to make
+		 * sure that the operands match
+		 */
+		for (args = insn->args; ; ++args) {
+			switch (*args) {
+				
+			case '\0':  /* end of args */
+				if (*s == '\0') {
+					match = 1;
+				}
+				break;
+				
+			case '+':
+				if (*s == '+') {
+					++s;
+					continue;
+				}
+				if (*s == '-') {
+					continue;
+				}
+				break;
+				
+			case '[':   /* these must match exactly */
+			case ']':
+			case ',':
+			case ' ':
+				if (*s++ == *args)
+				    continue;
+				break;
+				
+			case '#':   /* must be at least one digit */
+				if (isdigit(*s++)) {
+					while (isdigit(*s)) {
+						++s;
+					}
+					continue;
+				}
+				break;
+				
+			case 'C':   /* coprocessor state register */
+				if (strncmp(s, "%csr", 4) == 0) {
+					s += 4;
+					continue;
+				}
+				break;
+				
+			case 'b':    /* next operand is a coprocessor register */
+			case 'c':
+			case 'D':
+				if (*s++ == '%' && *s++ == 'c' && isdigit(*s)) {
+					mask = *s++;
+					if (isdigit(*s)) {
+						mask = 10 * (mask - '0') + (*s++ - '0');
+						if (mask >= 32) {
+							break;
+						}
+					} else {
+						mask -= '0';
+					}
+					switch (*args) {
+						
+					case 'b':
+						opcode |= mask << 14;
+						continue;
+						
+					case 'c':
+						opcode |= mask;
+						continue;
+						
+					case 'D':
+						opcode |= mask << 25;
+						continue;
+					}
+				}
+				break;
+				
+			case 'r':   /* next operand must be a register */
+			case '1':
+			case '2':
+			case 'd':
+				if (*s++ == '%') {
+					switch (c = *s++) {
+						
+					case 'f':   /* frame pointer */
+						if (*s++ == 'p') {
+							mask = 0x1e;
+							break;
+						}
+						goto error;
+						
+					case 'g':   /* global register */
+						if (isoctal(c = *s++)) {
+							mask = c - '0';
+							break;
+						}
+						goto error;
+						
+					case 'i':   /* in register */
+						if (isoctal(c = *s++)) {
+							mask = c - '0' + 24;
+							break;
+						}
+						goto error;
+						
+					case 'l':   /* local register */
+						if (isoctal(c = *s++)) {
+							mask= (c - '0' + 16) ;
+							break;
+						}
+						goto error;
+						
+					case 'o':   /* out register */
+						if (isoctal(c = *s++)) {
+							mask= (c - '0' + 8) ;
+							break;
+						}
+						goto error;
+						
+					case 's':   /* stack pointer */
+						if (*s++ == 'p') {
+							mask= 0xe;
+							break;
+						}
+						goto error;
+						
+					case 'r': /* any register */
+						if (!isdigit(c = *s++)) {
+							goto error;
+						}
+						/* FALLTHROUGH */
+					case '0': case '1': case '2': case '3': case '4':
+					case '5': case '6': case '7': case '8': case '9':
+						if (isdigit(*s)) {
+							if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32) {
+								goto error;
+							}
+						} else {
+							c -= '0';
+						}
+						mask= c;
+						break;
+						
+					default:
+						goto error;
+					}
+					/*
+					 * Got the register, now figure out where
+					 * it goes in the opcode.
+					 */
+					switch (*args) {
+						
+					case '1':
+						opcode |= mask << 14;
+						continue;
+						
+					case '2':
+						opcode |= mask;
+						continue;
+						
+					case 'd':
+						opcode |= mask << 25;
+						continue;
+						
+					case 'r':
+						opcode |= (mask << 25) | (mask << 14);
+						continue;
+					}
+				}
+				break;
+				
+			case 'e':    /* next operand is a floating point register */
+			case 'f':
+			case 'g':
+				if (*s++ == '%' && *s++ == 'f' && isdigit(*s)) {
+					mask = *s++;
+					if (isdigit(*s)) {
+						mask = 10 * (mask - '0') + (*s++ - '0');
+						if (mask >= 32) {
+							break;
+						}
+					} else {
+						mask -= '0';
+					}
+					switch (*args) {
+						
+					case 'e':
+						opcode |= mask << 14;
+						continue;
+						
+					case 'f':
+						opcode |= mask;
+						continue;
+						
+					case 'g':
+						opcode |= mask << 25;
+						continue;
+					}
+				}
+				break;
+				
+			case 'F':
+				if (strncmp(s, "%fsr", 4) == 0) {
+					s += 4;
+					continue;
+				}
+				break;
+				
+			case 'h':       /* high 22 bits */
+				the_insn.reloc = RELOC_HI22;
+				goto immediate;
+				
+			case 'l':   /* 22 bit PC relative immediate */
+				the_insn.reloc = RELOC_WDISP22;
+				the_insn.pcrel = 1;
+				goto immediate;
+				
+			case 'L':   /* 30 bit immediate */
+				the_insn.reloc = RELOC_WDISP30;
+				the_insn.pcrel = 1;
+				goto immediate;
+				
+			case 'i':   /* 13 bit immediate */
+				the_insn.reloc = RELOC_BASE13;
+				
+				/*FALLTHROUGH */
+				
+			immediate:
+				if(*s==' ')
+				    s++;
+				if (*s == '%') {
+					if ((c = s[1]) == 'h' && s[2] == 'i') {
+						the_insn.reloc = RELOC_HI22;
+						s+=3;
+					} else if (c == 'l' && s[2] == 'o') {
+						the_insn.reloc = RELOC_LO10;
+						s+=3;
+					} else
+					    break;
+				}
+				/* Note that if the getExpression() fails, we will still have
+				   created U entries in the symbol table for the 'symbols'
+				   in the input string.  Try not to create U symbols for
+				   registers, etc. */
+				{
+					/* This stuff checks to see if the expression ends
+					   in +%reg If it does, it removes the register from
+					   the expression, and re-sets 's' to point to the
+					   right place */
+					
+					char *s1;
+					
+					for(s1=s;*s1 && *s1!=','&& *s1!=']';s1++)
+					    ;
+					
+					if(s1!=s && isdigit(s1[-1])) {
+						if(s1[-2]=='%' && s1[-3]=='+') {
+							s1-=3;
+							*s1='\0';
+							(void)getExpression(s);
+							*s1='+';
+							s=s1;
+							continue;
+						} else if(strchr("goli0123456789",s1[-2]) && s1[-3]=='%' && s1[-4]=='+') {
+							s1-=4;
+							*s1='\0';
+							(void)getExpression(s);
+							*s1='+';
+							s=s1;
+							continue;
+						}
+					}
+				}
+				(void)getExpression(s);
+				s = expr_end;
+				continue;
+				
+			case 'a':
+				if (*s++ == 'a') {
+					opcode |= ANNUL;
+					continue;
+				}
+				break;
+				
+			case 'A':       /* alternate space */
+				if (isdigit(*s)) {
+					long num;
+					
+					num=0;
+					while (isdigit(*s)) {
+						num= num*10 + *s-'0';
+						++s;
+					}
+					opcode |= num<<5;
+					continue;
+				}
+				break;
+				/* abort(); */
+				
+			case 'p':
+				if (strncmp(s, "%psr", 4) == 0) {
+					s += 4;
+					continue;
+				}
+				break;
+				
+			case 'q':   /* floating point queue */
+				if (strncmp(s, "%fq", 3) == 0) {
+					s += 3;
+					continue;
+				}
+				break;
+				
+			case 'Q':   /* coprocessor queue */
+				if (strncmp(s, "%cq", 3) == 0) {
+					s += 3;
+					continue;
+				}
+				break;
+				
+			case 'S':
+				if (strcmp(str, "set") == 0) {
+					special_case = SPECIAL_CASE_SET;
+					continue;
+				} else if (strncmp(str, "fdiv", 4) == 0) {
+					special_case = SPECIAL_CASE_FDIV;
+					continue;
+				}
+				break;
+				
+			case 't':
+				if (strncmp(s, "%tbr", 4) != 0)
+				    break;
+				s += 4;
+				continue;
+				
+			case 'w':
+				if (strncmp(s, "%wim", 4) != 0)
+				    break;
+				s += 4;
+				continue;
+				
+			case 'y':
+				if (strncmp(s, "%y", 2) != 0)
+				    break;
+				s += 2;
+				continue;
+				
+			default:
+				abort();
+			}
+			break;
+		}
+	error:
+		if (match == 0) {
+			/* Args don't match. */
+			if (((unsigned) (&insn[1] - sparc_opcodes)) < NUMOPCODES
+			    && !strcmp(insn->name, insn[1].name)) {
+				++insn;
+				s = argsStart;
+				continue;
+			}
+			else
+			    {
+				    as_bad("Illegal operands");
+				    return;
+			    }
+		}
+		break;
+	}
+	
+	the_insn.opcode = opcode;
+	return;
+} /* sparc_ip() */
+
+static int getExpression(str)
+char *str;
+{
+	char *save_in;
+	segT seg;
+	
+	save_in = input_line_pointer;
+	input_line_pointer = str;
+	switch (seg = expression(&the_insn.exp)) {
+		
+	case SEG_ABSOLUTE:
+	case SEG_TEXT:
+	case SEG_DATA:
+	case SEG_BSS:
+	case SEG_UNKNOWN:
+	case SEG_DIFFERENCE:
+	case SEG_BIG:
+	case SEG_ABSENT:
+		break;
+		
+	default:
+		the_insn.error = "bad segment";
+		expr_end = input_line_pointer;
+		input_line_pointer=save_in;
+		return 1;
+	}
+	expr_end = input_line_pointer;
+	input_line_pointer = save_in;
+	return 0;
+} /* getExpression() */
+
+
+/*
+  This is identical to the md_atof in m68k.c.  I think this is right,
+  but I'm not sure.
+  
+  Turn a string in input_line_pointer into a floating point constant of type
+  type, and store the appropriate bytes in *litP.  The number of LITTLENUMS
+  emitted is stored in *sizeP .  An error message is returned, or NULL on OK.
+  */
+
+/* Equal to MAX_PRECISION in atof-ieee.c */
+#define MAX_LITTLENUMS 6
+
+char *md_atof(type,litP,sizeP)
+char type;
+char *litP;
+int *sizeP;
+{
+	int prec;
+	LITTLENUM_TYPE words[MAX_LITTLENUMS];
+	LITTLENUM_TYPE *wordP;
+	char *t;
+	char *atof_ieee();
+	
+	switch(type) {
+		
+	case 'f':
+	case 'F':
+	case 's':
+	case 'S':
+		prec = 2;
+		break;
+		
+	case 'd':
+	case 'D':
+	case 'r':
+	case 'R':
+		prec = 4;
+		break;
+		
+	case 'x':
+	case 'X':
+		prec = 6;
+		break;
+		
+	case 'p':
+	case 'P':
+		prec = 6;
+		break;
+		
+	default:
+		*sizeP=0;
+		return "Bad call to MD_ATOF()";
+	}
+	t=atof_ieee(input_line_pointer,type,words);
+	if(t)
+	    input_line_pointer=t;
+	*sizeP=prec * sizeof(LITTLENUM_TYPE);
+	for(wordP=words;prec--;) {
+		md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
+		litP+=sizeof(LITTLENUM_TYPE);
+	}
+	return "";	/* Someone should teach Dean about null pointers */
+} /* md_atof() */
+
+/*
+ * Write out big-endian.
+ */
+void md_number_to_chars(buf,val,n)
+char *buf;
+long val;
+int n;
+{
+	
+	switch(n) {
+		
+	case 4:
+		*buf++ = val >> 24;
+		*buf++ = val >> 16;
+	case 2:
+		*buf++ = val >> 8;
+	case 1:
+		*buf = val;
+		break;
+		
+	default:
+		abort();
+	}
+	return;
+} /* md_number_to_chars() */
+
+/* Apply a fixS to the frags, now that we know the value it ought to
+   hold. */
+
+void md_apply_fix(fixP, val)
+fixS *fixP;
+long val;
+{
+	char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
+	
+	assert(fixP->fx_size == 4);
+	assert(fixP->fx_r_type < NO_RELOC);
+	
+	fixP->fx_addnumber = val;	/* Remember value for emit_reloc */
+	
+	/*
+	 * This is a hack.  There should be a better way to
+	 * handle this.
+	 */
+	if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) {
+		val += fixP->fx_where + fixP->fx_frag->fr_address;
+	}
+	
+	switch (fixP->fx_r_type) {
+		
+	case RELOC_32:
+		buf[0] = 0; /* val >> 24; */
+		buf[1] = 0; /* val >> 16; */
+		buf[2] = 0; /* val >> 8; */
+		buf[3] = 0; /* val; */
+		break;
+		
+#if 0
+	case RELOC_8:         /* These don't seem to ever be needed. */
+	case RELOC_16:
+	case RELOC_DISP8:
+	case RELOC_DISP16:
+	case RELOC_DISP32:
+#endif
+	case RELOC_WDISP30:
+		val = (val >>= 2) + 1;
+		buf[0] |= (val >> 24) & 0x3f;
+		buf[1]= (val >> 16);
+		buf[2] = val >> 8;
+		buf[3] = val;
+		break;
+		
+	case RELOC_HI22:
+		if(!fixP->fx_addsy) {
+			buf[1] |= (val >> 26) & 0x3f;
+			buf[2] = val >> 18;
+			buf[3] = val >> 10;
+		} else {
+			buf[2]=0;
+			buf[3]=0;
+		}
+		break;
+#if 0
+	case RELOC_22:
+	case RELOC_13:
+#endif
+	case RELOC_LO10:
+		if(!fixP->fx_addsy) {
+			buf[2] |= (val >> 8) & 0x03;
+			buf[3] = val;
+		} else
+		    buf[3]=0;
+		break;
+#if 0
+	case RELOC_SFA_BASE:
+	case RELOC_SFA_OFF13:
+	case RELOC_BASE10:
+#endif
+	case RELOC_BASE13:
+		buf[2] |= (val >> 8) & 0x1f;
+		buf[3] = val;
+		break;
+		
+	case RELOC_WDISP22:
+		val = (val >>= 2) + 1;
+		/* FALLTHROUGH */
+	case RELOC_BASE22:
+		buf[1] |= (val >> 16) & 0x3f;
+		buf[2] = val >> 8;
+		buf[3] = val;
+		break;
+		
+#if 0
+	case RELOC_PC10:
+	case RELOC_PC22:
+	case RELOC_JMP_TBL:
+	case RELOC_SEGOFF16:
+	case RELOC_GLOB_DAT:
+	case RELOC_JMP_SLOT:
+	case RELOC_RELATIVE:
+#endif
+		
+	case NO_RELOC:
+	default:
+		as_bad("bad relocation type: 0x%02x", fixP->fx_r_type);
+		break;
+	}
+} /* md_apply_fix() */
+
+/* should never be called for sparc */
+void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
+char *ptr;
+long from_addr;
+long to_addr;
+fragS *frag;
+symbolS *to_symbol;
+{
+	fprintf(stderr, "sparc_create_short_jmp\n");
+	abort();
+} /* md_create_short_jump() */
+
+/* Translate internal representation of relocation info to target format.
+   
+   On sparc: first 4 bytes are normal unsigned long address, next three
+   bytes are index, most sig. byte first.  Byte 7 is broken up with
+   bit 7 as external, bits 6 & 5 unused, and the lower
+   five bits as relocation type.  Next 4 bytes are long addend. */
+/* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
+void md_ri_to_chars(the_bytes, ri)
+char *the_bytes;
+struct reloc_info_generic *ri;
+{
+	/* this is easy */
+	md_number_to_chars(the_bytes, ri->r_address, 4);
+	/* now the fun stuff */
+	the_bytes[4] = (ri->r_index >> 16) & 0x0ff;
+	the_bytes[5] = (ri->r_index >> 8) & 0x0ff;
+	the_bytes[6] = ri->r_index & 0x0ff;
+	the_bytes[7] = ((ri->r_extern << 7)  & 0x80) | (0 & 0x60) | (ri->r_type & 0x1F);
+	/* Also easy */
+	md_number_to_chars(&the_bytes[8], ri->r_addend, 4);
+} /* md_ri_to_chars() */
+
+/* should never be called for sparc */
+void md_convert_frag(fragP)
+register fragS *fragP;
+{
+	fprintf(stderr, "sparc_convert_frag\n");
+	abort();
+} /* md_convert_frag() */
+
+/* should never be called for sparc */
+void md_create_long_jump(ptr, from_addr, to_addr, frag, to_symbol)
+char *ptr;
+long from_addr, to_addr;
+fragS	*frag;
+symbolS	*to_symbol;
+{
+	fprintf(stderr, "sparc_create_long_jump\n");
+	abort();
+} /* md_create_long_jump() */
+
+/* should never be called for sparc */
+int md_estimate_size_before_relax(fragP, segtype)
+fragS *fragP;
+segT segtype;
+{
+	fprintf(stderr, "sparc_estimate_size_before_relax\n");
+	abort();
+	return 0;
+} /* md_estimate_size_before_relax() */
+
+#if 0
+/* for debugging only */
+static void print_insn(insn)
+struct sparc_it *insn;
+{
+	char *Reloc[] = {
+		"RELOC_8",
+		"RELOC_16",
+		"RELOC_32",
+		"RELOC_DISP8",
+		"RELOC_DISP16",
+		"RELOC_DISP32",
+		"RELOC_WDISP30",
+		"RELOC_WDISP22",
+		"RELOC_HI22",
+		"RELOC_22",
+		"RELOC_13",
+		"RELOC_LO10",
+		"RELOC_SFA_BASE",
+		"RELOC_SFA_OFF13",
+		"RELOC_BASE10",
+		"RELOC_BASE13",
+		"RELOC_BASE22",
+		"RELOC_PC10",
+		"RELOC_PC22",
+		"RELOC_JMP_TBL",
+		"RELOC_SEGOFF16",
+		"RELOC_GLOB_DAT",
+		"RELOC_JMP_SLOT",
+		"RELOC_RELATIVE",
+		"NO_RELOC"
+	    };
+	
+	if (insn->error) {
+		fprintf(stderr, "ERROR: %s\n");
+	}
+	fprintf(stderr, "opcode=0x%08x\n", insn->opcode);
+	fprintf(stderr, "reloc = %s\n", Reloc[insn->reloc]);
+	fprintf(stderr, "exp = {
+\n");
+	fprintf(stderr, "\t\tX_add_symbol = %s\n",
+		((insn->exp.X_add_symbol != NULL)
+		 ? ((S_GET_NAME(insn->exp.X_add_symbol) != NULL)
+		    ? S_GET_NAME(insn->exp.X_add_symbol)
+		    : "???")
+		 : "0"));
+	fprintf(stderr, "\t\tX_sub_symbol = %s\n",
+		((insn->exp.X_subtract_symbol != NULL)
+		 ? (S_GET_NAME(insn->exp.X_subtract_symbol)
+		    ? S_GET_NAME(insn->exp.X_subtract_symbol)
+		    : "???")
+		 : "0"));
+	fprintf(stderr, "\t\tX_add_number = %d\n",
+		insn->exp.X_add_number);
+	fprintf(stderr, "}\n");
+	return;
+} /* print_insn() */
+#endif
+
+/* Set the hook... */
+
+void emit_sparc_reloc();
+void (*md_emit_relocations)() = emit_sparc_reloc;
+
+/*
+ * Sparc/AM29K relocations are completely different, so it needs
+ * this machine dependent routine to emit them.
+ */
+#if defined(OBJ_AOUT) || defined(OBJ_BOUT)
+void emit_sparc_reloc(fixP, segment_address_in_file)
+register fixS *fixP;
+relax_addressT segment_address_in_file;
+{
+	struct reloc_info_generic ri;
+	register symbolS *symbolP;
+	extern char *next_object_file_charP;
+	/*    long add_number; */
+	
+	bzero((char *) &ri, sizeof(ri));
+	for (; fixP; fixP = fixP->fx_next) {
+		
+		if (fixP->fx_r_type >= NO_RELOC) {
+			fprintf(stderr, "fixP->fx_r_type = %d\n", fixP->fx_r_type);
+			abort();
+		}
+		
+		if ((symbolP = fixP->fx_addsy) != NULL) {
+			ri.r_address = fixP->fx_frag->fr_address +
+			    fixP->fx_where - segment_address_in_file;
+			if ((S_GET_TYPE(symbolP)) == N_UNDF) {
+				ri.r_extern = 1;
+				ri.r_index = symbolP->sy_number;
+			} else {
+				ri.r_extern = 0;
+				ri.r_index = S_GET_TYPE(symbolP);
+			}
+			if (symbolP && symbolP->sy_frag) {
+				ri.r_addend = symbolP->sy_frag->fr_address;
+			}
+			ri.r_type = fixP->fx_r_type;
+			if (fixP->fx_pcrel) {
+				/*		ri.r_addend -= fixP->fx_where; */
+				ri.r_addend -= ri.r_address;
+			} else {
+				ri.r_addend = fixP->fx_addnumber;
+			}
+			
+			md_ri_to_chars(next_object_file_charP, &ri);
+			next_object_file_charP += md_reloc_size;
+		}
+	}
+	return;
+} /* emit_sparc_reloc() */
+#endif /* aout or bout */
+
+int md_parse_option(argP,cntP,vecP)
+char **argP;
+int *cntP;
+char ***vecP;
+{
+	return 1;
+} /* md_parse_option() */
+
+/* We have no need to default values of symbols. */
+
+/* ARGSUSED */
+symbolS *md_undefined_symbol(name)
+char *name;
+{
+	return 0;
+} /* md_undefined_symbol() */
+
+/* Parse an operand that is machine-specific.
+   We just return without modifying the expression if we have nothing
+   to do. */
+
+/* ARGSUSED */
+void md_operand(expressionP)
+expressionS *expressionP;
+{
+} /* md_operand() */
+
+/* Round up a section size to the appropriate boundary. */
+long md_section_align (segment, size)
+segT segment;
+long size;
+{
+	return (size + 7) & ~7;	/* Round all sects to multiple of 8 */
+} /* md_section_align() */
+
+/* Exactly what point is a PC-relative offset relative TO?
+   On the sparc, they're relative to the address of the offset, plus
+   its size.  This gets us to the following instruction.
+   (??? Is this right?  FIXME-SOON) */
+long md_pcrel_from(fixP)
+fixS *fixP;
+{
+	return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
+} /* md_pcrel_from() */
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of tp-sparc.c */
diff --git a/gas/config/tc-sparc.h b/gas/config/tc-sparc.h
new file mode 100644
index 0000000..dd19fdb
--- /dev/null
+++ b/gas/config/tc-sparc.h
@@ -0,0 +1,42 @@
+/* tc-sparc.h - Macros and type defines for the sparc.
+   Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as
+published by the Free Software Foundation; either version 1,
+or (at your option) any later version.
+
+GAS is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public
+License along with GAS; see the file COPYING.  If not, write
+to the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
+
+/* $Id$ */
+
+#define TC_SPARC 1
+
+#ifdef OBJ_BOUT
+#define DEFAULT_MAGIC_NUMBER_FOR_OBJECT_FILE ((0x103 << 16) | BMAGIC)  /* Magic number for header */
+#else
+#ifdef OBJ_AOUT
+#define DEFAULT_MAGIC_NUMBER_FOR_OBJECT_FILE ((0x103 << 16) | OMAGIC)  /* Magic number for header */
+#endif /* OBJ_AOUT */
+#endif /* OBJ_BOUT */
+
+#define tc_headers_hook(a)		; /* don't need it. */
+#define tc_crawl_symbol_chain(a)	; /* don't need it. */
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of tp-sparc.h */
diff --git a/gas/config/tc-vax.c b/gas/config/tc-vax.c
new file mode 100644
index 0000000..11095c6
--- /dev/null
+++ b/gas/config/tc-vax.c
@@ -0,0 +1,3337 @@
+/* vax.c - vax-specific -
+   Copyright (C) 1987, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+/* JF I moved almost all the vax specific stuff into this one file 'cuz RMS
+   seems to think its a good idea.  I hope I managed to get all the VAX-isms */
+
+
+#include "as.h"
+
+#include "read.h"
+#include "flonum.h"
+#include "vax-inst.h"
+#include "obstack.h"		/* For FRAG_APPEND_1_CHAR macro in "frags.h" */
+#include "frags.h"
+#include "expr.h"
+#include "symbols.h"
+
+/* These chars start a comment anywhere in a source file (except inside
+   another comment */
+const char comment_chars[] = "#";
+
+/* These chars only start a comment at the beginning of a line. */
+/* Note that for the VAX the are the same as comment_chars above. */
+const char line_comment_chars[] = "#";
+
+/* Chars that can be used to separate mant from exp in floating point nums */
+const char EXP_CHARS[] = "eE";
+
+/* Chars that mean this number is a floating point constant */
+/* as in 0f123.456 */
+/* or    0H1.234E-12 (see exp chars above) */
+const char FLT_CHARS[] = "dDfFgGhH";
+
+/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
+   changed in read.c .  Ideally it shouldn't have to know about it at all,
+   but nothing is ideal around here.
+ */
+
+static expressionS		/* Hold details of an operand expression */
+ exp_of_operand[VIT_MAX_OPERANDS];
+
+static struct vit
+ v;				/* A vax instruction after decoding. */
+
+LITTLENUM_TYPE big_operand_bits[VIT_MAX_OPERANDS][SIZE_OF_LARGE_NUMBER];
+ /* Hold details of big operands. */
+FLONUM_TYPE float_operand[VIT_MAX_OPERANDS];
+ /* Above is made to point into */
+ /* big_operand_bits by md_begin(). */
+
+/*
+ * For VAX, relative addresses of "just the right length" are easy.
+ * The branch displacement is always the last operand, even in
+ * synthetic instructions.
+ * For VAX, we encode the relax_substateTs (in e.g. fr_substate) as:
+ *
+ *		    4       3       2       1       0	     bit number
+ *	---/ /--+-------+-------+-------+-------+-------+
+ *		|     what state ?	|  how long ?	|
+ *	---/ /--+-------+-------+-------+-------+-------+
+ *
+ * The "how long" bits are 00=byte, 01=word, 10=long.
+ * This is a Un*x convention.
+ * Not all lengths are legit for a given value of (what state).
+ * The "how long" refers merely to the displacement length.
+ * The address usually has some constant bytes in it as well.
+ *
+
+groups for VAX address relaxing.
+
+1.	"foo" pc-relative.
+	length of byte, word, long
+
+2a.	J<cond> where <cond> is a simple flag test.
+	length of byte, word, long.
+	VAX opcodes are:	(Hex)
+		bneq/bnequ	12
+		beql/beqlu	13
+		bgtr		14
+		bleq		15
+		bgeq		18
+		blss		19
+		bgtru		1a
+		blequ		1b
+		bvc		1c
+		bvs		1d
+		bgequ/bcc	1e
+		blssu/bcs	1f
+	Always, you complement 0th bit to reverse condition.
+	Always, 1-byte opcode, then 1-byte displacement.
+
+2b.	J<cond> where cond tests a memory bit.
+	length of byte, word, long.
+	Vax opcodes are:	(Hex)
+		bbs		e0
+		bbc		e1
+		bbss		e2
+		bbcs		e3
+		bbsc		e4
+		bbcc		e5
+		bbssi		e6
+		bbcci		e7
+	Always, you complement 0th bit to reverse condition.
+	Always, 1-byte opcde, longword-address, byte-address, 1-byte-displacement
+
+2c.	J<cond> where cond tests low-order memory bit
+	length of byte,word,long.
+	Vax opcodes are:	(Hex)
+		blbs		e8
+		blbc		e9
+	Always, you complement 0th bit to reverse condition.
+	Always, 1-byte opcode, longword-address, 1-byte displacement.
+
+3.	Jbs/Jbr.
+	length of byte,word,long.
+	Vax opcodes are:	(Hex)
+		bsbb		10
+		brb		11
+	These are like (2) but there is no condition to reverse.
+	Always, 1 byte opcode, then displacement/absolute.
+
+4a.	JacbX
+	length of word, long.
+	Vax opcodes are:	(Hex)
+		acbw		3d
+		acbf		4f
+		acbd		6f
+		abcb		9d
+		acbl		f1
+		acbg	      4ffd
+		acbh	      6ffd
+	Always, we cannot reverse the sense of the branch; we have a word
+	displacement.
+	The double-byte op-codes don't hurt: we never want to modify the
+	opcode, so we don't care how many bytes are between the opcode and
+	the operand.
+
+4b.	JXobXXX
+	length of long, long, byte.
+	Vax opcodes are:	(Hex)
+		aoblss		f2
+		aobleq		f3
+		sobgeq		f4
+		sobgtr		f5
+	Always, we cannot reverse the sense of the branch; we have a byte
+	displacement.
+
+The only time we need to modify the opcode is for class 2 instructions.
+After relax() we may complement the lowest order bit of such instruction
+to reverse sense of branch.
+
+For class 2 instructions, we store context of "where is the opcode literal".
+We can change an opcode's lowest order bit without breaking anything else.
+
+We sometimes store context in the operand literal. This way we can figure out
+after relax() what the original addressing mode was.
+*/
+
+ /* These displacements are relative to */
+ /* the start address of the displacement. */
+ /* The first letter is Byte, Word. */
+ /* 2nd letter is Forward, Backward. */
+#define BF (1+ 127)
+#define BB (1+-128)
+#define WF (2+ 32767)
+#define WB (2+-32768)
+ /* Dont need LF, LB because they always */
+ /* reach. [They are coded as 0.] */
+
+
+#define C(a,b) ENCODE_RELAX(a,b)
+ /* This macro has no side-effects. */
+#define ENCODE_RELAX(what,length) (((what) << 2) + (length))
+
+const relax_typeS
+md_relax_table[] =
+{
+  {
+    1, 1, 0, 0
+  },				/* error sentinel   0,0	*/
+  {
+    1, 1, 0, 0
+  },				/* unused	    0,1	*/
+  {
+    1, 1, 0, 0
+  },				/* unused	    0,2	*/
+  {
+    1, 1, 0, 0
+  },				/* unused	    0,3	*/
+  {
+    BF + 1, BB + 1, 2, C (1, 1)
+  },				/* B^"foo"	    1,0 */
+  {
+    WF + 1, WB + 1, 3, C (1, 2)
+  },				/* W^"foo"	    1,1 */
+  {
+    0, 0, 5, 0
+  },				/* L^"foo"	    1,2 */
+  {
+    1, 1, 0, 0
+  },				/* unused	    1,3 */
+  {
+    BF, BB, 1, C (2, 1)
+  },				/* b<cond> B^"foo"  2,0 */
+  {
+    WF + 2, WB + 2, 4, C (2, 2)
+  },				/* br.+? brw X	    2,1 */
+  {
+    0, 0, 7, 0
+  },				/* br.+? jmp X	    2,2 */
+  {
+    1, 1, 0, 0
+  },				/* unused	    2,3 */
+  {
+    BF, BB, 1, C (3, 1)
+  },				/* brb B^foo	    3,0 */
+  {
+    WF, WB, 2, C (3, 2)
+  },				/* brw W^foo	    3,1 */
+  {
+    0, 0, 5, 0
+  },				/* Jmp L^foo	    3,2 */
+  {
+    1, 1, 0, 0
+  },				/* unused	    3,3 */
+  {
+    1, 1, 0, 0
+  },				/* unused	    4,0 */
+  {
+    WF, WB, 2, C (4, 2)
+  },				/* acb_ ^Wfoo	    4,1 */
+  {
+    0, 0, 10, 0
+  },				/* acb_,br,jmp L^foo4,2 */
+  {
+    1, 1, 0, 0
+  },				/* unused	    4,3 */
+  {
+    BF, BB, 1, C (5, 1)
+  },				/* Xob___,,foo      5,0 */
+  {
+    WF + 4, WB + 4, 6, C (5, 2)
+  },				/* Xob.+2,brb.+3,brw5,1 */
+  {
+    0, 0, 9, 0
+  },				/* Xob.+2,brb.+6,jmp5,2 */
+};
+
+#undef C
+#undef BF
+#undef BB
+#undef WF
+#undef WB
+
+void float_cons ();
+
+const pseudo_typeS md_pseudo_table[] =
+{
+  {"dfloat", float_cons, 'd'},
+  {"ffloat", float_cons, 'f'},
+  {"gfloat", float_cons, 'g'},
+  {"hfloat", float_cons, 'h'},
+  {0}
+};
+
+#define STATE_PC_RELATIVE		(1)
+#define STATE_CONDITIONAL_BRANCH	(2)
+#define STATE_ALWAYS_BRANCH		(3)	/* includes BSB... */
+#define STATE_COMPLEX_BRANCH	        (4)
+#define STATE_COMPLEX_HOP		(5)
+
+#define STATE_BYTE			(0)
+#define STATE_WORD			(1)
+#define STATE_LONG			(2)
+#define STATE_UNDF			(3)	/* Symbol undefined in pass1 */
+
+
+#define min(a, b)	((a) < (b) ? (a) : (b))
+
+
+void
+md_begin ()
+{
+  char *vip_begin ();
+  char *errtxt;
+  FLONUM_TYPE *fP;
+  int i;
+
+  if (*(errtxt = vip_begin (TRUE, "$", "*", "`")))
+    {
+      as_fatal("VIP_BEGIN error:%s", errtxt);
+    }
+
+  for (i = 0, fP = float_operand;
+       fP < float_operand + VIT_MAX_OPERANDS;
+       i++, fP++)
+    {
+      fP->low = &big_operand_bits[i][0];
+      fP->high = &big_operand_bits[i][SIZE_OF_LARGE_NUMBER - 1];
+    }
+}
+
+void
+md_end ()
+{
+  vip_end ();
+}
+
+void				/* Knows about order of bytes in address. */
+md_number_to_chars (con, value, nbytes)
+     char con[];		/* Return 'nbytes' of chars here. */
+     long value;		/* The value of the bits. */
+     int nbytes;		/* Number of bytes in the output. */
+{
+  int n;
+  long v;
+
+  n = nbytes;
+  v = value;
+  while (nbytes--)
+    {
+      *con++ = value;		/* Lint wants & MASK_CHAR. */
+      value >>= BITS_PER_CHAR;
+    }
+  /* XXX line number probably botched for this warning message. */
+  if (value != 0 && value != -1)
+    as_bad("Displacement (%ld) long for instruction field length (%d).", v, n);
+}
+
+/* Fix up some data or instructions after we find out the value of a symbol
+   that they reference.  */
+
+void				/* Knows about order of bytes in address. */
+md_apply_fix(fixP, value)
+     fixS *fixP;		/* Fixup struct pointer */
+     long value;		/* The value of the bits. */
+{
+  char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
+  int nbytes;		/* Number of bytes in the output. */
+
+  nbytes = fixP->fx_size;
+  while (nbytes--)
+    {
+      *buf++ = value;		/* Lint wants & MASK_CHAR. */
+      value >>= BITS_PER_CHAR;
+    }
+}
+
+long			/* Knows about the byte order in a word. */
+md_chars_to_number (con, nbytes)
+     unsigned char con[];	/* Low order byte 1st. */
+     int nbytes;		/* Number of bytes in the input. */
+{
+  long retval;
+  for (retval = 0, con += nbytes - 1; nbytes--; con--)
+    {
+      retval <<= BITS_PER_CHAR;
+      retval |= *con;
+    }
+  return retval;
+}
+
+/* vax:md_assemble() emit frags for 1 instruction */
+
+void
+md_assemble (instruction_string)
+     char *instruction_string;	/* A string: assemble 1 instruction. */
+{
+  char *p;
+  register struct vop *operandP;/* An operand. Scans all operands. */
+  char *save_input_line_pointer;
+  char c_save;			/* What used to live after an expression. */
+  struct frag *fragP;		/* Fragment of code we just made. */
+  register int goofed;		/* TRUE: instruction_string bad for all passes. */
+  register struct vop *end_operandP;	/* -> slot just after last operand */
+  /* Limit of the for (each operand). */
+  register expressionS *expP;	/* -> expression values for this operand */
+
+  /* These refer to an instruction operand expression. */
+  segT to_seg;			/* Target segment of the address.	 */
+  register valueT this_add_number;
+  register struct symbol *this_add_symbol;	/* +ve (minuend) symbol. */
+  register struct symbol *this_subtract_symbol;	/* -ve(subtrahend) symbol. */
+
+  long opcode_as_number;	/* As a number. */
+  char *opcode_as_chars;	/* Least significant byte 1st. */
+  /* As an array of characters. */
+  char *opcode_low_byteP;	/* Least significant byte 1st */
+  struct details *detP;		/* The details of an ADxxx frag. */
+  int length;			/* length (bytes) meant by vop_short. */
+  int at;			/* 0, or 1 if '@' is in addressing mode. */
+  int nbytes;			/* From vop_nbytes: vax_operand_width (in bytes) */
+  FLONUM_TYPE *floatP;
+  char *vip ();
+  LITTLENUM_TYPE literal_float[8];
+  /* Big enough for any floating point literal. */
+
+  if (*(p = vip (&v, instruction_string)))
+    {
+      as_fatal("vax_assemble\"%s\" in=\"%s\"", p, instruction_string);
+    }
+  /*
+   * Now we try to find as many as_warn()s as we can. If we do any as_warn()s
+   * then goofed=TRUE. Notice that we don't make any frags yet.
+   * Should goofed be TRUE, then this instruction will wedge in any pass,
+   * and we can safely flush it, without causing interpass symbol phase
+   * errors. That is, without changing label values in different passes.
+   */
+  if (goofed = (*v.vit_error))
+    {
+      as_warn ("Ignoring statement due to \"%s\"", v.vit_error);
+    }
+  /*
+   * We need to use expression() and friends, which require us to diddle
+   * input_line_pointer. So we save it and restore it later.
+   */
+  save_input_line_pointer = input_line_pointer;
+  for (operandP = v.vit_operand,
+       expP = exp_of_operand,
+       floatP = float_operand,
+       end_operandP = v.vit_operand + v.vit_operands;
+
+       operandP < end_operandP;
+
+       operandP++,
+       expP++,
+       floatP++
+    )				/* for each operand */
+    {
+      if (*(operandP->vop_error))
+	{
+	  as_warn ("Ignoring statement because \"%s\"", (operandP->vop_error));
+	  goofed = TRUE;
+	}
+      else
+	{			/* statement has no syntax goofs: lets sniff the expression */
+	  int can_be_short;	/* TRUE if a bignum can be reduced to a short literal. */
+
+	  input_line_pointer = operandP->vop_expr_begin;
+	  c_save = operandP->vop_expr_end[1];
+	  operandP->vop_expr_end[1] = '\0';
+	  /* If to_seg == SEG_PASS1, expression() will have set need_pass_2 = TRUE. */
+	  switch (to_seg = expression (expP))
+	    {
+	    case SEG_ABSENT:
+	      /* for BSD4.2 compatibility, missing expression is absolute 0 */
+	      to_seg = expP->X_seg = SEG_ABSOLUTE;
+	      expP->X_add_number = 0;
+	      /* for SEG_ABSOLUTE, we shouldnt need to set X_subtract_symbol, X_add_symbol to any particular value. */
+	      /* But, we will program defensively. Since this situation occurs */
+	      /* rarely so it costs us little to do, and stops Dean */
+	      /* worrying about the origin of random bits in expressionS's. */
+	      expP->X_add_symbol = NULL;
+	      expP->X_subtract_symbol = NULL;
+	    case SEG_TEXT:
+	    case SEG_DATA:
+	    case SEG_BSS:
+	    case SEG_ABSOLUTE:
+	    case SEG_UNKNOWN:
+	      break;
+
+	    case SEG_DIFFERENCE:
+	    case SEG_PASS1:
+	      /*
+	       * Major bug. We can't handle the case of a
+	       * SEG_DIFFERENCE expression in a VIT_OPCODE_SYNTHETIC
+	       * variable-length instruction.
+	       * We don't have a frag type that is smart enough to
+	       * relax a SEG_DIFFERENCE, and so we just force all
+	       * SEG_DIFFERENCEs to behave like SEG_PASS1s.
+	       * Clearly, if there is a demand we can invent a new or
+	       * modified frag type and then coding up a frag for this
+	       * case will be easy. SEG_DIFFERENCE was invented for the
+	       * .words after a CASE opcode, and was never intended for
+	       * instruction operands.
+	       */
+	      need_pass_2 = TRUE;
+	      as_warn("Can't relocate expression");
+	      break;
+
+	    case SEG_BIG:
+	      /* Preserve the bits. */
+	      if (expP->X_add_number > 0)
+		{
+		  bignum_copy (generic_bignum, expP->X_add_number,
+			       floatP->low, SIZE_OF_LARGE_NUMBER);
+		}
+	      else
+		{
+		  know (expP->X_add_number < 0);
+		  flonum_copy (&generic_floating_point_number,
+			       floatP);
+		  if (strchr ("s i", operandP->vop_short))
+		    {		/* Could possibly become S^# */
+		      flonum_gen2vax (-expP->X_add_number, floatP, literal_float);
+		      switch (-expP->X_add_number)
+			{
+			case 'f':
+			  can_be_short =
+			    (literal_float[0] & 0xFC0F) == 0x4000
+			    && literal_float[1] == 0;
+			  break;
+
+			case 'd':
+			  can_be_short =
+			    (literal_float[0] & 0xFC0F) == 0x4000
+			    && literal_float[1] == 0
+			    && literal_float[2] == 0
+			    && literal_float[3] == 0;
+			  break;
+
+			case 'g':
+			  can_be_short =
+			    (literal_float[0] & 0xFF81) == 0x4000
+			    && literal_float[1] == 0
+			    && literal_float[2] == 0
+			    && literal_float[3] == 0;
+			  break;
+
+			case 'h':
+			  can_be_short =
+			    (literal_float[0] & 0xFFF8) == 0x4000
+			    && (literal_float[1] & 0xE000) == 0
+			    && literal_float[2] == 0
+			    && literal_float[3] == 0
+			    && literal_float[4] == 0
+			    && literal_float[5] == 0
+			    && literal_float[6] == 0
+			    && literal_float[7] == 0;
+			  break;
+
+			default:
+			  BAD_CASE (-expP->X_add_number);
+			  break;
+			}	/* switch (float type) */
+		    }		/* if (could want to become S^#...) */
+		}		/* bignum or flonum ? */
+
+	      if (operandP->vop_short == 's'
+		  || operandP->vop_short == 'i'
+		  || (operandP->vop_short == ' '
+		      && operandP->vop_reg == 0xF
+		      && (operandP->vop_mode & 0xE) == 0x8))
+		{
+		  /* Saw a '#'. */
+		  if (operandP->vop_short == ' ')
+		    {		/* We must chose S^ or I^. */
+		      if (expP->X_add_number > 0)
+			{	/* Bignum: Short literal impossible. */
+			  operandP->vop_short = 'i';
+			  operandP->vop_mode = 8;
+			  operandP->vop_reg = 0xF;	/* VAX PC. */
+			}
+		      else
+			{	/* Flonum: Try to do it. */
+			  if (can_be_short)
+			    {
+			      operandP->vop_short = 's';
+			      operandP->vop_mode = 0;
+			      operandP->vop_ndx = -1;
+			      operandP->vop_reg = -1;
+			      /* JF hope this is the right thing */
+			      expP->X_seg = SEG_ABSOLUTE;
+			    }
+			  else
+			    {
+			      operandP->vop_short = 'i';
+			      operandP->vop_mode = 8;
+			      operandP->vop_reg = 0xF;	/* VAX PC */
+			    }
+			}	/* bignum or flonum ? */
+		    }		/*  if #, but no S^ or I^ seen. */
+		  /* No more ' ' case: either 's' or 'i'. */
+		  if (operandP->vop_short == 's')
+		    {
+		      /* Wants to be a short literal. */
+		      if (expP->X_add_number > 0)
+			{
+			  as_warn ("Bignum not permitted in short literal. Immediate mode assumed.");
+			  operandP->vop_short = 'i';
+			  operandP->vop_mode = 8;
+			  operandP->vop_reg = 0xF;	/* VAX PC. */
+			}
+		      else
+			{
+			  if (!can_be_short)
+			    {
+			      as_warn ("Can't do flonum short literal: immediate mode used.");
+			      operandP->vop_short = 'i';
+			      operandP->vop_mode = 8;
+			      operandP->vop_reg = 0xF;	/* VAX PC. */
+			    }
+			  else
+			    {	/* Encode short literal now. */
+			      register int temp;
+
+			      switch (-expP->X_add_number)
+				{
+				case 'f':
+				case 'd':
+				  temp = literal_float[0] >> 4;
+				  break;
+
+				case 'g':
+				  temp = literal_float[0] >> 1;
+				  break;
+
+				case 'h':
+				  temp = ((literal_float[0] << 3) & 070)
+				    | ((literal_float[1] >> 13) & 07);
+				  break;
+
+				default:
+				  BAD_CASE (-expP->X_add_number);
+				  break;
+				}
+
+			      floatP->low[0] = temp & 077;
+			      floatP->low[1] = 0;
+			    }	/* if can be short literal float */
+			}	/* flonum or bignum ? */
+		    }
+		  else
+		    {		/* I^# seen: set it up if float. */
+		      if (expP->X_add_number < 0)
+			{
+			  bcopy (literal_float, floatP->low, sizeof (literal_float));
+			}
+		    }		/* if S^# seen. */
+		}
+	      else
+		{
+		  as_warn ("A bignum/flonum may not be a displacement: 0x%x used",
+			   expP->X_add_number = 0x80000000);
+		  /* Chosen so luser gets the most offset bits to patch later. */
+		}
+	      expP->X_add_number = floatP->low[0]
+		| ((LITTLENUM_MASK & (floatP->low[1])) << LITTLENUM_NUMBER_OF_BITS);
+/*
+ * For the SEG_BIG case we have:
+ * If vop_short == 's' then a short floating literal is in the
+ *	lowest 6 bits of floatP -> low [0], which is
+ *	big_operand_bits [---] [0].
+ * If vop_short == 'i' then the appropriate number of elements
+ *	of big_operand_bits [---] [...] are set up with the correct
+ *	bits.
+ * Also, just in case width is byte word or long, we copy the lowest
+ * 32 bits of the number to X_add_number.
+ */
+	      break;
+
+	    default:
+	      BAD_CASE (to_seg);
+	      break;
+	    }
+	  if (input_line_pointer != operandP->vop_expr_end + 1)
+	    {
+	      as_warn ("Junk at end of expression \"%s\"", input_line_pointer);
+	      goofed = TRUE;
+	    }
+	  operandP->vop_expr_end[1] = c_save;
+	}
+    }				/* for(each operand) */
+  input_line_pointer = save_input_line_pointer;
+
+  if (!need_pass_2 && !goofed)
+    {
+      /* We saw no errors in any operands - try to make frag(s) */
+      int is_undefined;		/* True if operand expression's */
+      /* segment not known yet. */
+      int length_code;
+
+      /* Emit op-code. */
+      /* Remember where it is, in case we want to modify the op-code later. */
+      opcode_low_byteP = frag_more (v.vit_opcode_nbytes);
+      bcopy (v.vit_opcode, opcode_low_byteP, v.vit_opcode_nbytes);
+      opcode_as_number = md_chars_to_number (opcode_as_chars = v.vit_opcode, 4);
+      for (operandP = v.vit_operand,
+	   expP = exp_of_operand,
+	   floatP = float_operand,
+	   end_operandP = v.vit_operand + v.vit_operands;
+
+	   operandP < end_operandP;
+
+	   operandP++,
+	   floatP++,
+	   expP++
+	)			/* for each operand */
+	{
+	  if (operandP->vop_ndx >= 0)
+	    {
+	      /* indexed addressing byte */
+	      /* Legality of indexed mode already checked: it is OK */
+	      FRAG_APPEND_1_CHAR (0x40 + operandP->vop_ndx);
+	    }			/* if(vop_ndx>=0) */
+
+	  /* Here to make main operand frag(s). */
+	  this_add_number = expP->X_add_number;
+	  this_add_symbol = expP->X_add_symbol;
+	  this_subtract_symbol = expP->X_subtract_symbol;
+	  to_seg = expP->X_seg;
+	  is_undefined = (to_seg == SEG_UNKNOWN);
+	  know (to_seg == SEG_UNKNOWN
+		||to_seg == SEG_ABSOLUTE
+		||to_seg == SEG_DATA
+		||to_seg == SEG_TEXT
+		||to_seg == SEG_BSS
+		||to_seg == SEG_BIG
+	    );
+	  at = operandP->vop_mode & 1;
+	  length = operandP->vop_short == 'b' ? 1 : operandP->vop_short == 'w' ? 2 : operandP->vop_short == 'l' ? 4 : 0;
+	  nbytes = operandP->vop_nbytes;
+	  if (operandP->vop_access == 'b')
+	    {
+	      if (to_seg == now_seg || is_undefined)
+		{		/* If is_undefined, then it might BECOME now_seg. */
+		  if (nbytes)
+		    {
+		      p = frag_more (nbytes);
+		      fix_new (frag_now, p - frag_now->fr_literal, nbytes,
+			       this_add_symbol, 0, this_add_number, 1);
+		    }
+		  else
+		    {		/* to_seg==now_seg || to_seg == SEG_UNKNOWN */
+		      /* nbytes==0 */
+		      length_code = is_undefined ? STATE_UNDF : STATE_BYTE;
+		      if (opcode_as_number & VIT_OPCODE_SPECIAL)
+			{
+			  if (operandP->vop_width == VAX_WIDTH_UNCONDITIONAL_JUMP)
+			    {
+			      /* br or jsb */
+			      frag_var (rs_machine_dependent, 5, 1,
+					ENCODE_RELAX (STATE_ALWAYS_BRANCH, length_code),
+					this_add_symbol, this_add_number,
+					opcode_low_byteP);
+			    }
+			  else
+			    {
+			      if (operandP->vop_width == VAX_WIDTH_WORD_JUMP)
+				{
+				  length_code = STATE_WORD;	/* JF: There is no state_byte for this one! */
+				  frag_var (rs_machine_dependent, 10, 2,
+					    ENCODE_RELAX (STATE_COMPLEX_BRANCH, length_code),
+					    this_add_symbol, this_add_number,
+					    opcode_low_byteP);
+				}
+			      else
+				{
+				  know (operandP->vop_width == VAX_WIDTH_BYTE_JUMP);
+				  frag_var (rs_machine_dependent, 9, 1,
+					    ENCODE_RELAX (STATE_COMPLEX_HOP, length_code),
+					    this_add_symbol, this_add_number,
+					    opcode_low_byteP);
+				}
+			    }
+			}
+		      else
+			{
+			  know (operandP->vop_width == VAX_WIDTH_CONDITIONAL_JUMP);
+			  frag_var (rs_machine_dependent, 7, 1,
+				    ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, length_code),
+				    this_add_symbol, this_add_number,
+				    opcode_low_byteP);
+			}
+		    }
+		}
+	      else
+		{		/* to_seg != now_seg && to_seg != SEG_UNKNOWN */
+/*
+ * --- SEG FLOAT MAY APPEAR HERE ----
+ */
+		  if (to_seg == SEG_ABSOLUTE)
+		    {
+		      if (nbytes)
+			{
+			  know (!(opcode_as_number & VIT_OPCODE_SYNTHETIC));
+			  p = frag_more (nbytes);
+			  /* Conventional relocation. */
+			  fix_new (frag_now, p - frag_now->fr_literal,
+				nbytes, &abs_symbol, 0, this_add_number, 1);
+			}
+		      else
+			{
+			  know (opcode_as_number & VIT_OPCODE_SYNTHETIC);
+			  if (opcode_as_number & VIT_OPCODE_SPECIAL)
+			    {
+			      if (operandP->vop_width == VAX_WIDTH_UNCONDITIONAL_JUMP)
+				{
+				  /* br or jsb */
+				  *opcode_low_byteP = opcode_as_chars[0] + VAX_WIDEN_LONG;
+				  know (opcode_as_chars[1] == 0);
+				  p = frag_more (5);
+				  p[0] = VAX_ABSOLUTE_MODE;	/* @#... */
+				  md_number_to_chars (p + 1, this_add_number, 4);
+				  /* Now (eg) JMP @#foo or JSB @#foo. */
+				}
+			      else
+				{
+				  if (operandP->vop_width == VAX_WIDTH_WORD_JUMP)
+				    {
+				      p = frag_more (10);
+				      p[0] = 2;
+				      p[1] = 0;
+				      p[2] = VAX_BRB;
+				      p[3] = 6;
+				      p[4] = VAX_JMP;
+				      p[5] = VAX_ABSOLUTE_MODE;	/* @#... */
+				      md_number_to_chars (p + 6, this_add_number, 4);
+				      /*
+				       * Now (eg)	ACBx	1f
+				       *		BRB	2f
+				       *	1:	JMP	@#foo
+				       *	2:
+				       */
+				    }
+				  else
+				    {
+				      know (operandP->vop_width == VAX_WIDTH_BYTE_JUMP);
+				      p = frag_more (9);
+				      p[0] = 2;
+				      p[1] = VAX_BRB;
+				      p[2] = 6;
+				      p[3] = VAX_JMP;
+				      p[4] = VAX_PC_RELATIVE_MODE + 1;	/* @#... */
+				      md_number_to_chars (p + 5, this_add_number, 4);
+				      /*
+				       * Now (eg)	xOBxxx	1f
+				       *		BRB	2f
+				       *	1:	JMP	@#foo
+				       *	2:
+				       */
+				    }
+				}
+			    }
+			  else
+			    {
+			      /* b<cond> */
+			      *opcode_low_byteP ^= 1;	/* To reverse the condition in a VAX branch, complement the lowest order bit. */
+			      p = frag_more (7);
+			      p[0] = 6;
+			      p[1] = VAX_JMP;
+			      p[2] = VAX_ABSOLUTE_MODE;	/* @#... */
+			      md_number_to_chars (p + 3, this_add_number, 4);
+			      /*
+			       * Now (eg)	BLEQ	1f
+			       *		JMP	@#foo
+			       *	1:
+			       */
+			    }
+			}
+		    }
+		  else
+		    {		/* to_seg != now_seg && to_seg != SEG_UNKNOWN && to_Seg != SEG_ABSOLUTE */
+		      if (nbytes > 0)
+			{
+			  /* Pc-relative. Conventional relocation. */
+			  know (!(opcode_as_number & VIT_OPCODE_SYNTHETIC));
+			  p = frag_more (nbytes);
+			  fix_new (frag_now, p - frag_now->fr_literal,
+				nbytes, &abs_symbol, 0, this_add_number, 1);
+			}
+		      else
+			{
+			  know (opcode_as_number & VIT_OPCODE_SYNTHETIC);
+			  if (opcode_as_number & VIT_OPCODE_SPECIAL)
+			    {
+			      if (operandP->vop_width == VAX_WIDTH_UNCONDITIONAL_JUMP)
+				{
+				  /* br or jsb */
+				  know (opcode_as_chars[1] == 0);
+				  *opcode_low_byteP = opcode_as_chars[0] + VAX_WIDEN_LONG;
+				  p = frag_more (5);
+				  p[0] = VAX_PC_RELATIVE_MODE;
+				  fix_new (frag_now,
+					   p + 1 - frag_now->fr_literal, 4,
+					   this_add_symbol, 0,
+					   this_add_number, 1);
+				  /* Now eg JMP foo or JSB foo. */
+				}
+			      else
+				{
+				  if (operandP->vop_width == VAX_WIDTH_WORD_JUMP)
+				    {
+				      p = frag_more (10);
+				      p[0] = 0;
+				      p[1] = 2;
+				      p[2] = VAX_BRB;
+				      p[3] = 6;
+				      p[4] = VAX_JMP;
+				      p[5] = VAX_PC_RELATIVE_MODE;
+				      fix_new (frag_now,
+					    p + 6 - frag_now->fr_literal, 4,
+					       this_add_symbol, 0,
+					       this_add_number, 1);
+				      /*
+				       * Now (eg)	ACBx	1f
+				       *		BRB	2f
+				       *	1:	JMP	foo
+				       *	2:
+				       */
+				    }
+				  else
+				    {
+				      know (operandP->vop_width == VAX_WIDTH_BYTE_JUMP);
+				      p = frag_more (10);
+				      p[0] = 2;
+				      p[1] = VAX_BRB;
+				      p[2] = 6;
+				      p[3] = VAX_JMP;
+				      p[4] = VAX_PC_RELATIVE_MODE;
+				      fix_new (frag_now,
+					       p + 5 - frag_now->fr_literal,
+					       4, this_add_symbol, 0,
+					       this_add_number, 1);
+				      /*
+				       * Now (eg)	xOBxxx	1f
+				       *		BRB	2f
+				       *	1:	JMP	foo
+				       *	2:
+				       */
+				    }
+				}
+			    }
+			  else
+			    {
+			      know (operandP->vop_width == VAX_WIDTH_CONDITIONAL_JUMP);
+			      *opcode_low_byteP ^= 1;	/* Reverse branch condition. */
+			      p = frag_more (7);
+			      p[0] = 6;
+			      p[1] = VAX_JMP;
+			      p[2] = VAX_PC_RELATIVE_MODE;
+			      fix_new (frag_now, p + 3 - frag_now->fr_literal,
+				       4, this_add_symbol, 0,
+				       this_add_number, 1);
+			    }
+			}
+		    }
+		}
+	    }
+	  else
+	    {
+	      know (operandP->vop_access != 'b');	/* So it is ordinary operand. */
+	      know (operandP->vop_access != ' ');	/* ' ' target-independent: elsewhere. */
+	      know (operandP->vop_access == 'a' || operandP->vop_access == 'm' || operandP->vop_access == 'r' || operandP->vop_access == 'v' || operandP->vop_access == 'w');
+	      if (operandP->vop_short == 's')
+		{
+		  if (to_seg == SEG_ABSOLUTE)
+		    {
+		      if (this_add_number < 0 || this_add_number >= 64)
+			{
+			  as_warn ("Short literal overflow(%d.), immediate mode assumed.", this_add_number);
+			  operandP->vop_short = 'i';
+			  operandP->vop_mode = 8;
+			  operandP->vop_reg = 0xF;
+			}
+		    }
+		  else
+		    {
+		      as_warn ("Forced short literal to immediate mode. now_seg=%s to_seg=%s", segment_name(now_seg), segment_name(to_seg));
+		      operandP->vop_short = 'i';
+		      operandP->vop_mode = 8;
+		      operandP->vop_reg = 0xF;
+		    }
+		}
+	      if (operandP->vop_reg >= 0 && (operandP->vop_mode < 8 || (operandP->vop_reg != 0xF && operandP->vop_mode < 10)))
+		{		/* One byte operand. */
+		  know (operandP->vop_mode > 3);
+		  FRAG_APPEND_1_CHAR (operandP->vop_mode << 4 | operandP->vop_reg);
+		  /* All 1-bytes except S^# happen here. */
+		}
+	      else
+		{		/* {@}{q^}foo{(Rn)} or S^#foo */
+		  if (operandP->vop_reg == -1 && operandP->vop_short != 's')
+		    {		/* "{@}{q^}foo" */
+		      if (to_seg == now_seg)
+			{
+			  if (length == 0)
+			    {
+			      know (operandP->vop_short == ' ');
+			      p = frag_var (rs_machine_dependent, 10, 2,
+			       ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE),
+					    this_add_symbol, this_add_number,
+					    opcode_low_byteP);
+			      know (operandP->vop_mode == 10 + at);
+			      *p = at << 4;
+			      /* At is the only context we need to carry to */
+			      /* other side of relax() process. */
+			      /* Must be in the correct bit position of VAX */
+			      /* operand spec. byte. */
+			    }
+			  else
+			    {
+			      know (length);
+			      know (operandP->vop_short != ' ');
+			      p = frag_more (length + 1);
+			      /* JF is this array stuff really going to work? */
+			      p[0] = 0xF | ((at + "?\12\14?\16"[length]) << 4);
+			      fix_new (frag_now, p + 1 - frag_now->fr_literal,
+				       length, this_add_symbol, 0,
+				       this_add_number, 1);
+			    }
+			}
+		      else
+			{	/* to_seg != now_seg */
+			  if (this_add_symbol == NULL)
+			    {
+			      know (to_seg == SEG_ABSOLUTE);
+			      /* Do @#foo: simpler relocation than foo-.(pc) anyway. */
+			      p = frag_more (5);
+			      p[0] = VAX_ABSOLUTE_MODE;	/* @#... */
+			      md_number_to_chars (p + 1, this_add_number, 4);
+			      if (length && length != 4)
+				{
+				  as_warn ("Length specification ignored. Address mode 9F used");
+				}
+			    }
+			  else
+			    {
+			      /* {@}{q^}other_seg */
+			      know ((length == 0 && operandP->vop_short == ' ')
+			          ||(length > 0 && operandP->vop_short != ' '));
+			      if (is_undefined)
+				{
+				  /*
+				   * We have a SEG_UNKNOWN symbol. It might
+				   * turn out to be in the same segment as
+				   * the instruction, permitting relaxation.
+				   */
+				  p = frag_var (rs_machine_dependent, 5, 2,
+						ENCODE_RELAX (STATE_PC_RELATIVE, STATE_UNDF),
+					   this_add_symbol, this_add_number,
+						0);
+				  p[0] = at << 4;
+				}
+			      else
+				{
+				  if (length == 0)
+				    {
+				      know (operandP->vop_short == ' ');
+				      length = 4;	/* Longest possible. */
+				    }
+				  p = frag_more (length + 1);
+				  p[0] = 0xF | ((at + "?\12\14?\16"[length]) << 4);
+				  md_number_to_chars (p + 1, this_add_number, length);
+				  fix_new (frag_now,
+					   p + 1 - frag_now->fr_literal,
+					   length, this_add_symbol, 0,
+					   this_add_number, 1);
+				}
+			    }
+			}
+		    }
+		  else
+		    {		/* {@}{q^}foo(Rn) or S^# or I^# or # */
+		      if (operandP->vop_mode < 0xA)
+			{	/* # or S^# or I^# */
+			  /* know(   (length == 0 && operandP->vop_short == ' ')
+			       || (length >  0 && operandP->vop_short != ' ')); */
+			  if (length == 0
+			      && to_seg == SEG_ABSOLUTE
+			      && operandP->vop_mode == 8	/* No '@'. */
+			      && this_add_number < 64
+			      && this_add_number >= 0)
+			    {
+			      operandP->vop_short = 's';
+			    }
+			  if (operandP->vop_short == 's')
+			    {
+			      FRAG_APPEND_1_CHAR (this_add_number);
+			    }
+			  else
+			    {	/* I^#... */
+			      know (nbytes);
+			      p = frag_more (nbytes + 1);
+			      know (operandP->vop_reg == 0xF);
+			      p[0] = (operandP->vop_mode << 4) | 0xF;
+			      if (to_seg == SEG_ABSOLUTE)
+				{
+/*
+ * If nbytes > 4, then we are scrod. We don't know if the
+ * high order bytes are to be 0xFF or 0x00.
+ * BSD4.2 & RMS say use 0x00. OK --- but this
+ * assembler needs ANOTHER rewrite to
+ * cope properly with this bug.
+ */
+				  md_number_to_chars (p + 1, this_add_number, min (4, nbytes));
+				  if (nbytes > 4)
+				    {
+				      bzero (p + 5, nbytes - 4);
+				    }
+				}
+			      else
+				{
+				  if (to_seg == SEG_BIG)
+				    {
+/*
+ * Problem here is to get the bytes in the right order.
+ * We stored our constant as LITTLENUMs, not bytes.
+ */
+				      LITTLENUM_TYPE *lP;
+
+				      lP = floatP->low;
+				      if (nbytes & 1)
+					{
+					  know (nbytes == 1);
+					  p[1] = *lP;
+					}
+				      else
+					{
+					  for (p++; nbytes; nbytes -= 2, p += 2, lP++)
+					    {
+					      md_number_to_chars (p, *lP, 2);
+					    }
+					}
+				    }
+				  else
+				    {
+				      fix_new (frag_now, p + 1 - frag_now->fr_literal,
+					       nbytes, this_add_symbol, 0,
+					       this_add_number, 0);
+				    }
+				}
+			    }
+			}
+		      else
+			{	/* {@}{q^}foo(Rn) */
+			  know ((length == 0 && operandP->vop_short == ' ')
+			      ||(length > 0 && operandP->vop_short != ' '));
+			  if (length == 0)
+			    {
+			      if (to_seg == SEG_ABSOLUTE)
+				{
+				  register long test;
+
+				  test = this_add_number;
+
+				  if (test < 0)
+				    test = ~test;
+
+				  length = test & 0xffff8000 ? 4
+				    : test & 0xffffff80 ? 2
+				    : 1;
+				}
+			      else
+				{
+				  length = 4;
+				}
+			    }
+			  p = frag_more (1 + length);
+			  know (operandP->vop_reg >= 0);
+			  p[0] = operandP->vop_reg
+			    | ((at | "?\12\14?\16"[length]) << 4);
+			  if (to_seg == SEG_ABSOLUTE)
+			    {
+			      md_number_to_chars (p + 1, this_add_number, length);
+			    }
+			  else
+			    {
+			      fix_new (frag_now, p + 1 - frag_now->fr_literal,
+				       length, this_add_symbol, 0,
+				       this_add_number, 0);
+			    }
+			}
+		    }
+		}		/* if(single-byte-operand) */
+	    }
+	}			/* for(operandP) */
+    }				/* if(!need_pass_2&&!goofed) */
+}				/* vax_assemble() */
+
+/*
+ *			md_estimate_size_before_relax()
+ *
+ * Called just before relax().
+ * Any symbol that is now undefined will not become defined.
+ * Return the correct fr_subtype in the frag.
+ * Return the initial "guess for fr_var" to caller.
+ * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
+ * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
+ * Although it may not be explicit in the frag, pretend fr_var starts with a
+ * 0 value.
+ */
+int
+md_estimate_size_before_relax (fragP, segment)
+     register fragS *fragP;
+     register segT segment;
+{
+  register char *p;
+  register int old_fr_fix;
+
+  old_fr_fix = fragP->fr_fix;
+  switch (fragP->fr_subtype)
+    {
+    case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_UNDF):
+      if (S_GET_SEGMENT(fragP->fr_symbol) == segment)
+	{			/* A relaxable case. */
+	  fragP->fr_subtype = ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE);
+	}
+      else
+	{
+	  p = fragP->fr_literal + old_fr_fix;
+	  p[0] |= VAX_PC_RELATIVE_MODE;	/* Preserve @ bit. */
+	  fragP->fr_fix += 1 + 4;
+	  fix_new (fragP, old_fr_fix + 1, 4, fragP->fr_symbol, 0,
+		   fragP->fr_offset, 1);
+	  frag_wane (fragP);
+	}
+      break;
+
+    case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF):
+      if (S_GET_SEGMENT(fragP->fr_symbol) == segment)
+	{
+	  fragP->fr_subtype = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE);
+	}
+      else
+	{
+	  p = fragP->fr_literal + old_fr_fix;
+	  *fragP->fr_opcode ^= 1;	/* Reverse sense of branch. */
+	  p[0] = 6;
+	  p[1] = VAX_JMP;
+	  p[2] = VAX_PC_RELATIVE_MODE;	/* ...(PC) */
+	  fragP->fr_fix += 1 + 1 + 1 + 4;
+	  fix_new (fragP, old_fr_fix + 3, 4, fragP->fr_symbol, 0,
+		   fragP->fr_offset, 1);
+	  frag_wane (fragP);
+	}
+      break;
+
+    case ENCODE_RELAX (STATE_COMPLEX_BRANCH, STATE_UNDF):
+      if (S_GET_SEGMENT(fragP->fr_symbol) == segment)
+	{
+	  fragP->fr_subtype = ENCODE_RELAX (STATE_COMPLEX_BRANCH, STATE_WORD);
+	}
+      else
+	{
+	  p = fragP->fr_literal + old_fr_fix;
+	  p[0] = 2;
+	  p[1] = 0;
+	  p[2] = VAX_BRB;
+	  p[3] = 6;
+	  p[4] = VAX_JMP;
+	  p[5] = VAX_PC_RELATIVE_MODE;	/* ...(pc) */
+	  fragP->fr_fix += 2 + 2 + 1 + 1 + 4;
+	  fix_new (fragP, old_fr_fix + 6, 4, fragP->fr_symbol, 0,
+		   fragP->fr_offset, 1);
+	  frag_wane (fragP);
+	}
+      break;
+
+    case ENCODE_RELAX (STATE_COMPLEX_HOP, STATE_UNDF):
+      if (S_GET_SEGMENT(fragP->fr_symbol) == segment)
+	{
+	  fragP->fr_subtype = ENCODE_RELAX (STATE_COMPLEX_HOP, STATE_BYTE);
+	}
+      else
+	{
+	  p = fragP->fr_literal + old_fr_fix;
+	  p[0] = 2;
+	  p[1] = VAX_BRB;
+	  p[2] = 6;
+	  p[3] = VAX_JMP;
+	  p[4] = VAX_PC_RELATIVE_MODE;	/* ...(pc) */
+	  fragP->fr_fix += 1 + 2 + 1 + 1 + 4;
+	  fix_new (fragP, old_fr_fix + 5, 4, fragP->fr_symbol, 0,
+		   fragP->fr_offset, 1);
+	  frag_wane (fragP);
+	}
+      break;
+
+    case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_UNDF):
+      if (S_GET_SEGMENT(fragP->fr_symbol) == segment)
+	{
+	  fragP->fr_subtype = ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_BYTE);
+	}
+      else
+	{
+	  p = fragP->fr_literal + old_fr_fix;
+	  *fragP->fr_opcode += VAX_WIDEN_LONG;
+	  p[0] = VAX_PC_RELATIVE_MODE;	/* ...(PC) */
+	  fragP->fr_fix += 1 + 4;
+	  fix_new (fragP, old_fr_fix + 1, 4, fragP->fr_symbol, 0,
+		   fragP->fr_offset, 1);
+	  frag_wane (fragP);
+	}
+      break;
+
+    default:
+      break;
+    }
+  return (fragP->fr_var + fragP->fr_fix - old_fr_fix);
+}				/* md_estimate_size_before_relax() */
+
+/*
+ *			md_convert_frag();
+ *
+ * Called after relax() is finished.
+ * In:	Address of frag.
+ *	fr_type == rs_machine_dependent.
+ *	fr_subtype is what the address relaxed to.
+ *
+ * Out:	Any fixSs and constants are set up.
+ *	Caller will turn frag into a ".space 0".
+ */
+void
+md_convert_frag (fragP)
+     register fragS *fragP;
+{
+  register char *addressP;	/* -> _var to change. */
+  register char *opcodeP;	/* -> opcode char(s) to change. */
+  register short int length_code;	/* 2=long 1=word 0=byte */
+  register short int extension;	/* Size of relaxed address. */
+  /* Added to fr_fix: incl. ALL var chars. */
+  register symbolS *symbolP;
+  register long where;
+  register long address_of_var;
+  /* Where, in file space, is _var of *fragP? */
+  register long target_address;
+  /* Where, in file space, does addr point? */
+
+  know (fragP->fr_type == rs_machine_dependent);
+  length_code = fragP->fr_subtype & 3;	/* depends on ENCODE_RELAX() */
+  know (length_code >= 0 && length_code < 3);
+  where = fragP->fr_fix;
+  addressP = fragP->fr_literal + where;
+  opcodeP = fragP->fr_opcode;
+  symbolP = fragP->fr_symbol;
+  know (symbolP);
+  target_address = symbolP->sy_value + fragP->fr_offset;
+  address_of_var = fragP->fr_address + where;
+  switch (fragP->fr_subtype)
+    {
+    case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE):
+      know (*addressP == 0 || *addressP == 0x10);	/* '@' bit. */
+      addressP[0] |= 0xAF;	/* Byte displacement. */
+      addressP[1] = target_address - (address_of_var + 2);
+      extension = 2;
+      break;
+
+    case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_WORD):
+      know (*addressP == 0 || *addressP == 0x10);	/* '@' bit. */
+      addressP[0] |= 0xCF;	/* Word displacement. */
+      md_number_to_chars (addressP + 1, target_address - (address_of_var + 3), 2);
+      extension = 3;
+      break;
+
+    case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_LONG):
+      know (*addressP == 0 || *addressP == 0x10);	/* '@' bit. */
+      addressP[0] |= 0xEF;	/* Long word displacement. */
+      md_number_to_chars (addressP + 1, target_address - (address_of_var + 5), 4);
+      extension = 5;
+      break;
+
+    case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
+      addressP[0] = target_address - (address_of_var + 1);
+      extension = 1;
+      break;
+
+    case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
+      opcodeP[0] ^= 1;		/* Reverse sense of test. */
+      addressP[0] = 3;
+      addressP[1] = VAX_BRB + VAX_WIDEN_WORD;
+      md_number_to_chars (addressP + 2, target_address - (address_of_var + 4), 2);
+      extension = 4;
+      break;
+
+    case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_LONG):
+      opcodeP[0] ^= 1;		/* Reverse sense of test. */
+      addressP[0] = 6;
+      addressP[1] = VAX_JMP;
+      addressP[2] = VAX_PC_RELATIVE_MODE;
+      md_number_to_chars (addressP + 3, target_address, 4);
+      extension = 7;
+      break;
+
+    case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_BYTE):
+      addressP[0] = target_address - (address_of_var + 1);
+      extension = 1;
+      break;
+
+    case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_WORD):
+      opcodeP[0] += VAX_WIDEN_WORD;	/* brb -> brw, bsbb -> bsbw */
+      md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
+      extension = 2;
+      break;
+
+    case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_LONG):
+      opcodeP[0] += VAX_WIDEN_LONG;	/* brb -> jmp, bsbb -> jsb */
+      addressP[0] = VAX_PC_RELATIVE_MODE;
+      md_number_to_chars (addressP + 1, target_address - (address_of_var + 5), 4);
+      extension = 5;
+      break;
+
+    case ENCODE_RELAX (STATE_COMPLEX_BRANCH, STATE_WORD):
+      md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
+      extension = 2;
+      break;
+
+    case ENCODE_RELAX (STATE_COMPLEX_BRANCH, STATE_LONG):
+      addressP[0] = 2;
+      addressP[1] = 0;
+      addressP[2] = VAX_BRB;
+      addressP[3] = 6;
+      addressP[4] = VAX_JMP;
+      addressP[5] = VAX_PC_RELATIVE_MODE;
+      md_number_to_chars (addressP + 6, target_address, 4);
+      extension = 10;
+      break;
+
+    case ENCODE_RELAX (STATE_COMPLEX_HOP, STATE_BYTE):
+      addressP[0] = target_address - (address_of_var + 1);
+      extension = 1;
+      break;
+
+    case ENCODE_RELAX (STATE_COMPLEX_HOP, STATE_WORD):
+      addressP[0] = 2;
+      addressP[1] = VAX_BRB;
+      addressP[2] = 3;
+      addressP[3] = VAX_BRW;
+      md_number_to_chars (addressP + 4, target_address - (address_of_var + 6), 2);
+      extension = 6;
+      break;
+
+    case ENCODE_RELAX (STATE_COMPLEX_HOP, STATE_LONG):
+      addressP[0] = 2;
+      addressP[1] = VAX_BRB;
+      addressP[2] = 6;
+      addressP[3] = VAX_JMP;
+      addressP[4] = VAX_PC_RELATIVE_MODE;
+      md_number_to_chars (addressP + 5, target_address, 4);
+      extension = 9;
+      break;
+
+    default:
+      BAD_CASE (fragP->fr_subtype);
+      break;
+    }
+  fragP->fr_fix += extension;
+}
+
+/* Translate internal format of relocation info into target format.
+
+   On vax: first 4 bytes are normal unsigned long, next three bytes
+   are symbolnum, least sig. byte first.  Last byte is broken up with
+   the upper nibble as nuthin, bit 3 as extern, bits 2 & 1 as length, and
+   bit 0 as pcrel. */
+void 
+md_ri_to_chars (the_bytes, ri)
+     char *the_bytes;
+     struct reloc_info_generic ri;
+{
+  /* this is easy */
+  md_number_to_chars (the_bytes, ri.r_address, sizeof (ri.r_address));
+  /* now the fun stuff */
+  the_bytes[6] = (ri.r_symbolnum >> 16) & 0x0ff;
+  the_bytes[5] = (ri.r_symbolnum >> 8) & 0x0ff;
+  the_bytes[4] = ri.r_symbolnum & 0x0ff;
+  the_bytes[7] = (((ri.r_extern << 3) & 0x08) | ((ri.r_length << 1) & 0x06) |
+		  ((ri.r_pcrel << 0) & 0x01)) & 0x0F;
+}
+
+/*
+ *       BUGS, GRIPES,  APOLOGIA, etc.
+ *
+ * The opcode table 'votstrs' needs to be sorted on opcode frequency.
+ * That is, AFTER we hash it with hash_...(), we want most-used opcodes
+ * to come out of the hash table faster.
+ *
+ * I am sorry to inflict
+ * yet another VAX assembler on the world, but RMS says we must
+ * do everything from scratch, to prevent pin-heads restricting
+ * this software.
+ */
+
+/*
+ * This is a vaguely modular set of routines in C to parse VAX
+ * assembly code using DEC mnemonics. It is NOT un*x specific.
+ *
+ * The idea here is that the assembler has taken care of all:
+ *   labels
+ *   macros
+ *   listing
+ *   pseudo-ops
+ *   line continuation
+ *   comments
+ *   condensing any whitespace down to exactly one space
+ * and all we have to do is parse 1 line into a vax instruction
+ * partially formed. We will accept a line, and deliver:
+ *   an error message (hopefully empty)
+ *   a skeleton VAX instruction (tree structure)
+ *   textual pointers to all the operand expressions
+ *   a warning message that notes a silly operand (hopefully empty)
+ */
+
+/*
+ *		E D I T   H I S T O R Y
+ *
+ * 17may86 Dean Elsner. Bug if line ends immediately after opcode.
+ * 30apr86 Dean Elsner. New vip_op() uses arg block so change call.
+ *  6jan86 Dean Elsner. Crock vip_begin() to call vip_op_defaults().
+ *  2jan86 Dean Elsner. Invent synthetic opcodes.
+ *	Widen vax_opcodeT to 32 bits. Use a bit for VIT_OPCODE_SYNTHETIC,
+ *	which means this is not a real opcode, it is like a macro; it will
+ *	be relax()ed into 1 or more instructions.
+ *	Use another bit for VIT_OPCODE_SPECIAL if the op-code is not optimised
+ *	like a regular branch instruction. Option added to vip_begin():
+ *	exclude	synthetic opcodes. Invent synthetic_votstrs[].
+ * 31dec85 Dean Elsner. Invent vit_opcode_nbytes.
+ *	Also make vit_opcode into a char[]. We now have n-byte vax opcodes,
+ *	so caller's don't have to know the difference between a 1-byte & a
+ *	2-byte op-code. Still need vax_opcodeT concept, so we know how
+ *	big an object must be to hold an op.code.
+ * 30dec85 Dean Elsner. Widen typedef vax_opcodeT in "vax-inst.h"
+ *	because vax opcodes may be 16 bits. Our crufty C compiler was
+ *	happily initialising 8-bit vot_codes with 16-bit numbers!
+ *	(Wouldn't the 'phone company like to compress data so easily!)
+ * 29dec85 Dean Elsner. New static table vax_operand_width_size[].
+ *	Invented so we know hw many bytes a "I^#42" needs in its immediate
+ *	operand. Revised struct vop in "vax-inst.h": explicitly include
+ *	byte length of each operand, and it's letter-code datum type.
+ * 17nov85 Dean Elsner. Name Change.
+ *	Due to ar(1) truncating names, we learned the hard way that
+ *	"vax-inst-parse.c" -> "vax-inst-parse." dropping the "o" off
+ *	the archived object name. SO... we shortened the name of this
+ *	source file, and changed the makefile.
+ */
+
+static char *op_hash = NULL;	/* handle of the OPCODE hash table */
+ /* NULL means any use before vip_begin() */
+ /* will crash */
+
+/*
+ * In:	1 character, from "bdfghloqpw" being the data-type of an operand
+ *	of a vax instruction.
+ *
+ * Out:	the length of an operand of that type, in bytes.
+ *	Special branch operands types "-?!" have length 0.
+ */
+
+static const short int vax_operand_width_size[256] =
+{
+
+#define _ 0
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, 1, _, 8, _, 4, 8, 16, _, _, _, 4, _, _, 16,	/* ..b.d.fgh...l..o */
+  _, 8, _, _, _, _, _, 2, _, _, _, _, _, _, _, _,	/* .q.....w........ */
+  _, _, 1, _, 8, _, 4, 8, 16, _, _, _, 4, _, _, 16,	/* ..b.d.fgh...l..o */
+  _, 8, _, _, _, _, _, 2, _, _, _, _, _, _, _, _,	/* .q.....w........ */
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _,
+  _, _, _, _, _, _, _, _, _, _, _, _, _, _, _, _};
+#undef _
+
+/*
+ * This perversion encodes all the vax opcodes as a bunch of strings.
+ * RMS says we should build our hash-table at run-time. Hmm.
+ * Please would someone arrange these in decreasing frequency of opcode?
+ * Because of the way hash_...() works, the most frequently used opcode
+ * should be textually first and so on.
+ *
+ * Input for this table was 'vax.opcodes', awk(1)ed by 'vax.opcodes.c.awk' .
+ * So change 'vax.opcodes', then re-generate this table.
+ */
+
+#include "vax-opcode.h"
+
+/*
+ * This is a table of optional op-codes. All of them represent
+ * 'synthetic' instructions that seem popular.
+ *
+ * Here we make some pseudo op-codes. Every code has a bit set to say
+ * it is synthetic. This lets you catch them if you want to
+ * ban these opcodes. They are mnemonics for "elastic" instructions
+ * that are supposed to assemble into the fewest bytes needed to do a
+ * branch, or to do a conditional branch, or whatever.
+ *
+ * The opcode is in the usual place [low-order n*8 bits]. This means
+ * that if you mask off the bucky bits, the usual rules apply about
+ * how long the opcode is.
+ *
+ * All VAX branch displacements come at the end of the instruction.
+ * For simple branches (1-byte opcode + 1-byte displacement) the last
+ * operand is coded 'b?' where the "data type" '?' is a clue that we
+ * may reverse the sense of the branch (complement lowest order bit)
+ * and branch around a jump. This is by far the most common case.
+ * That is why the VIT_OPCODE_SYNTHETIC bit is set: it says this is
+ * a 0-byte op-code followed by 2 or more bytes of operand address.
+ *
+ * If the op-code has VIT_OPCODE_SPECIAL set, then we have a more unusual
+ * case.
+ *
+ * For JBSB & JBR the treatment is the similar, except (1) we have a 'bw'
+ * option before (2) we can directly JSB/JMP because there is no condition.
+ * These operands have 'b-' as their access/data type.
+ *
+ * That leaves a bunch of random opcodes: JACBx, JxOBxxx. In these
+ * cases, we do the same idea. JACBxxx are all marked with a 'b!'
+ * JAOBxxx & JSOBxxx are marked with a 'b:'.
+ *
+ */
+#if (VIT_OPCODE_SYNTHETIC != 0x80000000)
+You have just broken the encoding below, which assumes the sign bit
+ means 'I am an imaginary instruction'.
+#endif
+
+#if (VIT_OPCODE_SPECIAL != 0x40000000)
+ You have just broken the encoding below, which assumes the 0x40 M bit means
+ 'I am not to be "optimised" the way normal branches are'.
+#endif
+
+static const struct vot
+ synthetic_votstrs[] =
+{
+  {"jbsb",
+   {"b-", 0xC0000010}},		/* BSD 4.2 */
+ /* jsb used already */
+  {"jbr",
+   {"b-", 0xC0000011}},		/* BSD 4.2 */
+  {"jr",
+   {"b-", 0xC0000011}},		/* consistent */
+  {"jneq",
+   {"b?", 0x80000012}},
+  {"jnequ",
+   {"b?", 0x80000012}},
+  {"jeql",
+   {"b?", 0x80000013}},
+  {"jeqlu",
+   {"b?", 0x80000013}},
+  {"jgtr",
+   {"b?", 0x80000014}},
+  {"jleq",
+   {"b?", 0x80000015}},
+ /* un-used opcodes here */
+  {"jgeq",
+   {"b?", 0x80000018}},
+  {"jlss",
+   {"b?", 0x80000019}},
+  {"jgtru",
+   {"b?", 0x8000001a}},
+  {"jlequ",
+   {"b?", 0x8000001b}},
+  {"jvc",
+   {"b?", 0x8000001c}},
+  {"jvs",
+   {"b?", 0x8000001d}},
+  {"jgequ",
+   {"b?", 0x8000001e}},
+  {"jcc",
+   {"b?", 0x8000001e}},
+  {"jlssu",
+   {"b?", 0x8000001f}},
+  {"jcs",
+   {"b?", 0x8000001f}},
+
+  {"jacbw",
+   {"rwrwmwb!", 0xC000003d}},
+  {"jacbf",
+   {"rfrfmfb!", 0xC000004f}},
+  {"jacbd",
+   {"rdrdmdb!", 0xC000006f}},
+  {"jacbb",
+   {"rbrbmbb!", 0xC000009d}},
+  {"jacbl",
+   {"rlrlmlb!", 0xC00000f1}},
+  {"jacbg",
+   {"rgrgmgb!", 0xC0004ffd}},
+  {"jacbh",
+   {"rhrhmhb!", 0xC0006ffd}},
+
+  {"jbs",
+   {"rlvbb?", 0x800000e0}},
+  {"jbc",
+   {"rlvbb?", 0x800000e1}},
+  {"jbss",
+   {"rlvbb?", 0x800000e2}},
+  {"jbcs",
+   {"rlvbb?", 0x800000e3}},
+  {"jbsc",
+   {"rlvbb?", 0x800000e4}},
+  {"jbcc",
+   {"rlvbb?", 0x800000e5}},
+  {"jbssi",
+   {"rlvbb?", 0x800000e6}},
+  {"jbcci",
+   {"rlvbb?", 0x800000e7}},
+  {"jlbs",
+   {"rlb?", 0x800000e8}},	/* JF changed from rlvbb? */
+  {"jlbc",
+   {"rlb?", 0x800000e9}},	/* JF changed from rlvbb? */
+
+  {"jaoblss",
+   {"rlmlb:", 0xC00000f2}},
+  {"jaobleq",
+   {"rlmlb:", 0xC00000f3}},
+  {"jsobgeq",
+   {"mlb:", 0xC00000f4}},	/* JF was rlmlb: */
+  {"jsobgtr",
+   {"mlb:", 0xC00000f5}},	/* JF was rlmlb: */
+
+/* CASEx has no branch addresses in our conception of it. */
+/* You should use ".word ..." statements after the "case ...". */
+
+  {"", ""}			/* empty is end sentinel */
+
+};				/* synthetic_votstrs */
+
+/*
+ *                  v i p _ b e g i n ( )
+ *
+ * Call me once before you decode any lines.
+ * I decode votstrs into a hash table at op_hash (which I create).
+ * I return an error text: hopefully "".
+ * If you want, I will include the 'synthetic' jXXX instructions in the
+ * instruction table.
+ * You must nominate metacharacters for eg DEC's "#", "@", "^".
+ */
+
+char *
+vip_begin (synthetic_too, immediate, indirect, displen)
+     int synthetic_too;		/* TRUE means include jXXX op-codes. */
+     char *immediate, *indirect, *displen;
+{
+  register const struct vot *vP;	/* scan votstrs */
+  register char *retval;	/* error text */
+
+  char *hash_insert ();		/*  */
+  char *hash_new ();		/* lies */
+
+  if ((op_hash = hash_new ()))
+    {
+      retval = "";		/* OK so far */
+      for (vP = votstrs; *vP->vot_name && !*retval; vP++)
+	{
+	  retval = hash_insert (op_hash, vP->vot_name, &vP->vot_detail);
+	}
+      if (synthetic_too)
+	{
+	  for (vP = synthetic_votstrs; *vP->vot_name && !*retval; vP++)
+	    {
+	      retval = hash_insert (op_hash, vP->vot_name, &vP->vot_detail);
+	    }
+	}
+    }
+  else
+    {
+      retval = "virtual memory exceeded";
+    }
+#ifndef CONST_TABLE
+  vip_op_defaults (immediate, indirect, displen);
+#endif
+
+  return (retval);
+}
+
+
+/*
+ *                  v i p _ e n d ( )
+ *
+ * Call me once after you have decoded all lines.
+ * I do any cleaning-up needed.
+ *
+ * We don't have to do any cleanup ourselves: all of our operand
+ * symbol table is static, and free()ing it is naughty.
+ */
+vip_end ()
+{
+}
+
+/*
+ *                  v i p ( )
+ *
+ * This converts a string into a vax instruction.
+ * The string must be a bare single instruction in dec-vax (with BSD4 frobs)
+ * format.
+ * It provides some error messages: at most one fatal error message (which
+ * stops the scan) and at most one warning message for each operand.
+ * The vax instruction is returned in exploded form, since we have no
+ * knowledge of how you parse (or evaluate) your expressions.
+ * We do however strip off and decode addressing modes and operation
+ * mnemonic.
+ *
+ * The exploded instruction is returned to a struct vit of your choice.
+ * #include "vax-inst.h" to know what a struct vit is.
+ *
+ * This function's value is a string. If it is not "" then an internal
+ * logic error was found: read this code to assign meaning to the string.
+ * No argument string should generate such an error string:
+ * it means a bug in our code, not in the user's text.
+ *
+ * You MUST have called vip_begin() once and vip_end() never before using
+ * this function.
+ */
+
+char *				/* "" or bug string */
+vip (vitP, instring)
+     struct vit *vitP;		/* We build an exploded instruction here. */
+     char *instring;		/* Text of a vax instruction: we modify. */
+{
+  register struct vot_wot *vwP;	/* How to bit-encode this opcode. */
+  register char *p;		/* 1/skip whitespace.2/scan vot_how */
+  register char *q;		/*  */
+  register char *bug;		/* "" or program logic error */
+  register unsigned char count;	/* counts number of operands seen */
+  register struct vop *operandp;/* scan operands in struct vit */
+  register char *alloperr;	/* error over all operands */
+  register char c;		/* Remember char, (we clobber it */
+  /* with '\0' temporarily). */
+  register vax_opcodeT oc;	/* Op-code of this instruction. */
+
+  struct vot_wot *hash_find ();
+  char *vip_op ();
+
+  bug = "";
+  if (*instring == ' ')
+    ++instring;			/* Skip leading whitespace. */
+  for (p = instring; *p && *p != ' '; p++)
+    ;				/* MUST end in end-of-string or exactly 1 space. */
+  /* Scanned up to end of operation-code. */
+  /* Operation-code is ended with whitespace. */
+  if (p - instring == 0)
+    {
+      vitP->vit_error = "No operator";
+      count = 0;
+      bzero (vitP->vit_opcode, sizeof (vitP->vit_opcode));
+    }
+  else
+    {
+      c = *p;
+      *p = '\0';
+      /*
+       * Here with instring pointing to what better be an op-name, and p
+       * pointing to character just past that.
+       * We trust instring points to an op-name, with no whitespace.
+       */
+      vwP = hash_find (op_hash, instring);
+      *p = c;			/* Restore char after op-code. */
+      if (vwP == 0)
+	{
+	  vitP->vit_error = "Unknown operator";
+	  count = 0;
+	  bzero (vitP->vit_opcode, sizeof (vitP->vit_opcode));
+	}
+      else
+	{
+	  /*
+	   * We found a match! So lets pick up as many operands as the
+	   * instruction wants, and even gripe if there are too many.
+	   * We expect comma to seperate each operand.
+	   * We let instring track the text, while p tracks a part of the
+	   * struct vot.
+	   */
+	  /*
+	   * The lines below know about 2-byte opcodes starting FD,FE or FF.
+	   * They also understand synthetic opcodes. Note:
+	   * we return 32 bits of opcode, including bucky bits, BUT
+	   * an opcode length is either 8 or 16 bits for vit_opcode_nbytes.
+	   */
+	  oc = vwP->vot_code;	/* The op-code. */
+	  vitP->vit_opcode_nbytes = (oc & 0xFF) >= 0xFD ? 2 : 1;
+	  md_number_to_chars (vitP->vit_opcode, oc, 4);
+	  count = 0;		/* no operands seen yet */
+	  instring = p;		/* point just past operation code */
+	  alloperr = "";
+	  for (p = vwP->vot_how, operandp = vitP->vit_operand;
+	       !*alloperr && !*bug && *p;
+	       operandp++, p += 2
+	    )
+	    {
+	      /*
+	       * Here to parse one operand. Leave instring pointing just
+	       * past any one ',' that marks the end of this operand.
+	       */
+	      if (!p[1])
+		bug = "p";	/* ODD(!!) number of bytes in vot_how?? */
+	      else if (*instring)
+		{
+		  for (q = instring; (c = *q) && c != ','; q++)
+		    ;
+		  /*
+		   * Q points to ',' or '\0' that ends argument. C is that
+		   * character.
+		   */
+		  *q = 0;
+		  operandp->vop_width = p[1];
+		  operandp->vop_nbytes = vax_operand_width_size[p[1]];
+		  operandp->vop_access = p[0];
+		  bug = vip_op (instring, operandp);
+		  *q = c;	/* Restore input text. */
+		  if (*(operandp->vop_error))
+		    alloperr = "Bad operand";
+		  instring = q + (c ? 1 : 0);	/* next operand (if any) */
+		  count++;	/*  won another argument, may have an operr */
+		}
+	      else
+		alloperr = "Not enough operands";
+	    }
+	  if (!*alloperr)
+	    {
+	      if (*instring == ' ')
+		instring++;	/* Skip whitespace. */
+	      if (*instring)
+		alloperr = "Too many operands";
+	    }
+	  vitP->vit_error = alloperr;
+	}
+    }
+  vitP->vit_operands = count;
+  return (bug);
+}
+
+#ifdef test
+
+/*
+ * Test program for above.
+ */
+
+struct vit myvit;		/* build an exploded vax instruction here */
+char answer[100];		/* human types a line of vax assembler here */
+char *mybug;			/* "" or an internal logic diagnostic */
+int mycount;			/* number of operands */
+struct vop *myvop;		/* scan operands from myvit */
+int mysynth;			/* TRUE means want synthetic opcodes. */
+char my_immediate[200];
+char my_indirect[200];
+char my_displen[200];
+
+char *vip ();
+
+main ()
+{
+  char *p;
+  char *vip_begin ();
+
+  printf ("0 means no synthetic instructions.   ");
+  printf ("Value for vip_begin?  ");
+  gets (answer);
+  sscanf (answer, "%d", &mysynth);
+  printf ("Synthetic opcodes %s be included.\n", mysynth ? "will" : "will not");
+  printf ("enter immediate symbols eg enter #   ");
+  gets (my_immediate);
+  printf ("enter indirect symbols  eg enter @   ");
+  gets (my_indirect);
+  printf ("enter displen symbols   eg enter ^   ");
+  gets (my_displen);
+  if (*(p = vip_begin (mysynth, my_immediate, my_indirect, my_displen)))
+    {
+      error ("vip_begin=%s", p);
+    }
+  printf ("An empty input line will quit you from the vax instruction parser\n");
+  for (;;)
+    {
+      printf ("vax instruction: ");
+      fflush (stdout);
+      gets (answer);
+      if (!*answer)
+	{
+	  break;		/* out of for each input text loop */
+	}
+      mybug = vip (&myvit, answer);
+      if (*mybug)
+	{
+	  printf ("BUG:\"%s\"\n", mybug);
+	}
+      if (*myvit.vit_error)
+	{
+	  printf ("ERR:\"%s\"\n", myvit.vit_error);
+	}
+      printf ("opcode=");
+      for (mycount = myvit.vit_opcode_nbytes, p = myvit.vit_opcode;
+	   mycount;
+	   mycount--, p++
+	)
+	{
+	  printf ("%02x ", *p & 0xFF);
+	}
+      printf ("   operand count=%d.\n", mycount = myvit.vit_operands);
+      for (myvop = myvit.vit_operand; mycount; mycount--, myvop++)
+	{
+	  printf ("mode=%xx reg=%xx ndx=%xx len='%c'=%c%c%d. expr=\"",
+		  myvop->vop_mode, myvop->vop_reg, myvop->vop_ndx,
+		  myvop->vop_short, myvop->vop_access, myvop->vop_width,
+		  myvop->vop_nbytes);
+	  for (p = myvop->vop_expr_begin; p <= myvop->vop_expr_end; p++)
+	    {
+	      putchar (*p);
+	    }
+	  printf ("\"\n");
+	  if (*myvop->vop_error)
+	    {
+	      printf ("  err:\"%s\"\n", myvop->vop_error);
+	    }
+	  if (*myvop->vop_warn)
+	    {
+	      printf ("  wrn:\"%s\"\n", myvop->vop_warn);
+	    }
+	}
+    }
+  vip_end ();
+  exit ();
+}
+
+#endif /* #ifdef test */
+
+/* end of vax_ins_parse.c */
+
+ /* JF this used to be a separate file also */
+/* vax_reg_parse.c - convert a VAX register name to a number */
+
+/* Copyright (C) 1987 Free Software Foundation, Inc. A part of GNU. */
+
+/*
+ *          v a x _ r e g _ p a r s e ( )
+ *
+ * Take 3 char.s, the last of which may be `\0` (non-existent)
+ * and return the VAX register number that they represent.
+ *
+ * Return -1 if they don't form a register name. Good names return
+ * a number from 0:15 inclusive.
+ *
+ * Case is not important in a name.
+ *
+ * Register names understood are:
+ *
+ *	R0
+ *	R1
+ *	R2
+ *	R3
+ *	R4
+ *	R5
+ *	R6
+ * 	R7
+ *	R8
+ *	R9
+ *	R10
+ *	R11
+ *	R12	AP
+ *	R13	FP
+ *	R14	SP
+ *	R15	PC
+ *
+ */
+
+#include <ctype.h>
+#define AP (12)
+#define FP (13)
+#define SP (14)
+#define PC (15)
+
+int				/* return -1 or 0:15 */
+vax_reg_parse (c1, c2, c3)	/* 3 chars of register name */
+     char c1, c2, c3;		/* c3 == 0 if 2-character reg name */
+{
+  register int retval;		/* return -1:15 */
+
+  retval = -1;
+
+  if (isupper (c1))
+    c1 = tolower (c1);
+  if (isupper (c2))
+    c2 = tolower (c2);
+  if (isdigit (c2) && c1 == 'r')
+    {
+      retval = c2 - '0';
+      if (isdigit (c3))
+	{
+	  retval = retval * 10 + c3 - '0';
+	  retval = (retval > 15) ? -1 : retval;
+	  /* clamp the register value to 1 hex digit */
+	}
+      else if (c3)
+	retval = -1;		/* c3 must be '\0' or a digit */
+    }
+  else if (c3)			/* There are no three letter regs */
+    retval = -1;
+  else if (c2 == 'p')
+    {
+      switch (c1)
+	{
+	case 's':
+	  retval = SP;
+	  break;
+	case 'f':
+	  retval = FP;
+	  break;
+	case 'a':
+	  retval = AP;
+	  break;
+	default:
+	  retval = -1;
+	}
+    }
+  else if (c1 == 'p' && c2 == 'c')
+    retval = PC;
+  else
+    retval = -1;
+  return (retval);
+}
+
+/*
+ *               v i p _ o p ( )
+ *
+ * Parse a vax operand in DEC assembler notation.
+ * For speed, expect a string of whitespace to be reduced to a single ' '.
+ * This is the case for GNU AS, and is easy for other DEC-compatible
+ * assemblers.
+ *
+ * Knowledge about DEC VAX assembler operand notation lives here.
+ * This doesn't even know what a register name is, except it believes
+ * all register names are 2 or 3 characters, and lets vax_reg_parse() say
+ * what number each name represents.
+ * It does, however, know that PC, SP etc are special registers so it can
+ * detect addressing modes that are silly for those registers.
+ *
+ * Where possible, it delivers 1 fatal or 1 warning message if the operand
+ * is suspect. Exactly what we test for is still evolving.
+ */
+
+/*
+ *		   	B u g s
+ *
+ *	Arg block.
+ *
+ * There were a number of 'mismatched argument type' bugs to vip_op.
+ * The most general solution is to typedef each (of many) arguments.
+ * We used instead a typedef'd argument block. This is less modular
+ * than using seperate return pointers for each result, but runs faster
+ * on most engines, and seems to keep programmers happy. It will have
+ * to be done properly if we ever want to use vip_op as a general-purpose
+ * module (it was designed to be).
+ *
+ *	G^
+ *
+ * Doesn't support DEC "G^" format operands. These always take 5 bytes
+ * to express, and code as modes 8F or 9F. Reason: "G^" deprives you of
+ * optimising to (say) a "B^" if you are lucky in the way you link.
+ * When someone builds a linker smart enough to convert "G^" to "B^", "W^"
+ * whenever possible, then we should implement it.
+ * If there is some other use for "G^", feel free to code it in!
+ *
+ *
+ *	speed
+ *
+ * If I nested if()s more, I could avoid testing (*err) which would save
+ * time, space and page faults. I didn't nest all those if()s for clarity
+ * and because I think the mode testing can be re-arranged 1st to test the
+ * commoner constructs 1st. Does anybody have statistics on this?
+ *
+ *
+ *
+ *	error messages
+ *
+ * In future, we should be able to 'compose' error messages in a scratch area
+ * and give the user MUCH more informative error messages. Although this takes
+ * a little more code at run-time, it will make this module much more self-
+ * documenting. As an example of what sucks now: most error messages have
+ * hardwired into them the DEC VAX metacharacters "#^@" which are nothing like
+ * the Un*x characters "$`*", that most users will expect from this AS.
+ */
+
+/*
+ * The input is a string, ending with '\0'.
+ *
+ * We also require a 'hint' of what kind of operand is expected: so
+ * we can remind caller not to write into literals for instance.
+ *
+ * The output is a skeletal instruction.
+ *
+ * The algorithm has two parts.
+ * 1. extract the syntactic features (parse off all the @^#-()+[] mode crud);
+ * 2. express the @^#-()+[] as some parameters suited to further analysis.
+ *
+ * 2nd step is where we detect the googles of possible invalid combinations
+ * a human (or compiler) might write. Note that if we do a half-way
+ * decent assembler, we don't know how long to make (eg) displacement
+ * fields when we first meet them (because they may not have defined values).
+ * So we must wait until we know how many bits are needed for each address,
+ * then we can know both length and opcodes of instructions.
+ * For reason(s) above, we will pass to our caller a 'broken' instruction
+ * of these major components, from which our caller can generate instructions:
+ *  -  displacement length      I^ S^ L^ B^ W^ unspecified
+ *  -  mode                     (many)
+ *  -  register                 R0-R15 or absent
+ *  -  index register           R0-R15 or absent
+ *  -  expression text          what we don't parse
+ *  -  error text(s)            why we couldn't understand the operand
+ */
+
+/*
+ * To decode output of this, test errtxt. If errtxt[0] == '\0', then
+ * we had no errors that prevented parsing. Also, if we ever report
+ * an internal bug, errtxt[0] is set non-zero. So one test tells you
+ * if the other outputs are to be taken seriously.
+ */
+
+
+ /* vax registers we need to know */
+/* JF #define SP      (14)
+/* JF for one big happy file #define PC      (15) */
+
+ /* useful ideas */
+/* #define TRUE    (1) */
+/* #define FALSE   (0) */
+
+/*
+ * Because this module is useful for both VMS and UN*X style assemblers
+ * and because of the variety of UN*X assemblers we must recognise
+ * the different conventions for assembler operand notation. For example
+ * VMS says "#42" for immediate mode, while most UN*X say "$42".
+ * We permit arbitrary sets of (single) characters to represent the
+ * 3 concepts that DEC writes '#', '@', '^'.
+ */
+
+ /* character tests */
+#define VIP_IMMEDIATE 01 /* Character is like DEC # */
+#define VIP_INDIRECT  02 /* Char is like DEC @ */
+#define VIP_DISPLEN   04 /* Char is like DEC ^ */
+
+#define IMMEDIATEP(c)	(vip_metacharacters [(c)&0xff]&VIP_IMMEDIATE)
+#define INDIRECTP(c)	(vip_metacharacters [(c)&0xff]&VIP_INDIRECT)
+#define DISPLENP(c)	(vip_metacharacters [(c)&0xff]&VIP_DISPLEN)
+
+/* We assume 8 bits per byte. Use vip_op_defaults() to set these up BEFORE we
+ * are ever called.
+ */
+
+#if defined(CONST_TABLE)
+#define _ 0,
+#define I VIP_IMMEDIATE,
+#define S VIP_INDIRECT,
+#define D VIP_DISPLEN,
+static const char
+vip_metacharacters[256] = {
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _/*^@ ^A ^B ^C ^D ^E ^F ^G ^H ^I ^J ^K ^L ^M ^N ^O*/
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _/*^P ^Q ^R ^S ^T ^U ^V ^W ^X ^Y ^Z ^[ ^\ ^] ^^ ^_*/
+_ _ _ _ I _ _ _ _ _ S _ _ _ _ _/*sp !  "  #  $  %  &  '  (  )  *  +  ,  -  .  /*/
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _/*0  1  2  3  4  5  6  7  8  9  :  ;  <  =  >  ?*/
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _/*@  A  B  C  D  E  F  G  H  I  J  K  L  M  N  O*/
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _/*P  Q  R  S  T  U  V  W  X  Y  Z  [  \  ]  ^  _*/
+D _ _ _ _ _ _ _ _ _ _ _ _ _ _ _/*`  a  b  c  d  e  f  g  h  i  j  k  l  m  n  o*/
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _/*p  q  r  s  t  u  v  w  x  y  z  {  |  }  ~  ^?*/
+
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
+};
+#undef _
+#undef I
+#undef S
+#undef D
+#else
+static char vip_metacharacters[256];
+
+/* Macro is faster under GCC;  The constant table is faster yet, but only works with ASCII */
+#if 0
+static
+#ifdef __GNUC__
+inline
+#endif
+static void
+vip_op_1(bit,syms)
+int bit;
+char *syms;
+{
+  unsigned char t;
+
+  while(t= *syms++)
+    vip_metacharacters[t]|=bit;
+}
+#else
+#define vip_op_1(bit,syms) {		\
+  unsigned char t;			\
+  char *table=vip_metacharacters;	\
+  while(t= *syms++)			\
+    table[t]|=bit;			\
+ }
+#endif
+
+vip_op_defaults (immediate, indirect, displen)	/* can be called any time */
+     char *immediate,		/* Strings of characters for each job. */
+     *indirect, *displen;	/* more arguments may appear in future! */
+{
+  vip_op_1 (VIP_IMMEDIATE, immediate);
+  vip_op_1 (VIP_INDIRECT, indirect);
+  vip_op_1 (VIP_DISPLEN, displen);
+}
+#endif
+
+
+/*
+ * Dec defines the semantics of address modes (and values)
+ * by a two-letter code, explained here.
+ *
+ *   letter 1:   access type
+ *
+ *     a         address calculation - no data access, registers forbidden
+ *     b         branch displacement
+ *     m         read - let go of bus - write back    "modify"
+ *     r         read
+ *     v         bit field address: like 'a' but registers are OK
+ *     w         write
+ *     space	 no operator (eg ".long foo") [our convention]
+ *
+ *   letter 2:   data type (i.e. width, alignment)
+ *
+ *     b         byte
+ *     d         double precision floating point (D format)
+ *     f         single precision floating point (F format)
+ *     g         G format floating
+ *     h         H format floating
+ *     l         longword
+ *     o         octaword
+ *     q         quadword
+ *     w         word
+ *     ?	 simple synthetic branch operand
+ *     -	 unconditional synthetic JSB/JSR operand
+ *     !	 complex synthetic branch operand
+ *
+ * The '-?!' letter 2's are not for external consumption. They are used
+ * for various assemblers. Generally, all unknown widths are assumed 0.
+ * We don't limit your choice of width character.
+ *
+ * DEC operands are hard work to parse. For example, '@' as the first
+ * character means indirect (deferred) mode but elswhere it is a shift
+ * operator.
+ * The long-winded explanation of how this is supposed to work is
+ * cancelled. Read a DEC vax manual.
+ * We try hard not to parse anything that MIGHT be part of the expression
+ * buried in that syntax. For example if we see @...(Rn) we don't check
+ * for '-' before the '(' because mode @-(Rn) does not exist.
+ *
+ * After parsing we have:
+ *
+ * at                     TRUE if leading '@' (or Un*x '*')
+ * len                    takes one value from " bilsw". eg B^ -> 'b'.
+ * hash                   TRUE if leading '#' (or Un*x '$')
+ * expr_begin, expr_end   the expression we did not parse
+ *                        even though we don't interpret it, we make use
+ *                        of its presence or absence.
+ * sign                   -1: -(Rn)    0: absent    +1: (Rn)+
+ * paren                  TRUE if () are around register
+ * reg                    major register number 0:15    -1 means absent
+ * ndx                    index register number 0:15    -1 means absent
+ *
+ * Again, I dare not explain it: just trace ALL the code!
+ */
+
+char *				/* (code here) bug message, "" = OK */
+ /* our code bug, NOT bad assembly language */
+vip_op (optext, vopP)
+     char *optext;		/* user's input string e.g.: */
+ /* "@B^foo@bar(AP)[FP]:" */
+     struct vop *vopP;		/* In: vop_access, vop_width. */
+ /* Out: _ndx, _reg, _mode, _short, _warn, */
+ /* _error _expr_begin, _expr_end, _nbytes. */
+ /* vop_nbytes : number of bytes in a datum. */
+{
+  char *p;			/* track operand text forward */
+  char *q;			/* track operand text backward */
+  int at;			/* TRUE if leading '@' ('*') seen */
+  char len;			/* one of " bilsw" */
+  int hash;			/* TRUE if leading '#' ('$') seen */
+  int sign;			/* -1, 0 or +1 */
+  int paren;			/* TRUE if () surround register */
+  int reg;			/* register number, -1:absent */
+  int ndx;			/* index register number -1:absent */
+  char *bug;			/* report any logic error in here, ""==OK */
+  char *err;			/* report illegal operand, ""==OK */
+  /* " " is a FAKE error: means we won */
+  /* ANY err that begins with ' ' is a fake. */
+  /* " " is converted to "" before return */
+  char *wrn;			/* warn about weird modes pf address */
+  char *oldq;			/* preserve q in case we backup */
+  int mode;			/* build up 4-bit operand mode here */
+  /* note: index mode is in ndx, this is */
+  /* the major mode of operand address */
+/*
+ * Notice how we move wrong-arg-type bugs INSIDE this module: if we
+ * get the types wrong below, we lose at compile time rather than at
+ * lint or run time.
+ */
+  char access;			/* vop_access. */
+  char width;			/* vop_width. */
+
+  int vax_reg_parse ();		/* returns 0:15 or -1 if not a register */
+
+  access = vopP->vop_access;
+  width = vopP->vop_width;
+  bug =				/* none of our code bugs (yet) */
+    err =			/* no user text errors */
+    wrn = "";			/* no warnings even */
+
+  p = optext;
+
+  if (*p == ' ')		/* Expect all whitespace reduced to ' '. */
+    p++;			/* skip over whitespace */
+
+  if (at = INDIRECTP (*p))
+    {				/* TRUE if *p=='@'(or '*' for Un*x) */
+      p++;			/* at is determined */
+      if (*p == ' ')		/* Expect all whitespace reduced to ' '. */
+	p++;			/* skip over whitespace */
+    }
+
+  /*
+   * This code is subtle. It tries to detect all legal (letter)'^'
+   * but it doesn't waste time explicitly testing for premature '\0' because
+   * this case is rejected as a mismatch against either (letter) or '^'.
+   */
+  {
+    register char c;
+
+    c = *p;
+    if (isupper (c))
+      c = tolower (c);
+    if (DISPLENP (p[1]) && strchr ("bilws", len = c))
+      p += 2;			/* skip (letter) '^' */
+    else			/* no (letter) '^' seen */
+      len = ' ';		/* len is determined */
+  }
+
+  if (*p == ' ')		/* Expect all whitespace reduced to ' '. */
+    p++;			/* skip over whitespace */
+
+  if (hash = IMMEDIATEP (*p))	/* TRUE if *p=='#' ('$' for Un*x) */
+    p++;			/* hash is determined */
+
+  /*
+   * p points to what may be the beginning of an expression.
+   * We have peeled off the front all that is peelable.
+   * We know at, len, hash.
+   *
+   * Lets point q at the end of the text and parse that (backwards).
+   */
+
+  for (q = p; *q; q++)
+    ;
+  q--;				/* now q points at last char of text */
+
+  if (*q == ' ' && q >= p)	/* Expect all whitespace reduced to ' '. */
+    q--;
+  /* reverse over whitespace, but don't */
+  /* run back over *p */
+
+  /*
+   * As a matter of policy here, we look for [Rn], although both Rn and S^#
+   * forbid [Rn]. This is because it is easy, and because only a sick
+   * cyborg would have [...] trailing an expression in a VAX-like assembler.
+   * A meticulous parser would first check for Rn followed by '(' or '['
+   * and not parse a trailing ']' if it found another. We just ban expressions
+   * ending in ']'.
+   */
+  if (*q == ']')
+    {
+      while (q >= p && *q != '[')
+	q--;
+      /* either q<p or we got matching '[' */
+      if (q < p)
+	err = "no '[' to match ']'";
+      else
+	{
+	  /*
+	   * Confusers like "[]" will eventually lose with a bad register
+	   * name error. So again we don't need to check for early '\0'.
+	   */
+	  if (q[3] == ']')
+	    ndx = vax_reg_parse (q[1], q[2], 0);
+	  else if (q[4] == ']')
+	    ndx = vax_reg_parse (q[1], q[2], q[3]);
+	  else
+	    ndx = -1;
+	  /*
+	   * Since we saw a ']' we will demand a register name in the [].
+	   * If luser hasn't given us one: be rude.
+	   */
+	  if (ndx < 0)
+	    err = "bad register in []";
+	  else if (ndx == PC)
+	    err = "[PC] index banned";
+	  else
+	    q--;		/* point q just before "[...]" */
+	}
+    }
+  else
+    ndx = -1;			/* no ']', so no iNDeX register */
+
+  /*
+   * If err = "..." then we lost: run away.
+   * Otherwise ndx == -1 if there was no "[...]".
+   * Otherwise, ndx is index register number, and q points before "[...]".
+   */
+
+  if (*q == ' ' && q >= p)	/* Expect all whitespace reduced to ' '. */
+    q--;
+  /* reverse over whitespace, but don't */
+  /* run back over *p */
+  if (!*err)
+    {
+      sign = 0;			/* no ()+ or -() seen yet */
+
+      if (q > p + 3 && *q == '+' && q[-1] == ')')
+	{
+	  sign = 1;		/* we saw a ")+" */
+	  q--;			/* q points to ')' */
+	}
+
+      if (*q == ')' && q > p + 2)
+	{
+	  paren = TRUE;		/* assume we have "(...)" */
+	  while (q >= p && *q != '(')
+	    q--;
+	  /* either q<p or we got matching '(' */
+	  if (q < p)
+	    err = "no '(' to match ')'";
+	  else
+	    {
+	      /*
+	       * Confusers like "()" will eventually lose with a bad register
+	       * name error. So again we don't need to check for early '\0'.
+	       */
+	      if (q[3] == ')')
+		reg = vax_reg_parse (q[1], q[2], 0);
+	      else if (q[4] == ')')
+		reg = vax_reg_parse (q[1], q[2], q[3]);
+	      else
+		reg = -1;
+	      /*
+	       * Since we saw a ')' we will demand a register name in the ')'.
+	       * This is nasty: why can't our hypothetical assembler permit
+	       * parenthesised expressions? BECAUSE I AM LAZY! That is why.
+	       * Abuse luser if we didn't spy a register name.
+	       */
+	      if (reg < 0)
+		{
+		  /* JF allow parenthasized expressions.  I hope this works */
+		  paren = FALSE;
+		  while (*q != ')')
+		    q++;
+		  /* err = "unknown register in ()"; */
+		}
+	      else
+		q--;		/* point just before '(' of "(...)" */
+	      /*
+	       * If err == "..." then we lost. Run away.
+	       * Otherwise if reg >= 0 then we saw (Rn).
+	       */
+	    }
+	  /*
+	   * If err == "..." then we lost.
+	   * Otherwise paren==TRUE and reg = register in "()".
+	   */
+	}
+      else
+	paren = FALSE;
+      /*
+       * If err == "..." then we lost.
+       * Otherwise, q points just before "(Rn)", if any.
+       * If there was a "(...)" then paren==TRUE, and reg is the register.
+       */
+
+      /*
+       * We should only seek '-' of "-(...)" if:
+       *   we saw "(...)"                    paren == TRUE
+       *   we have no errors so far          ! *err
+       *   we did not see '+' of "(...)+"    sign < 1
+       * We don't check len. We want a specific error message later if
+       * user tries "x^...-(Rn)". This is a feature not a bug.
+       */
+      if (!*err)
+	{
+	  if (paren && sign < 1)/* !sign is adequate test */
+	    {
+	      if (*q == '-')
+		{
+		  sign = -1;
+		  q--;
+		}
+	    }
+	  /*
+	   * We have back-tracked over most
+	   * of the crud at the end of an operand.
+	   * Unless err, we know: sign, paren. If paren, we know reg.
+	   * The last case is of an expression "Rn".
+	   * This is worth hunting for if !err, !paren.
+	   * We wouldn't be here if err.
+	   * We remember to save q, in case we didn't want "Rn" anyway.
+	   */
+	  if (!paren)
+	    {
+	      if (*q == ' ' && q >= p)	/* Expect all whitespace reduced to ' '. */
+		q--;
+	      /* reverse over whitespace, but don't */
+	      /* run back over *p */
+	      if (q > p && q < p + 3)	/* room for Rn or Rnn exactly? */
+		reg = vax_reg_parse (p[0], p[1], q < p + 2 ? 0 : p[2]);
+	      else
+		reg = -1;	/* always comes here if no register at all */
+	      /*
+	       * Here with a definitive reg value.
+	       */
+	      if (reg >= 0)
+		{
+		  oldq = q;
+		  q = p - 1;
+		}
+	    }
+	}
+    }
+  /*
+   * have reg. -1:absent; else 0:15
+   */
+
+  /*
+   * We have:  err, at, len, hash, ndx, sign, paren, reg.
+   * Also, any remaining expression is from *p through *q inclusive.
+   * Should there be no expression, q==p-1. So expression length = q-p+1.
+   * This completes the first part: parsing the operand text.
+   */
+
+  /*
+   * We now want to boil the data down, checking consistency on the way.
+   * We want:  len, mode, reg, ndx, err, p, q, wrn, bug.
+   * We will deliver a 4-bit reg, and a 4-bit mode.
+   */
+
+  /*
+   * Case of branch operand. Different. No L^B^W^I^S^ allowed for instance.
+   *
+   * in:  at	?
+   *      len	?
+   *      hash	?
+   *      p:q	?
+   *      sign  ?
+   *      paren	?
+   *      reg   ?
+   *      ndx   ?
+   *
+   * out: mode  0
+   *      reg   -1
+   *      len	' '
+   *      p:q	whatever was input
+   *      ndx	-1
+   *      err	" "		 or error message, and other outputs trashed
+   */
+  /* branch operands have restricted forms */
+  if (!*err && access == 'b')
+    {
+      if (at || hash || sign || paren || ndx >= 0 || reg >= 0 || len != ' ')
+	err = "invalid branch operand";
+      else
+	err = " ";
+    }
+
+/* Since nobody seems to use it: comment this 'feature'(?) out for now. */
+#ifdef NEVER
+  /*
+   * Case of stand-alone operand. e.g. ".long foo"
+   *
+   * in:  at	?
+   *      len	?
+   *      hash	?
+   *      p:q	?
+   *      sign  ?
+   *      paren	?
+   *      reg   ?
+   *      ndx   ?
+   *
+   * out: mode  0
+   *      reg   -1
+   *      len	' '
+   *      p:q	whatever was input
+   *      ndx	-1
+   *      err	" "		 or error message, and other outputs trashed
+   */
+  if (!*err)
+    {
+      if (access == ' ')
+	{			/* addresses have restricted forms */
+	  if (at)
+	    err = "address prohibits @";
+	  else
+	    {
+	      if (hash)
+		err = "address prohibits #";
+	      else
+		{
+		  if (sign)
+		    {
+		      if (sign < 0)
+			err = "address prohibits -()";
+		      else
+			err = "address prohibits ()+";
+		    }
+		  else
+		    {
+		      if (paren)
+			err = "address prohibits ()";
+		      else
+			{
+			  if (ndx >= 0)
+			    err = "address prohibits []";
+			  else
+			    {
+			      if (reg >= 0)
+				err = "address prohibits register";
+			      else
+				{
+				  if (len != ' ')
+				    err = "address prohibits displacement length specifier";
+				  else
+				    {
+				      err = " ";	/* succeed */
+				      mode = 0;
+				    }
+				}
+			    }
+			}
+		    }
+		}
+	    }
+	}
+    }
+#endif /*#Ifdef NEVER*/
+
+  /*
+   * Case of S^#.
+   *
+   * in:  at       FALSE
+   *      len      's'               definition
+   *      hash     TRUE              demand
+   *      p:q                        demand not empty
+   *      sign     0                 by paren==FALSE
+   *      paren    FALSE             by "()" scan logic because "S^" seen
+   *      reg      -1                or nn by mistake
+   *      ndx      -1
+   *
+   * out: mode     0
+   *      reg      -1
+   *      len      's'
+   *      exp
+   *      ndx      -1
+   */
+  if (!*err && len == 's')
+    {
+      if (!hash || paren || at || ndx >= 0)
+	err = "invalid operand of S^#";
+      else
+	{
+	  if (reg >= 0)
+	    {
+	      /*
+	       * SHIT! we saw S^#Rnn ! put the Rnn back in
+	       * expression. KLUDGE! Use oldq so we don't
+	       * need to know exact length of reg name.
+	       */
+	      q = oldq;
+	      reg = 0;
+	    }
+	  /*
+	   * We have all the expression we will ever get.
+	   */
+	  if (p > q)
+	    err = "S^# needs expression";
+	  else if (access == 'r')
+	    {
+	      err = " ";	/* WIN! */
+	      mode = 0;
+	    }
+	  else
+	    err = "S^# may only read-access";
+	}
+    }
+
+  /*
+   * Case of -(Rn), which is weird case.
+   *
+   * in:  at       FALSE
+   *      len      '
+   *      hash     FALSE
+   *      p:q      q<p
+   *      sign     -1                by definition
+   *      paren    TRUE              by definition
+   *      reg      present           by definition
+   *      ndx      optional
+   *
+   * out: mode     7
+   *      reg      present
+   *      len      ' '
+   *      exp      ""                enforce empty expression
+   *      ndx      optional          warn if same as reg
+   */
+  if (!*err && sign < 0)
+    {
+      if (len != ' ' || hash || at || p <= q)
+	err = "invalid operand of -()";
+      else
+	{
+	  err = " ";		/* win */
+	  mode = 7;
+	  if (reg == PC)
+	    wrn = "-(PC) unpredictable";
+	  else if (reg == ndx)
+	    wrn = "[]index same as -()register: unpredictable";
+	}
+    }
+
+  /*
+   * We convert "(Rn)" to "@Rn" for our convenience.
+   * (I hope this is convenient: has someone got a better way to parse this?)
+   * A side-effect of this is that "@Rn" is a valid operand.
+   */
+  if (paren && !sign && !hash && !at && len == ' ' && p > q)
+    {
+      at = TRUE;
+      paren = FALSE;
+    }
+
+  /*
+   * Case of (Rn)+, which is slightly different.
+   *
+   * in:  at
+   *      len      ' '
+   *      hash     FALSE
+   *      p:q      q<p
+   *      sign     +1                by definition
+   *      paren    TRUE              by definition
+   *      reg      present           by definition
+   *      ndx      optional
+   *
+   * out: mode     8+@
+   *      reg      present
+   *      len      ' '
+   *      exp      ""                enforce empty expression
+   *      ndx      optional          warn if same as reg
+   */
+  if (!*err && sign > 0)
+    {
+      if (len != ' ' || hash || p <= q)
+	err = "invalid operand of ()+";
+      else
+	{
+	  err = " ";		/* win */
+	  mode = 8 + (at ? 1 : 0);
+	  if (reg == PC)
+	    wrn = "(PC)+ unpredictable";
+	  else if (reg == ndx)
+	    wrn = "[]index same as ()+register: unpredictable";
+	}
+    }
+
+  /*
+   * Case of #, without S^.
+   *
+   * in:  at
+   *      len      ' ' or 'i'
+   *      hash     TRUE              by definition
+   *      p:q
+   *      sign     0
+   *      paren    FALSE
+   *      reg      absent
+   *      ndx      optional
+   *
+   * out: mode     8+@
+   *      reg      PC
+   *      len      ' ' or 'i'
+   *      exp
+   *      ndx      optional
+   */
+  if (!*err && hash)
+    {
+      if (len != 'i' && len != ' ')
+	err = "# conflicts length";
+      else if (paren)
+	err = "# bars register";
+      else
+	{
+	  if (reg >= 0)
+	    {
+	      /*
+	      * SHIT! we saw #Rnn! Put the Rnn back into the expression.
+	      * By using oldq, we don't need to know how long Rnn was.
+	      * KLUDGE!
+	      */
+	      q = oldq;
+	      reg = -1;		/* no register any more */
+	    }
+	  err = " ";		/* win */
+
+		/* JF a bugfix, I think! */
+	  if(at && access=='a')
+	    vopP->vop_nbytes=4;
+
+	  mode = (at ? 9 : 8);
+	  reg = PC;
+	  if ((access == 'm' || access == 'w') && !at)
+	    wrn = "writing or modifying # is unpredictable";
+	}
+    }
+  /*
+   * If !*err, then        sign == 0
+   *                       hash == FALSE
+   */
+
+  /*
+   * Case of Rn. We seperate this one because it has a few special
+   * errors the remaining modes lack.
+   *
+   * in:  at       optional
+   *      len      ' '
+   *      hash     FALSE             by program logic
+   *      p:q      empty
+   *      sign     0                 by program logic
+   *      paren    FALSE             by definition
+   *      reg      present           by definition
+   *      ndx      optional
+   *
+   * out: mode     5+@
+   *      reg      present
+   *      len      ' '               enforce no length
+   *      exp      ""                enforce empty expression
+   *      ndx      optional          warn if same as reg
+   */
+  if (!*err && !paren && reg >= 0)
+    {
+      if (len != ' ')
+	err = "length not needed";
+      else if (at)
+	{
+	  err = " ";		/* win */
+	  mode = 6;		/* @Rn */
+	}
+      else if (ndx >= 0)
+	err = "can't []index a register, because it has no address";
+      else if (access == 'a')
+	err = "a register has no address";
+      else
+	{
+	  /*
+	  * Idea here is to detect from length of datum
+	  * and from register number if we will touch PC.
+	  * Warn if we do.
+	  * vop_nbytes is number of bytes in operand.
+	  * Compute highest byte affected, compare to PC0.
+	  */
+	  if ((vopP->vop_nbytes + reg * 4) > 60)
+	    wrn = "PC part of operand unpredictable";
+	  err = " ";		/* win */
+	  mode = 5;		/* Rn */
+	}
+    }
+  /*
+   * If !*err,        sign  == 0
+   *                  hash  == FALSE
+   *                  paren == TRUE  OR reg==-1
+   */
+
+  /*
+   * Rest of cases fit into one bunch.
+   *
+   * in:  at       optional
+   *      len      ' ' or 'b' or 'w' or 'l'
+   *      hash     FALSE             by program logic
+   *      p:q      expected          (empty is not an error)
+   *      sign     0                 by program logic
+   *      paren    optional
+   *      reg      optional
+   *      ndx      optional
+   *
+   * out: mode     10 + @ + len
+   *      reg      optional
+   *      len      ' ' or 'b' or 'w' or 'l'
+   *      exp                        maybe empty
+   *      ndx      optional          warn if same as reg
+   */
+  if (!*err)
+    {
+      err = " ";		/* win (always) */
+      mode = 10 + (at ? 1 : 0);
+      switch (len)
+	{
+	case 'l':
+	  mode += 2;
+	case 'w':
+	  mode += 2;
+	case ' ':		/* assumed B^ until our caller changes it */
+	case 'b':
+	  break;
+	}
+    }
+
+  /*
+   * here with completely specified     mode
+   *					len
+   *					reg
+   *					expression   p,q
+   *					ndx
+   */
+
+  if (*err == ' ')
+    err = "";			/* " " is no longer an error */
+
+  vopP->vop_mode = mode;
+  vopP->vop_reg = reg;
+  vopP->vop_short = len;
+  vopP->vop_expr_begin = p;
+  vopP->vop_expr_end = q;
+  vopP->vop_ndx = ndx;
+  vopP->vop_error = err;
+  vopP->vop_warn = wrn;
+  return (bug);
+
+}				/* vip_op() */
+
+/*
+
+Summary of vip_op outputs.
+
+			mode	reg	len	ndx
+(Rn) => @Rn
+{@}Rn			5+@	n	' '	optional
+branch operand		0	-1	' '	-1
+S^#foo			0	-1	's'	-1
+-(Rn)			7	n	' '	optional
+{@}(Rn)+		8+@	n	' '	optional
+{@}#foo, no S^		8+@	PC	" i"	optional
+{@}{q^}{(Rn)}		10+@+q	option	" bwl"	optional
+
+*/
+
+#ifdef TEST			/* #Define to use this testbed. */
+
+/*
+ * Follows a test program for this function.
+ * We declare arrays non-local in case some of our tiny-minded machines
+ * default to small stacks. Also, helps with some debuggers.
+ */
+
+#include <stdio.h>
+
+char answer[100];		/* human types into here */
+char *p;			/*  */
+char *myerr;
+char *mywrn;
+char *mybug;
+char myaccess;
+char mywidth;
+char mymode;
+char myreg;
+char mylen;
+char *myleft;
+char *myright;
+char myndx;
+int my_operand_length;
+char my_immediate[200];
+char my_indirect[200];
+char my_displen[200];
+
+main ()
+{
+  char *vip_op ();		/* make cc happy */
+
+  printf ("enter immediate symbols eg enter #   ");
+  gets (my_immediate);
+  printf ("enter indirect symbols  eg enter @   ");
+  gets (my_indirect);
+  printf ("enter displen symbols   eg enter ^   ");
+  gets (my_displen);
+  vip_op_defaults (my_immediate, my_indirect, my_displen);
+  for (;;)
+    {
+      printf ("access,width (eg 'ab' or 'wh') [empty line to quit] :  ");
+      fflush (stdout);
+      gets (answer);
+      if (!answer[0])
+	exit (0);
+      myaccess = answer[0];
+      mywidth = answer[1];
+      switch (mywidth)
+	{
+	case 'b':
+	  my_operand_length = 1;
+	  break;
+	case 'd':
+	  my_operand_length = 8;
+	  break;
+	case 'f':
+	  my_operand_length = 4;
+	  break;
+	case 'g':
+	  my_operand_length = 16;
+	  break;
+	case 'h':
+	  my_operand_length = 32;
+	  break;
+	case 'l':
+	  my_operand_length = 4;
+	  break;
+	case 'o':
+	  my_operand_length = 16;
+	  break;
+	case 'q':
+	  my_operand_length = 8;
+	  break;
+	case 'w':
+	  my_operand_length = 2;
+	  break;
+	case '!':
+	case '?':
+	case '-':
+	  my_operand_length = 0;
+	  break;
+
+	default:
+	  my_operand_length = 2;
+	  printf ("I dn't understand access width %c\n", mywidth);
+	  break;
+	}
+      printf ("VAX assembler instruction operand: ");
+      fflush (stdout);
+      gets (answer);
+      mybug = vip_op (answer, myaccess, mywidth, my_operand_length,
+		      &mymode, &myreg, &mylen, &myleft, &myright, &myndx,
+		      &myerr, &mywrn);
+      if (*myerr)
+	{
+	  printf ("error: \"%s\"\n", myerr);
+	  if (*mybug)
+	    printf (" bug: \"%s\"\n", mybug);
+	}
+      else
+	{
+	  if (*mywrn)
+	    printf ("warning: \"%s\"\n", mywrn);
+	  mumble ("mode", mymode);
+	  mumble ("register", myreg);
+	  mumble ("index", myndx);
+	  printf ("width:'%c'  ", mylen);
+	  printf ("expression: \"");
+	  while (myleft <= myright)
+	    putchar (*myleft++);
+	  printf ("\"\n");
+	}
+    }
+}
+
+mumble (text, value)
+     char *text;
+     int value;
+{
+  printf ("%s:", text);
+  if (value >= 0)
+    printf ("%xx", value);
+  else
+    printf ("ABSENT");
+  printf ("  ");
+}
+
+#endif /* ifdef TEST */
+
+/* end: vip_op.c */
+
+const int md_short_jump_size = 3;
+const int md_long_jump_size = 6;
+const int md_reloc_size = 8;		/* Size of relocation record */
+
+void
+md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
+     char *ptr;
+     long from_addr, to_addr;
+     fragS *frag;
+     symbolS *to_symbol;
+{
+  long offset;
+
+  offset = to_addr - (from_addr + 1);
+  *ptr++ = 0x31;
+  md_number_to_chars (ptr, offset, 2);
+}
+
+void
+md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
+     char *ptr;
+     long from_addr, to_addr;
+     fragS *frag;
+     symbolS *to_symbol;
+{
+  long offset;
+
+  offset = to_addr - to_symbol->sy_value;
+  *ptr++ = 0x17;
+  *ptr++ = 0x9F;
+  md_number_to_chars (ptr, offset, 4);
+  fix_new (frag, ptr - frag->fr_literal, 4, to_symbol, (symbolS *) 0, (long) 0, 0);
+}
+
+int
+md_parse_option (argP, cntP, vecP)
+     char **argP;
+     int *cntP;
+     char ***vecP;
+{
+  char *temp_name;		/* name for -t or -d options */
+  char opt;
+
+  switch (**argP)
+    {
+    case 'J':
+      /* as_warn ("I can do better than -J!"); */
+      break;
+
+    case 'S':
+      as_warn ("SYMBOL TABLE not implemented");
+      break;			/* SYMBOL TABLE not implemented */
+
+    case 'T':
+      as_warn ("TOKEN TRACE not implemented");
+      break;			/* TOKEN TRACE not implemented */
+
+    case 'd':
+    case 't':
+      opt= **argP;
+      if (**argP)
+	{			/* Rest of argument is filename. */
+	  temp_name = *argP;
+	  while (**argP)
+	    (*argP)++;
+	}
+      else if (*cntP)
+	{
+	  while (**argP)
+	    (*argP)++;
+	  --(*cntP);
+	  temp_name = *++(*vecP);
+	  **vecP = NULL;	/* Remember this is not a file-name. */
+	}
+      else
+	{
+	  as_warn ("I expected a filename after -%c.",opt);
+	  temp_name = "{absent}";
+	}
+
+      if(opt=='d')
+	as_warn ("Displacement length %s ignored!", temp_name);
+      else
+	as_warn ("I don't need or use temp. file \"%s\".", temp_name);
+      break;
+
+    case 'V':
+      as_warn ("I don't use an interpass file! -V ignored");
+      break;
+
+#ifdef VMS
+    case '+':	/* For g++ */
+      break;
+
+    case 'h':	/* No hashing of mixed-case names */
+      break;
+
+    case 'H':	/* Show new symbol after hash truncation */
+      break;
+#endif
+
+    default:
+      return 0;
+
+    }
+  return 1;
+}
+
+/* We have no need to default values of symbols.  */
+
+/* ARGSUSED */
+symbolS *
+md_undefined_symbol (name)
+     char *name;
+{
+  return 0;
+}
+
+/* Parse an operand that is machine-specific.  
+   We just return without modifying the expression if we have nothing
+   to do.  */
+
+/* ARGSUSED */
+void
+md_operand (expressionP)
+     expressionS *expressionP;
+{
+}
+
+/* Round up a section size to the appropriate boundary.  */
+long
+md_section_align (segment, size)
+     segT segment;
+     long size;
+{
+  return size;		/* Byte alignment is fine */
+}
+
+/* Exactly what point is a PC-relative offset relative TO?
+   On the vax, they're relative to the address of the offset, plus
+   its size. (??? Is this right?  FIXME-SOON) */
+long
+md_pcrel_from (fixP)
+     fixS *fixP;
+{
+  return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
+}
diff --git a/gas/config/tc-vax.h b/gas/config/tc-vax.h
new file mode 100644
index 0000000..0097782
--- /dev/null
+++ b/gas/config/tc-vax.h
@@ -0,0 +1,14 @@
+/*
+ * This file is tc-vax.h.
+ */
+
+#define TC_VAX 1
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of tc-vax.h */
diff --git a/gas/config/te-generic.h b/gas/config/te-generic.h
new file mode 100644
index 0000000..4b40d61
--- /dev/null
+++ b/gas/config/te-generic.h
@@ -0,0 +1,18 @@
+/*
+ * This file is te-generic.h and is intended to be a template for
+ * target environment specific header files.
+ */
+
+#define TE_GENERIC 1
+
+ /* these define interfaces */
+#include "obj-format.h"
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of te-generic.h */
diff --git a/gas/config/te-ic960.h b/gas/config/te-ic960.h
new file mode 100644
index 0000000..15c3064
--- /dev/null
+++ b/gas/config/te-ic960.h
@@ -0,0 +1,28 @@
+/*
+ * This file is te-ic960.h and is intended to define ic960 environment
+ * specific differences.
+ */
+
+/* $Id$ */
+
+#define TE_IC960 1
+
+ /* intel uses host byte order for headers */
+#ifdef CROSS_ASSEMBLE
+#undef CROSS_ASSEMBLE
+#endif /* CROSS_ASSEMBLE */
+
+#define OBJ_COFF_OMIT_OPTIONAL_HEADER
+#define LOCAL_LABEL(name) ( (name[0] =='L') \
+			  || (name[0] =='.' \
+			     && (name[1]=='C' || name[1]=='I' || name[1]=='.')))
+#include "obj-format.h"
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of te-ic960.h */
diff --git a/gas/config/te-sun3.h b/gas/config/te-sun3.h
new file mode 100644
index 0000000..9d1ece4
--- /dev/null
+++ b/gas/config/te-sun3.h
@@ -0,0 +1,48 @@
+/* te-sun3.h -- Sun-3 target environment declarations.
+   Copyright (C) 1987, 1990, 1991 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/* $Id$ */
+
+/* This header file contains the #defines specific
+   to SUN computer SUN 3 series computers.  (The only kind
+   we have around here, unfortunatly.)
+   
+   Rumor has it that this file will work on the Sun-2 if the assembler
+   is called with -m68010  This is not tested.  */
+
+
+#define TE_SUN3	1
+#define SUN_ASM_SYNTAX
+
+/* Could also be :
+#define S_LOCAL_NAME(s)	(S_GET_NAME(s)[0] == '.' &&
+				 S_GET_NAME(s)[1] == 'L' || 
+				 S_GET_NAME(s)[1] == '.')
+*/
+
+#include "obj-format.h"
+
+/*
+ * Local Variables:
+ * comment-column: 0
+ * fill-column: 131
+ * End:
+ */
+
+/* end of te-sun3.h */
diff --git a/gas/config/vax-inst.h b/gas/config/vax-inst.h
new file mode 100644
index 0000000..51b7c94
--- /dev/null
+++ b/gas/config/vax-inst.h
@@ -0,0 +1,77 @@
+/* vax-inst.h - GNU - Part of vax.c
+   Copyright (C) 1987 Free Software Foundation, Inc.
+
+This file is part of GAS, the GNU Assembler.
+
+GAS is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GAS is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GAS; see the file COPYING.  If not, write to
+the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+/*
+ * This is part of vax-ins-parse.c & friends.
+ * We want to parse a vax instruction text into a tree defined here.
+ */
+
+#define VIT_MAX_OPERANDS (6)	/* maximum number of operands in one       */
+				/* single vax instruction                  */
+
+struct vop			/* vax instruction operand                 */
+{
+  short int	vop_ndx;	/* -1, or index register. eg 7=[R7]	   */
+  short int	vop_reg;	/* -1, or register number. eg @I^#=0xF     */
+				/* Helps distinguish "abs" from "abs(PC)". */
+  short int	vop_mode;	/* addressing mode 4 bits. eg I^#=0x9	   */
+  char		vop_short;	/* operand displacement length as written  */
+				/* ' '=none, "bilsw"=B^I^L^S^W^.           */
+  char		vop_access;	/* 'b'branch ' 'no-instruction 'amrvw'norm */
+  char		vop_width;	/* Operand width, one of "bdfghloqw"	   */
+  char *	vop_warn;	/* warning message of this operand, if any */
+  char *        vop_error;	/* say if operand is inappropriate         */
+  char *	vop_expr_begin;	/* Unparsed expression, 1st char ...	   */
+  char *	vop_expr_end;	/* ... last char.			   */
+  unsigned char	vop_nbytes;	/* number of bytes in datum		   */
+};
+
+
+typedef long vax_opcodeT;	/* For initialising array of opcodes	   */
+				/* Some synthetic opcodes > 16 bits!       */
+
+#define VIT_OPCODE_SYNTHETIC 0x80000000	/* Not real hardware instruction.  */
+#define VIT_OPCODE_SPECIAL   0x40000000	/* Not normal branch optimising.   */
+					/* Never set without ..._SYNTHETIC */
+
+#define VAX_WIDTH_UNCONDITIONAL_JUMP '-' /* These are encoded into         */
+#define VAX_WIDTH_CONDITIONAL_JUMP   '?' /* vop_width when vop_access=='b' */
+#define VAX_WIDTH_WORD_JUMP          '!' /* and VIT_OPCODE_SYNTHETIC set.  */
+#define VAX_WIDTH_BYTE_JUMP	     ':' /*                                */
+
+#define VAX_JMP (0x17)		/* Useful for branch optimising. Jump instr*/
+#define VAX_PC_RELATIVE_MODE (0xef) /* Use it after VAX_JMP		   */
+#define VAX_ABSOLUTE_MODE (0x9F) /* Use as @#...			   */
+#define VAX_BRB (0x11)		/* Canonical branch.			   */
+#define VAX_BRW (0x31)		/* Another canonical branch		   */
+#define VAX_WIDEN_WORD (0x20)	/* Add this to byte branch to get word br. */
+#define VAX_WIDEN_LONG (0x6)	/* Add this to byte branch to get long jmp.*/
+				/* Needs VAX_PC_RELATIVE_MODE byte after it*/
+
+struct vit			/* vax instruction tree                    */
+{
+				/* vit_opcode is char[] for portability.   */
+  char		   vit_opcode [ sizeof (vax_opcodeT) ];
+  unsigned char    vit_opcode_nbytes; /* How long is _opcode? (chars)	   */
+  unsigned char    vit_operands;/*					   */
+  struct vop       vit_operand[VIT_MAX_OPERANDS];  /* operands             */
+  char *	   vit_error;	/* "" or error text */
+};
+
+/* end: vax-inst.h */