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authorJan Beulich <jbeulich@novell.com>2018-04-26 08:29:09 +0200
committerJan Beulich <jbeulich@suse.com>2018-04-26 08:29:09 +0200
commitdcd7e323760ab296262a2e18e9869d37ff59f340 (patch)
treee99379f41e148453d0633a481b70a1cd94aa16e5 /gas/config
parent6b8d358865b10f3f8269d0d89ece1b19b114be0d (diff)
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x86: tighten assertion in build_modrm_byte()
All VEX3SOURCES cases should have VexW set, and all should have a SIMD register destination.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-i386.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 014720e..7126ca4 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6591,10 +6591,9 @@ build_modrm_byte (void)
&& i.tm.opcode_modifier.vexvvvv == VEXXDS
&& (i.tm.opcode_modifier.veximmext
|| (i.imm_operands == 1
- && i.types[0].bitfield.vec_imm4
- && (i.tm.opcode_modifier.vexw == VEXW0
- || i.tm.opcode_modifier.vexw == VEXW1)
- && i.tm.operand_types[dest].bitfield.regsimd)));
+ && i.types[0].bitfield.vec_imm4))
+ && i.tm.opcode_modifier.vexw
+ && i.tm.operand_types[dest].bitfield.regsimd);
if (i.imm_operands == 0)
{