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authorEric Christopher <echristo@gmail.com>2001-08-31 21:06:40 +0000
committerEric Christopher <echristo@gmail.com>2001-08-31 21:06:40 +0000
commit3c02b2abd682691244e6e039c5e232a506038142 (patch)
tree5961f2b313c7e888c9f4103a6b5f1d033c66716a /gas/config
parent5bd67f350dcfb169f7bf90c2e9fa94f4131a9d77 (diff)
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2001-08-31 Eric Christopher <echristo@redhat.com>
Jason Eckhardt <jle@redhat.com> * config/tc-mips.c (mips_cpu_info): Add support for mipsisa32, 5kc, and 20kc. Clean up old entries.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-mips.c27
1 files changed, 10 insertions, 17 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 906641d..8057de9 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -9372,7 +9372,6 @@ MIPS options:\n\
show (stream, "8000", &column, &first);
show (stream, "10000", &column, &first);
show (stream, "12000", &column, &first);
- show (stream, "mips32-4k", &column, &first);
show (stream, "sb-1", &column, &first);
fputc ('\n', stream);
@@ -12068,17 +12067,20 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
/* MIPS32 ISA */
{ "MIPS32", 1, ISA_MIPS32, CPU_MIPS32, },
+ { "mipsisa32", 0, ISA_MIPS32, CPU_MIPS32, },
{ "Generic-MIPS32", 0, ISA_MIPS32, CPU_MIPS32, },
+ { "4kc", 0, ISA_MIPS32, CPU_MIPS32, },
+ { "4km", 0, ISA_MIPS32, CPU_MIPS32, },
+ { "4kp", 0, ISA_MIPS32, CPU_MIPS32, },
+
+ /* For historical reasons. */
+ { "MIPS64", 1, ISA_MIPS3, CPU_R4000, },
-#if 1
- /* XXX for now, MIPS64 -> MIPS3 because of history */
- { "MIPS64", 1, ISA_MIPS3, CPU_R4000 }, /* XXX! */
-#else
/* MIPS64 ISA */
- { "MIPS64", 1, ISA_MIPS64, CPU_MIPS64 },
-#endif
- { "mips64isa", 1, ISA_MIPS64, CPU_MIPS64 },
+ { "mipsisa64", 1, ISA_MIPS64, CPU_MIPS64, },
{ "Generic-MIPS64", 0, ISA_MIPS64, CPU_MIPS64, },
+ { "5kc", 0, ISA_MIPS64, CPU_MIPS64, },
+ { "20kc", 0, ISA_MIPS64, CPU_MIPS64, },
/* R2000 CPU */
{ "R2000", 0, ISA_MIPS1, CPU_R2000, },
@@ -12182,15 +12184,6 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
{ "r5k", 0, ISA_MIPS4, CPU_R5000, },
{ "r7000", 0, ISA_MIPS4, CPU_R5000, },
- /* MIPS32 4K CPU */
- { "MIPS32-4K", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "4kc", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "4km", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "4kp", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "mips32-4kc", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "mips32-4km", 0, ISA_MIPS32, CPU_MIPS32_4K, },
- { "mips32-4kp", 0, ISA_MIPS32, CPU_MIPS32_4K, },
-
/* SiByte SB-1 CPU */
{ "SB-1", 0, ISA_MIPS64, CPU_SB1, },
{ "sb-1250", 0, ISA_MIPS64, CPU_SB1, },