2000-08-05 Kazu Hirata <kazu@hxi.com>

	* config/tc-cris.c: Fix formatting.
	* config/tc-i386.c: Likewise.
	* config/tc-sparc.c (sparc_ip): Simplify the code.

3 files changed, 729 insertions, 746 deletions

diff --git a/gas/config/tc-cris.c b/gas/config/tc-cris.c
index 20ce137b..4d21a82 100644
--- a/gas/config/tc-cris.c
+++ b/gas/config/tc-cris.c
@@ -20,7 +20,7 @@
    You should have received a copy of the GNU General Public License
    along with GAS; see the file COPYING.  If not, write to the
    Free Software Foundation, 59 Temple Place - Suite 330, Boston,
-   MA 02111-1307, USA.	*/
+   MA 02111-1307, USA.  */
 
 #include <stdio.h>
 #include <ctype.h>
@@ -56,12 +56,12 @@ enum prefix_kind
 /* The prefix for an instruction.  */
 struct cris_prefix
 {
-  enum prefix_kind	   kind;
-  int			   base_reg_number;
-  unsigned int		   opcode;
+  enum prefix_kind kind;
+  int base_reg_number;
+  unsigned int opcode;
 
   /* There might be an expression to be evaluated, like I in [rN+I].  */
-  expressionS		   expr;
+  expressionS expr;
 
   /* If there's an expression, we might need a relocation.  Here's the
      type of what relocation to start relaxaton with.
@@ -70,29 +70,29 @@ struct cris_prefix
   enum bfd_reloc_code_real reloc;
 };
 
-/* The description of the instruction being assembled.	*/
+/* The description of the instruction being assembled.  */
 struct cris_instruction
 {
   /* If CRIS_INSN_NONE, then this insn is of zero length.  */
-  enum cris_insn_kind	     insn_type;
+  enum cris_insn_kind insn_type;
 
   /* If a special register was mentioned, this is its description, else
-     it is NULL. */
+     it is NULL.  */
   const struct cris_spec_reg *spec_reg;
 
-  unsigned int		     opcode;
+  unsigned int opcode;
 
   /* An insn may have at most one expression; theoretically there could be
-     another in its prefix (but I don't see how that could happen). */
-  expressionS		     expr;
+     another in its prefix (but I don't see how that could happen).  */
+  expressionS expr;
 
   /* The expression might need a relocation.  Here's one to start
      relaxation with.  */
-  enum bfd_reloc_code_real   reloc;
+  enum bfd_reloc_code_real reloc;
 
   /* The size in bytes of an immediate expression, or zero in
      nonapplicable.  */
-  int			     imm_oprnd_size;
+  int imm_oprnd_size;
 };
 
 static void cris_process_instruction PARAMS ((char *,
@@ -133,11 +133,11 @@ const char cris_comment_chars[] = ";";
 
 /* This array holds the chars that only start a comment at the beginning of
    a line.  If the line seems to have the form '# 123 filename'
-   .line and .file directives will appear in the pre-processed output */
+   .line and .file directives will appear in the pre-processed output.  */
 /* Note that input_file.c hand-checks for '#' at the beginning of the
    first line of the input file.  This is because the compiler outputs
-   #NO_APP at the beginning of its output. */
-/* Also note that slash-star will always start a comment */
+   #NO_APP at the beginning of its output.  */
+/* Also note that slash-star will always start a comment.  */
 const char line_comment_chars[] = "#";
 const char line_separator_chars[] = "@";
 
@@ -145,7 +145,6 @@ const char line_separator_chars[] = "@";
 const char EXP_CHARS[] = "";
 const char FLT_CHARS[] = "";
 
-
 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
 		       2		 1		   0
       ---/ /--+-----------------+-----------------+-----------------+
@@ -162,7 +161,7 @@ const char FLT_CHARS[] = "";
       length: byte, word, 10-byte expansion
 
    2. BDAP
-      length: byte, word, dword */
+      length: byte, word, dword  */
 
 #define STATE_CONDITIONAL_BRANCH    (1)
 #define STATE_BASE_PLUS_DISP_PREFIX (2)
@@ -175,15 +174,14 @@ const char FLT_CHARS[] = "";
 #define STATE_UNDF		    (3)
 #define STATE_MAX_LENGTH	    (3)
 
-
 /* These displacements are relative to the adress following the opcode
    word of the instruction.  The first letter is Byte, Word.  The 2nd
    letter is Forward, Backward.  */
 
 #define BRANCH_BF ( 254)
 #define BRANCH_BB (-256)
-#define BRANCH_WF (2+ 32767)
-#define BRANCH_WB (2+-32768)
+#define BRANCH_WF (2 +  32767)
+#define BRANCH_WB (2 + -32768)
 
 #define BDAP_BF	  ( 127)
 #define BDAP_BB	  (-128)
@@ -209,7 +207,7 @@ const relax_typeS md_cris_relax_table[] =
   /* Bcc o (1, 0).  */
   {BRANCH_BF, BRANCH_BB, 0,  ENCODE_RELAX (1, 1)},
 
-  /* Bcc [PC+] (1, 1).	*/
+  /* Bcc [PC+] (1, 1).  */
   {BRANCH_WF, BRANCH_WB, 2,  ENCODE_RELAX (1, 2)},
 
   /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
@@ -238,7 +236,6 @@ const relax_typeS md_cris_relax_table[] =
 #undef BDAP_WF
 #undef BDAP_WB
 
-
 /* Target-specific multicharacter options, not const-declared at usage
    in 2.9.1 and CVS of 2000-02-16.  */
 struct option md_longopts[] =
@@ -250,7 +247,6 @@ struct option md_longopts[] =
 size_t md_longopts_size = sizeof (md_longopts);
 const char *md_shortopts = "hHN";
 
-
 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
    since a short_jump must skip a *number* of long jumps, it must also be
    a long jump.  Here, we hope to make it a "ba [16bit_offs]" and a "nop"
@@ -264,8 +260,8 @@ const char *md_shortopts = "hHN";
 const int md_short_jump_size = 6;
 const int md_long_jump_size = 6;
 
-
 /* Report output format.  */
+
 const char *
 cris_target_format ()
 {
@@ -295,15 +291,15 @@ cris_target_format ()
    or fr_var contributes to our returned value.
 
    Although it may not be explicit in the frag, pretend
-   fr_var starts with a value.	*/
+   fr_var starts with a value.  */
 
 int
 md_estimate_size_before_relax (fragP, segment_type)
      fragS *fragP;
      /* The segment is either N_DATA or N_TEXT.  */
-     segT    segment_type;
+     segT segment_type;
 {
-  int	old_fr_fix;
+  int old_fr_fix;
 
   old_fr_fix = fragP->fr_fix;
 
@@ -327,7 +323,7 @@ md_estimate_size_before_relax (fragP, segment_type)
 	  fragP->fr_fix += 2 + 2 + 2 + 4;
 	  writep = fragP->fr_literal + old_fr_fix;
 	  gen_cond_branch_32 (fragP->fr_opcode, writep, fragP,
-			      fragP->fr_symbol, (symbolS *)NULL,
+			      fragP->fr_symbol, (symbolS *) NULL,
 			      fragP->fr_offset);
 	  frag_wane (fragP);
 	}
@@ -395,14 +391,14 @@ md_estimate_size_before_relax (fragP, segment_type)
 
 	      /* Modify the byte-offset BDAP into a word or dword offset
 		 BDAP.	Or really, a BDAP rX,8bit into a
-		 BDAP.[wd] rX,[PC+] followed by a and a word or dword.	*/
+		 BDAP.[wd] rX,[PC+] followed by a and a word or dword.  */
 	      (fragP->fr_opcode)[0] = BDAP_PC_LOW + pow2_of_size * 16;
 
 	      /* Keep the register number in the highest four bits.  */
 	      (fragP->fr_opcode)[1] &= 0xF0;
 	      (fragP->fr_opcode)[1] |= BDAP_INCR_HIGH;
 
-	      /* It grew by two or four bytes.	*/
+	      /* It grew by two or four bytes.  */
 	      fragP->fr_fix += 1 << pow2_of_size;
 	      writep = fragP->fr_literal + old_fr_fix;
 	      md_number_to_chars (writep, value, 1 << pow2_of_size);
@@ -418,7 +414,6 @@ md_estimate_size_before_relax (fragP, segment_type)
   return fragP->fr_var + (fragP->fr_fix - old_fr_fix);
 }
 
-
 /* Perform post-processing of machine-dependent frags after relaxation.
    Called after relaxation is finished.
    In:	Address of frag.
@@ -435,7 +430,7 @@ md_convert_frag (abfd, sec, fragP)
      segT sec ATTRIBUTE_UNUSED;
      fragS *fragP;
 {
-  /* Pointer to first byte in variable-sized part of the frag.	*/
+  /* Pointer to first byte in variable-sized part of the frag.  */
   char *var_partp;
 
   /* Pointer to first opcode byte in frag.  */
@@ -476,67 +471,66 @@ md_convert_frag (abfd, sec, fragP)
   address_of_var_part = fragP->fr_address + var_part_offset;
 
   switch (fragP->fr_subtype)
-  {
-  case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
-    opcodep[0] = branch_disp ((target_address - address_of_var_part));
-    var_part_size = 0;
-    break;
-
-  case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
-    /* We had a quick immediate branch, now turn it into a word one i.e. a
-       PC autoincrement.  */
-    opcodep[0] = BRANCH_PC_LOW;
-    opcodep[1] &= 0xF0;
-    opcodep[1] |= BRANCH_INCR_HIGH;
-    md_number_to_chars (var_partp,
-			(long) (target_address - (address_of_var_part + 2)),
-			2);
-    var_part_size = 2;
-    break;
-
-  case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD):
-    gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP,
-			fragP->fr_symbol, (symbolS *)NULL,
-			fragP->fr_offset);
-    /* Ten bytes added: a branch, nop and a jump.  */
-    var_part_size = 2 + 2 + 4 + 2;
-    break;
-
-  case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
-    var_partp[0] = target_address - (address_of_var_part + 1);
-    var_part_size = 0;
-    break;
-
-  case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
-    /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
-       one that uses PC autoincrement.	*/
-    opcodep[0] = BDAP_PC_LOW + (1 << 4);
-    opcodep[1] &= 0xF0;
-    opcodep[1] |= BDAP_INCR_HIGH;
-    md_number_to_chars (var_partp, (long)(target_address), 2);
-    var_part_size = 2;
-    break;
-
-  case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
-    /* We had a BDAP 16-bit "word", change the offset to a dword.  */
-    opcodep[0] = BDAP_PC_LOW + (2 << 4);
-    opcodep[1] &= 0xF0;
-    opcodep[1] |= BDAP_INCR_HIGH;
-    if (fragP->fr_symbol == NULL)
-      md_number_to_chars (var_partp, fragP->fr_offset, 4);
-    else
-      fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol,
-	       fragP->fr_offset, 0, BFD_RELOC_32);
-    var_part_size = 4;
-    break;
-
-  default:
-    BAD_CASE (fragP->fr_subtype);
-    break;
-  }
+    {
+    case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
+      opcodep[0] = branch_disp ((target_address - address_of_var_part));
+      var_part_size = 0;
+      break;
 
-  fragP->fr_fix += var_part_size;
+    case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
+      /* We had a quick immediate branch, now turn it into a word one i.e. a
+	 PC autoincrement.  */
+      opcodep[0] = BRANCH_PC_LOW;
+      opcodep[1] &= 0xF0;
+      opcodep[1] |= BRANCH_INCR_HIGH;
+      md_number_to_chars (var_partp,
+			  (long) (target_address - (address_of_var_part + 2)),
+			  2);
+      var_part_size = 2;
+      break;
+
+    case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD):
+      gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP,
+			  fragP->fr_symbol, (symbolS *) NULL,
+			  fragP->fr_offset);
+      /* Ten bytes added: a branch, nop and a jump.  */
+      var_part_size = 2 + 2 + 4 + 2;
+      break;
 
+    case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
+      var_partp[0] = target_address - (address_of_var_part + 1);
+      var_part_size = 0;
+      break;
+
+    case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
+      /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
+	 one that uses PC autoincrement.  */
+      opcodep[0] = BDAP_PC_LOW + (1 << 4);
+      opcodep[1] &= 0xF0;
+      opcodep[1] |= BDAP_INCR_HIGH;
+      md_number_to_chars (var_partp, (long) (target_address), 2);
+      var_part_size = 2;
+      break;
+
+    case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
+      /* We had a BDAP 16-bit "word", change the offset to a dword.  */
+      opcodep[0] = BDAP_PC_LOW + (2 << 4);
+      opcodep[1] &= 0xF0;
+      opcodep[1] |= BDAP_INCR_HIGH;
+      if (fragP->fr_symbol == NULL)
+	md_number_to_chars (var_partp, fragP->fr_offset, 4);
+      else
+	fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol,
+		 fragP->fr_offset, 0, BFD_RELOC_32);
+      var_part_size = 4;
+      break;
+
+    default:
+      BAD_CASE (fragP->fr_subtype);
+      break;
+    }
+
+  fragP->fr_fix += var_part_size;
 }
 
 /* Generate a short jump around a secondary jump table.
@@ -545,7 +539,7 @@ md_convert_frag (abfd, sec, fragP)
    This used to be md_create_short_jump, but is now called from
    md_create_long_jump instead, when sufficient.
    since the sizes of the jumps are the same.  It used to be brittle,
-   making possibilities for creating bad code.	*/
+   making possibilities for creating bad code.  */
 
 static void
 cris_create_short_jump (storep, from_addr, to_addr, fragP, to_symbol)
@@ -562,30 +556,29 @@ cris_create_short_jump (storep, from_addr, to_addr, fragP, to_symbol)
   if (-254 <= distance && distance <= 256)
     {
       /* Create a "short" short jump: "BA distance - 2".  */
-      storep[0] = branch_disp (distance-2);
+      storep[0] = branch_disp (distance - 2);
       storep[1] = BA_QUICK_HIGH;
 
       /* A nop for the delay slot.  */
-      md_number_to_chars (storep+2, NOP_OPCODE, 2);
+      md_number_to_chars (storep + 2, NOP_OPCODE, 2);
 
       /* The extra word should be filled with something sane too.  Make it
 	 a nop to keep disassembly sane.  */
-      md_number_to_chars (storep+4, NOP_OPCODE, 2);
+      md_number_to_chars (storep + 4, NOP_OPCODE, 2);
     }
   else
     {
       /* Make it a "long" short jump: "BA (PC+)".  */
       md_number_to_chars (storep, BA_PC_INCR_OPCODE, 2);
 
-      /* ".WORD distance - 4".	*/
+      /* ".WORD distance - 4".  */
       md_number_to_chars (storep + 2, (long) (distance - 4), 2);
 
       /* A nop for the delay slot.  */
-      md_number_to_chars (storep+4, NOP_OPCODE, 2);
+      md_number_to_chars (storep + 4, NOP_OPCODE, 2);
     }
 }
 
-
 /* Generate a long jump in a secondary jump table.
 
    storep  Where to store the jump instruction.
@@ -624,15 +617,15 @@ md_create_long_jump (storep, from_addr, to_addr, fragP, to_symbol)
     }
 }
 
-
 /* Port-specific assembler initialization.  */
+
 void
 md_begin ()
 {
   const char *hashret = NULL;
   int i = 0;
 
-  /* Set up a hash table for the instructions.	*/
+  /* Set up a hash table for the instructions.  */
   op_hash = hash_new ();
   if (op_hash == NULL)
     as_fatal (_("Virtual memory exhausted"));
@@ -644,7 +637,7 @@ md_begin ()
 
       if (hashret != NULL && *hashret != '\0')
 	as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes[i].name,
-		    *hashret == 0 ? _("(unknown reason)") : hashret);
+		  *hashret == 0 ? _("(unknown reason)") : hashret);
       do
 	{
 	  if (cris_opcodes[i].match & cris_opcodes[i].lose)
@@ -652,13 +645,14 @@ md_begin ()
 		      cris_opcodes[i].args);
 
 	  ++i;
-	} while (cris_opcodes[i].name != NULL
-		 && strcmp (cris_opcodes[i].name, name) == 0);
+	}
+      while (cris_opcodes[i].name != NULL
+	     && strcmp (cris_opcodes[i].name, name) == 0);
     }
 }
 
-
 /* Assemble a source line.  */
+
 void
 md_assemble (str)
      char *str;
@@ -698,7 +692,7 @@ md_assemble (str)
 	 no reloc.  */
       if (prefix.reloc != BFD_RELOC_NONE)
 	{
-	  /* Output an absolute mode address. */
+	  /* Output an absolute mode address.  */
 	  p = frag_more (4);
 	  fix_new_exp (frag_now, (p - frag_now->fr_literal), 4,
 		       &prefix.expr, 0, prefix.reloc);
@@ -712,12 +706,12 @@ md_assemble (str)
 	 size of the register to "sp".  */
       if (output_instruction.spec_reg != NULL)
 	{
-	  /* Special register.	*/
+	  /* Special register.  */
 	  opcodep[0] = -output_instruction.spec_reg->reg_size;
 	}
       else
 	{
-	  /* General register.	*/
+	  /* General register.  */
 	  opcodep[0] = -4;
 	}
       opcodep[1] = (REG_SP << 4) + (BDAP_QUICK_OPCODE >> 8);
@@ -735,7 +729,7 @@ md_assemble (str)
   opcodep = frag_more (2);
 
   /* Output the instruction opcode.  */
-  md_number_to_chars (opcodep, (long)(output_instruction.opcode), 2);
+  md_number_to_chars (opcodep, (long) (output_instruction.opcode), 2);
 
   /* Output the symbol-dependent instruction stuff.  */
   if (output_instruction.insn_type == CRIS_INSN_BRANCH)
@@ -756,7 +750,7 @@ md_assemble (str)
 	  || to_seg == now_seg || is_undefined)
 	{
 	  /* If is_undefined, then the expression may BECOME now_seg.  */
-	  length_code = is_undefined ?	STATE_UNDF :  STATE_BYTE;
+	  length_code = is_undefined ? STATE_UNDF : STATE_BYTE;
 
 	  /* Make room for max ten bytes of variable length.  */
 	  frag_var (rs_machine_dependent, 10, 0,
@@ -773,7 +767,7 @@ md_assemble (str)
 	     branch.  */
 	  gen_cond_branch_32 (opcodep, frag_more (10), frag_now,
 			      output_instruction.expr.X_add_symbol,
-			      (symbolS *)NULL,
+			      (symbolS *) NULL,
 			      output_instruction.expr.X_add_number);
 	}
     }
@@ -810,7 +804,7 @@ md_assemble (str)
       else if (output_instruction.reloc != BFD_RELOC_NONE)
 	{
 	  /* An immediate operand that has a relocation and needs to be
-	     processed further. */
+	     processed further.  */
 
 	  /* It is important to use fix_new_exp here and everywhere else
 	     (and not fix_new), as fix_new_exp can handle "difference
@@ -823,23 +817,23 @@ md_assemble (str)
     }
 }
 
-
 /* Low level text-to-bits assembly.  */
+
 static void
 cris_process_instruction (insn_text, out_insnp, prefixp)
      char *insn_text;
-     struct cris_instruction  *out_insnp;
+     struct cris_instruction *out_insnp;
      struct cris_prefix *prefixp;
 {
-  char		     *s;
-  char		     modified_char = 0;
-  const char	     *args;
+  char *s;
+  char modified_char = 0;
+  const char *args;
   struct cris_opcode *instruction;
-  char		     *operands;
-  int		     match = 0;
-  int		     mode;
-  int		     regno;
-  int		     size_bits;
+  char *operands;
+  int match = 0;
+  int mode;
+  int regno;
+  int size_bits;
 
   /* Reset these fields to a harmless state in case we need to return in
      error.  */
@@ -850,10 +844,8 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
 
   /* Find the end of the opcode mnemonic.  We assume (true in 2.9.1)
      that the caller has translated the opcode to lower-case, up to the
-     first non-letter.	*/
-  for (operands = insn_text;
-       islower (*operands);
-       ++operands)
+     first non-letter.  */
+  for (operands = insn_text; islower (*operands); ++operands)
     ;
 
   /* Terminate the opcode after letters, but save the character there if
@@ -864,13 +856,13 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
       break;
 
     case '.':
-      /* Put back the modified character later */
+      /* Put back the modified character later.  */
       modified_char = *operands;
-      /* FALLTHROUGH.  */
+      /* Fall through.  */
 
     case ' ':
-      /* Consume the character after the mnemonic and replace */
-      /* it with '\0'.					      */
+      /* Consume the character after the mnemonic
+	 and replace it with '\0'.  */
       *operands++ = '\0';
       break;
 
@@ -897,16 +889,13 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
       *--operands = modified_char;
     }
 
-
   /* Try to match an opcode table slot.  */
-  for (s = operands;
-       ;
-       )
+  for (s = operands;;)
     {
-      int  imm_expr_found;
+      int imm_expr_found;
 
       /* Initialize *prefixp, perhaps after being modified for a
-	 "near match".	*/
+	 "near match".  */
       prefixp->kind = PREFIX_NONE;
       prefixp->reloc = BFD_RELOC_NONE;
 
@@ -921,9 +910,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
 
       /* Build the opcode, checking as we go to make sure that the
 	 operands match.  */
-      for (args = instruction->args;
-	   ;
-	   ++args)
+      for (args = instruction->args;; ++args)
 	{
 	  switch (*args)
 	    {
@@ -947,7 +934,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
 
 	    case 'B':
 	      /* This is not really an operand, but causes a "BDAP
-		 -size,SP" prefix to be output, for PUSH instructions.	*/
+		 -size,SP" prefix to be output, for PUSH instructions.  */
 	      prefixp->kind = PREFIX_PUSH;
 	      continue;
 
@@ -1011,8 +998,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
 		if (! get_flags (&s, &flags))
 		  break;
 
-		out_insnp->opcode
-		  |= ((flags & 0xf0) << 8) | (flags & 0xf);
+		out_insnp->opcode |= ((flags & 0xf0) << 8) | (flags & 0xf);
 		continue;
 	      }
 
@@ -1106,7 +1092,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
 		    break;
 
 		  /* Since 'O' is used with an explicit bdap, we have no
-		     "real" instruction. */
+		     "real" instruction.  */
 		  prefixp->kind = PREFIX_BDAP_IMM;
 		  out_insnp->insn_type = CRIS_INSN_NONE;
 		  continue;
@@ -1139,7 +1125,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
 	      /* This character is used in the disassembler to
 		 recognize a prefix instruction to fold into the
 		 addressing mode for the next instruction.  It is
-		 ignored here.	*/
+		 ignored here.  */
 	      continue;
 
 	    case 'R':
@@ -1203,8 +1189,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
 		break;
 	      else
 		{
-		  out_insnp->opcode |=
-		    (regno << 12) | (size_bits << 4);
+		  out_insnp->opcode |= (regno << 12) | (size_bits << 4);
 		  continue;
 		}
 
@@ -1312,7 +1297,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
 			      || out_insnp->expr.X_add_number > 255))
 			as_bad (_("Immediate value not in 8 bit range: %ld"),
 				out_insnp->expr.X_add_number);
-		      /* FALLTHROUGH.  */
+		      /* Fall through.  */
 		    case 2:
 		      /* FIXME:  We need an indicator in the instruction
 			 table to pass on, to indicate if we need to check
@@ -1343,7 +1328,7 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
 			      || out_insnp->expr.X_add_number > 255))
 			as_bad (_("Immediate value not in 8 bit range: %ld"),
 				out_insnp->expr.X_add_number);
-		      /* FALLTHROUGH.  */
+		      /* Fall through.  */
 		    case 1:
 		      if (out_insnp->expr.X_op == O_constant
 			  && (out_insnp->expr.X_add_number < -32768
@@ -1367,7 +1352,6 @@ cris_process_instruction (insn_text, out_insnp, prefixp)
     }
 }
 
-
 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
    which must point to a '.' in front of the modifier.	On successful
    return, *cPP is advanced to the character following the size
@@ -1390,7 +1374,7 @@ get_bwd_size_modifier (cPP, size_bitsp)
     return 0;
   else
     {
-      /* Consume the '.' */
+      /* Consume the '.'.  */
       (*cPP)++;
 
       switch (**cPP)
@@ -1420,7 +1404,6 @@ get_bwd_size_modifier (cPP, size_bitsp)
     }
 }
 
-
 /* Get a B or W size modifier from the string pointed out by *cPP,
    which must point to a '.' in front of the modifier.	On successful
    return, *cPP is advanced to the character following the size
@@ -1443,7 +1426,7 @@ get_bw_size_modifier (cPP, size_bitsp)
     return 0;
   else
     {
-      /* Consume the '.' */
+      /* Consume the '.'.  */
       (*cPP)++;
 
       switch (**cPP)
@@ -1468,7 +1451,6 @@ get_bw_size_modifier (cPP, size_bitsp)
     }
 }
 
-
 /* Get a general register from the string pointed out by *cPP.	The
    variable *cPP is advanced to the character following the general
    register name on a successful return, and has its initial position
@@ -1509,7 +1491,7 @@ get_gen_reg (cPP, regnop)
 
     case 'R':
     case 'r':
-      /* Hopefully r[0-9] or r1[0-5].  Consume 'R' or 'r' */
+      /* Hopefully r[0-9] or r1[0-5].  Consume 'R' or 'r'.  */
       (*cPP)++;
 
       if (isdigit (**cPP))
@@ -1520,13 +1502,13 @@ get_gen_reg (cPP, regnop)
 
 	  if (! isalnum (**cPP))
 	    {
-	      /* No more digits, we're done. */
+	      /* No more digits, we're done.  */
 	      return 1;
 	    }
 	  else
 	    {
 	      /* One more digit.  Consume and add.  */
-	      *regnop = *regnop*10 + (**cPP - '0');
+	      *regnop = *regnop * 10 + (**cPP - '0');
 
 	      /* We need to check for a valid register number; Rn,
 		 0 <= n <= MAX_REG.  */
@@ -1563,7 +1545,6 @@ get_gen_reg (cPP, regnop)
   return 0;
 }
 
-
 /* Get a special register from the string pointed out by *cPP. The
    variable *cPP is advanced to the character following the special
    register name if one is found, and retains its original position
@@ -1588,11 +1569,8 @@ get_spec_reg (cPP, sregpp)
   const struct cris_spec_reg *sregp;
 
   /* Loop over all special registers.  */
-  for (sregp = cris_spec_regs;
-       sregp->name != NULL;
-       sregp++)
+  for (sregp = cris_spec_regs; sregp->name != NULL; sregp++)
     {
-
       /* Start over from beginning of the supposed name.  */
       s1 = *cPP;
       s2 = sregp->name;
@@ -1606,21 +1584,20 @@ get_spec_reg (cPP, sregpp)
 
       /* For a match, we must have consumed the name in the table, and we
 	 must be outside what could be part of a name.	Assume here that a
-	 test for alphanumerics is sufficient for a name test.	*/
+	 test for alphanumerics is sufficient for a name test.  */
       if (*s2 == 0 && ! isalnum (*s1))
 	{
-	  /* We have a match.  Update the pointer and be done.	*/
+	  /* We have a match.  Update the pointer and be done.  */
 	  *cPP = s1;
 	  *sregpp = sregp;
 	  return 1;
 	}
     }
 
-  /* If we got here, we did not find any name.	*/
+  /* If we got here, we did not find any name.  */
   return 0;
 }
 
-
 /* Get an unprefixed or side-effect-prefix operand from the string pointed
    out by *cPP.  The pointer *cPP is advanced to the character following
    the indirect operand if we have success, else it contains an undefined
@@ -1649,12 +1626,12 @@ get_spec_reg (cPP, sregpp)
 static int
 get_autoinc_prefix_or_indir_op (cPP, prefixp, is_autoincp, src_regnop,
 				imm_foundp, imm_exprP)
-     char		 **cPP;
-     struct cris_prefix	 *prefixp;
-     int		 *is_autoincp;
-     int		 *src_regnop;
-     int		 *imm_foundp;
-     expressionS	 *imm_exprP;
+     char **cPP;
+     struct cris_prefix *prefixp;
+     int *is_autoincp;
+     int *src_regnop;
+     int *imm_foundp;
+     expressionS *imm_exprP;
 {
   /* Assume there was no immediate mode expression.  */
   *imm_foundp = 0;
@@ -1763,59 +1740,59 @@ get_autoinc_prefix_or_indir_op (cPP, prefixp, is_autoincp, src_regnop,
 		      /* It wasn't an indirection.  Check if it's a
 			 register.  */
 		      else if (get_gen_reg (cPP, &index_reg_number))
-			  {
-			    int size_bits;
-
-			    /* Indexed with assign mode: "[rN+rM.S]".  */
-			    prefixp->kind = PREFIX_BIAP;
-			    prefixp->opcode
-			      = (BIAP_OPCODE + (index_reg_number << 12)
-				 + prefixp->base_reg_number /* << 0 */);
-
-			    if (! get_bwd_size_modifier (cPP, &size_bits))
-			      /* Size missing, this isn't a match.  */
-			      return 0;
-			    else
-			      {
-				/* Size found, break out to check the
-				   final ']'.  */
-				prefixp->opcode |= size_bits << 4;
-				break;
-			      }
-			  }
-		      /* Not a register.  Then this must be "[rN+I]".  */
-			else if (cris_get_expression (cPP, &prefixp->expr))
+			{
+			  int size_bits;
+
+			  /* Indexed with assign mode: "[rN+rM.S]".  */
+			  prefixp->kind = PREFIX_BIAP;
+			  prefixp->opcode
+			    = (BIAP_OPCODE + (index_reg_number << 12)
+			       + prefixp->base_reg_number /* << 0 */);
+
+			  if (! get_bwd_size_modifier (cPP, &size_bits))
+			    /* Size missing, this isn't a match.  */
+			    return 0;
+			  else
 			    {
-			      /* We've got offset with assign mode.  Fill
-				 in the blanks and break out to match the
+			      /* Size found, break out to check the
 				 final ']'.  */
-			      prefixp->kind = PREFIX_BDAP_IMM;
+			      prefixp->opcode |= size_bits << 4;
 			      break;
 			    }
-			  else
-			    /* Neither register nor expression found, so
-			       this can't be a match.  */
-			    return 0;
+			}
+		      /* Not a register.  Then this must be "[rN+I]".  */
+		      else if (cris_get_expression (cPP, &prefixp->expr))
+			{
+			  /* We've got offset with assign mode.  Fill
+			     in the blanks and break out to match the
+			     final ']'.  */
+			  prefixp->kind = PREFIX_BDAP_IMM;
+			  break;
+			}
+		      else
+			/* Neither register nor expression found, so
+			   this can't be a match.  */
+			return 0;
 		    }
-		  /* Not "[rN+" but perhaps "[rN-"? */
+		  /* Not "[rN+" but perhaps "[rN-"?  */
 		  else if (**cPP == '-')
-		      {
-			/* We must have an offset with assign mode.  */
-			if (! cris_get_expression (cPP, &prefixp->expr))
-			  /* No expression, no match.  */
-			  return 0;
-			else
-			  {
-			    /* We've got offset with assign mode.  Fill
-			       in the blanks and break out to match the
-			       final ']'.  */
-			    prefixp->kind = PREFIX_BDAP_IMM;
-			    break;
-			  }
-		      }
-		    else
-		      /* Neither '+' nor '-' after "[rN=rM".  Lose.  */
-		      return 0;
+		    {
+		      /* We must have an offset with assign mode.  */
+		      if (! cris_get_expression (cPP, &prefixp->expr))
+			/* No expression, no match.  */
+			return 0;
+		      else
+			{
+			  /* We've got offset with assign mode.  Fill
+			     in the blanks and break out to match the
+			     final ']'.  */
+			  prefixp->kind = PREFIX_BDAP_IMM;
+			  break;
+			}
+		    }
+		  else
+		    /* Neither '+' nor '-' after "[rN=rM".  Lose.  */
+		    return 0;
 		}
 	    default:
 	      /* Neither ']' nor '+' nor '=' after "[rN".  Lose.  */
@@ -1835,22 +1812,21 @@ get_autoinc_prefix_or_indir_op (cPP, prefixp, is_autoincp, src_regnop,
 	  return 1;
 	}
     }
-  /* No indirection.	Perhaps a constant?  */
+  /* No indirection.  Perhaps a constant?  */
   else if (cris_get_expression (cPP, imm_exprP))
-      {
-	/* Expression found, this is immediate mode.  */
-	prefixp->kind = PREFIX_NONE;
-	*is_autoincp = 1;
-	*src_regnop = REG_PC;
-	*imm_foundp = 1;
-	return 1;
-      }
+    {
+      /* Expression found, this is immediate mode.  */
+      prefixp->kind = PREFIX_NONE;
+      *is_autoincp = 1;
+      *src_regnop = REG_PC;
+      *imm_foundp = 1;
+      return 1;
+    }
 
   /* No luck today.  */
   return 0;
 }
 
-
 /* This function gets an indirect operand in a three-address operand
    combination from the string pointed out by *cPP.  The pointer *cPP is
    advanced to the character following the indirect operand on success, or
@@ -1875,179 +1851,178 @@ get_3op_or_dip_prefix_op (cPP, prefixp)
     /* We must have a '[' or it's a clean failure.  */
     return 0;
 
-      /* Eat the first '['.  */
+  /* Eat the first '['.  */
+  (*cPP)++;
+
+  if (**cPP == '[')
+    {
+      /* A second '[', so this must be double-indirect mode.  */
       (*cPP)++;
+      prefixp->kind = PREFIX_DIP;
+      prefixp->opcode = DIP_OPCODE;
 
-      if (**cPP == '[')
+      /* Get the register or fail entirely.  */
+      if (! get_gen_reg (cPP, &reg_number))
+	return 0;
+      else
 	{
-	  /* A second '[', so this must be double-indirect mode.  */
+	  prefixp->opcode |= reg_number /* << 0 */ ;
+	  if (**cPP == '+')
+	    {
+	      /* Since we found a '+', this must be double-indirect
+		 autoincrement mode.  */
+	      (*cPP)++;
+	      prefixp->opcode |= AUTOINCR_BIT << 8;
+	    }
+
+	  /* There's nothing particular to do, if this was a
+	     double-indirect *without* autoincrement.  */
+	}
+
+      /* Check the first ']'.  The second one is checked at the end.  */
+      if (**cPP != ']')
+	return 0;
+
+      /* Eat the first ']', so we'll be looking at a second ']'.  */
+      (*cPP)++;
+    }
+  /* No second '['.  Then we should have a register here, making
+     it "[rN".  */
+  else if (get_gen_reg (cPP, &prefixp->base_reg_number))
+    {
+      /* This must be indexed or offset mode: "[rN+I]" or
+	 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]".  */
+      if (**cPP == '+')
+	{
+	  /* Not the first alternative, must be one of the last
+	     three.  */
+	  int index_reg_number;
+
 	  (*cPP)++;
-	  prefixp->kind = PREFIX_DIP;
-	  prefixp->opcode = DIP_OPCODE;
 
-	  /* Get the register or fail entirely.  */
-	  if (! get_gen_reg (cPP, &reg_number))
-	    return 0;
-	  else
+	  if (**cPP == '[')
 	    {
-	      prefixp->opcode |= reg_number /* << 0 */ ;
+	      /* This is "[rx+["...  Expect a register next.  */
+	      int size_bits;
+	      (*cPP)++;
+
+	      if (!get_gen_reg (cPP, &index_reg_number))
+		return 0;
+
+	      prefixp->kind = PREFIX_BDAP;
+	      prefixp->opcode
+		= (BDAP_INDIR_OPCODE
+		   + (prefixp->base_reg_number << 12)
+		   + index_reg_number);
+
+	      /* We've seen "[rx+[ry", so check if this is
+		 autoincrement.  */
 	      if (**cPP == '+')
 		{
-		  /* Since we found a '+', this must be double-indirect
-		     autoincrement mode.  */
+		  /* Yep, now at "[rx+[ry+".  */
 		  (*cPP)++;
 		  prefixp->opcode |= AUTOINCR_BIT << 8;
 		}
+	      /* If it wasn't autoincrement, we don't need to
+		 add anything.  */
 
-	      /* There's nothing particular to do, if this was a
-		 double-indirect *without* autoincrement.  */
-	    }
+	      /* Check a first closing ']': "[rx+[ry]" or
+		 "[rx+[ry+]".  */
+	      if (**cPP != ']')
+		return 0;
+	      (*cPP)++;
 
-	  /* Check the first ']'.  The second one is checked at the end.  */
-	  if (**cPP != ']')
-	    return 0;
+	      /* Now expect a size modifier ".S".  */
+	      if (! get_bwd_size_modifier (cPP, &size_bits))
+		return 0;
 
-	  /* Eat the first ']', so we'll be looking at a second ']'.  */
-	  (*cPP)++;
-	}
-      /* No second '['.  Then we should have a register here, making
-	 it "[rN".  */
-      else if (get_gen_reg (cPP, &prefixp->base_reg_number))
-	  {
-	    /* This must be indexed or offset mode: "[rN+I]" or
-	       "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]".	*/
-	    if (**cPP == '+')
-	      {
-		/* Not the first alternative, must be one of the last
-		   three.  */
-		int index_reg_number;
-
-		(*cPP)++;
-
-		if (**cPP == '[')
-		  {
-		    /* This is "[rx+["...  Expect a register next.  */
-		    int size_bits;
-		    (*cPP)++;
-
-		    if (!get_gen_reg (cPP, &index_reg_number))
-		      return 0;
-
-		    prefixp->kind = PREFIX_BDAP;
-		    prefixp->opcode
-		      = (BDAP_INDIR_OPCODE
-			 + (prefixp->base_reg_number << 12)
-			 + index_reg_number);
-
-		    /* We've seen "[rx+[ry", so check if this is
-		       autoincrement.  */
-		    if (**cPP == '+')
-		      {
-			/* Yep, now at "[rx+[ry+".  */
-			(*cPP)++;
-			prefixp->opcode |= AUTOINCR_BIT << 8;
-		      }
-		    /* If it wasn't autoincrement, we don't need to
-		       add anything.  */
-
-		    /* Check a first closing ']': "[rx+[ry]" or
-		       "[rx+[ry+]".  */
-		    if (**cPP != ']')
-		      return 0;
-		    (*cPP)++;
-
-		    /* Now expect a size modifier ".S".  */
-		    if (! get_bwd_size_modifier (cPP, &size_bits))
-		      return 0;
-
-		    prefixp->opcode |= size_bits << 4;
-
-		    /* Ok, all interesting stuff has been seen:
-		       "[rx+[ry+].S" or "[rx+[ry].S".  We only need to
-		       expect a final ']', which we'll do in a common
-		       closing session.  */
-		  }
-		/* Seen "[rN+", but not a '[', so check if we have a
-		   register.	*/
-		else if (get_gen_reg (cPP, &index_reg_number))
-		    {
-		      /* This is indexed mode: "[rN+rM.S]" or
-			 "[rN+rM.S+]".	*/
-		      int size_bits;
-		      prefixp->kind = PREFIX_BIAP;
-		      prefixp->opcode
-			= (BIAP_OPCODE
-			   | prefixp->base_reg_number /* << 0 */
-			   | (index_reg_number << 12));
-
-		      /*  */
-		      if (! get_bwd_size_modifier (cPP, &size_bits))
-			/* Missing size, so fail.  */
-			return 0;
-		      else
-			  /* Size found.  Add that piece and drop down to
-			     the common checking of the closing ']'.  */
-			  prefixp->opcode |= size_bits << 4;
-		    }
-		/* Seen "[rN+", but not a '[' or a register, so then
-		   it must be a constant "I".  */
-		  else if (cris_get_expression (cPP, &prefixp->expr))
-		      {
-			/* Expression found, so fill in the bits of offset
-			   mode and drop down to check the closing ']'.  */
-			prefixp->kind = PREFIX_BDAP_IMM;
-		      }
-		    else
-		      /* Nothing valid here: lose.  */
-		      return 0;
-	      }
-	      /* Seen "[rN" but no '+', so check if it's a '-'.  */
-	    else if (**cPP == '-')
-		{
-		  /* Yep, we must have offset mode.  */
-		  if (! cris_get_expression (cPP, &prefixp->expr))
-		    /* No expression, so we lose.  */
-		    return 0;
-		  else
-		    {
-		      /* Expression found to make this offset mode, so
-			 fill those bits and drop down to check the
-			 closing ']'.  */
-		      prefixp->kind = PREFIX_BDAP_IMM;
-		    }
-		}
+	      prefixp->opcode |= size_bits << 4;
+
+	      /* Ok, all interesting stuff has been seen:
+		 "[rx+[ry+].S" or "[rx+[ry].S".  We only need to
+		 expect a final ']', which we'll do in a common
+		 closing session.  */
+	    }
+	  /* Seen "[rN+", but not a '[', so check if we have a
+	     register.  */
+	  else if (get_gen_reg (cPP, &index_reg_number))
+	    {
+	      /* This is indexed mode: "[rN+rM.S]" or
+		 "[rN+rM.S+]".  */
+	      int size_bits;
+	      prefixp->kind = PREFIX_BIAP;
+	      prefixp->opcode
+		= (BIAP_OPCODE
+		   | prefixp->base_reg_number /* << 0 */
+		   | (index_reg_number << 12));
+
+	      /*  */
+	      if (! get_bwd_size_modifier (cPP, &size_bits))
+		/* Missing size, so fail.  */
+		return 0;
 	      else
-		{
-		  /* We've seen "[rN", but not '+' or '-'; rather a ']'.
-		     Hmm.  Normally this is a simple indirect mode that we
-		     shouldn't match, but if we expect ']', then we have a
-		     zero offset, so it can be a three-address-operand,
-		     like "[rN],rO,rP", thus offset mode.
-
-		     Don't eat the ']', that will be done in the closing
-		     ceremony.	*/
-		  prefixp->expr.X_op = O_constant;
-		  prefixp->expr.X_add_number = 0;
-		  prefixp->expr.X_add_symbol = NULL;
-		  prefixp->expr.X_op_symbol = NULL;
-		  prefixp->kind = PREFIX_BDAP_IMM;
-		}
-	  }
-      /* A '[', but no second '[', and no register.  Check if we
-	 have an expression, making this "[I]" for a double-indirect
-	 prefix.	*/
-	else if (cris_get_expression (cPP, &prefixp->expr))
-	      {
-		/* Expression found, the so called absolute mode for a
-		   double-indirect prefix on PC.  */
-		prefixp->kind = PREFIX_DIP;
-		prefixp->opcode
-		  = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC;
-		prefixp->reloc = BFD_RELOC_32;
-	      }
-	    else
-	      /* Neither '[' nor register nor expression.  We lose.  */
-	      return 0;
+		/* Size found.  Add that piece and drop down to
+		   the common checking of the closing ']'.  */
+		prefixp->opcode |= size_bits << 4;
+	    }
+	  /* Seen "[rN+", but not a '[' or a register, so then
+	     it must be a constant "I".  */
+	  else if (cris_get_expression (cPP, &prefixp->expr))
+	    {
+	      /* Expression found, so fill in the bits of offset
+		 mode and drop down to check the closing ']'.  */
+	      prefixp->kind = PREFIX_BDAP_IMM;
+	    }
+	  else
+	    /* Nothing valid here: lose.  */
+	    return 0;
+	}
+      /* Seen "[rN" but no '+', so check if it's a '-'.  */
+      else if (**cPP == '-')
+	{
+	  /* Yep, we must have offset mode.  */
+	  if (! cris_get_expression (cPP, &prefixp->expr))
+	    /* No expression, so we lose.  */
+	    return 0;
+	  else
+	    {
+	      /* Expression found to make this offset mode, so
+		 fill those bits and drop down to check the
+		 closing ']'.  */
+	      prefixp->kind = PREFIX_BDAP_IMM;
+	    }
+	}
+      else
+	{
+	  /* We've seen "[rN", but not '+' or '-'; rather a ']'.
+	     Hmm.  Normally this is a simple indirect mode that we
+	     shouldn't match, but if we expect ']', then we have a
+	     zero offset, so it can be a three-address-operand,
+	     like "[rN],rO,rP", thus offset mode.
+
+	     Don't eat the ']', that will be done in the closing
+	     ceremony.  */
+	  prefixp->expr.X_op = O_constant;
+	  prefixp->expr.X_add_number = 0;
+	  prefixp->expr.X_add_symbol = NULL;
+	  prefixp->expr.X_op_symbol = NULL;
+	  prefixp->kind = PREFIX_BDAP_IMM;
+	}
+    }
+  /* A '[', but no second '[', and no register.  Check if we
+     have an expression, making this "[I]" for a double-indirect
+     prefix.  */
+  else if (cris_get_expression (cPP, &prefixp->expr))
+    {
+      /* Expression found, the so called absolute mode for a
+	 double-indirect prefix on PC.  */
+      prefixp->kind = PREFIX_DIP;
+      prefixp->opcode = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC;
+      prefixp->reloc = BFD_RELOC_32;
+    }
+  else
+    /* Neither '[' nor register nor expression.  We lose.  */
+    return 0;
 
   /* We get here as a closing ceremony to a successful match.  We just
      need to check the closing ']'.  */
@@ -2060,7 +2035,6 @@ get_3op_or_dip_prefix_op (cPP, prefixp)
   return 1;
 }
 
-
 /* Get an expression from the string pointed out by *cPP.
    The pointer *cPP is advanced to the character following the expression
    on a success, or retains its original value otherwise.
@@ -2069,12 +2043,12 @@ get_3op_or_dip_prefix_op (cPP, prefixp)
 
    exprP   Pointer to structure containing the expression.
 
-   Return 1 iff a correct expression is found.	*/
+   Return 1 iff a correct expression is found.  */
 
 static int
 cris_get_expression (cPP, exprP)
-     char	  **cPP;
-     expressionS  *exprP;
+     char **cPP;
+     expressionS *exprP;
 {
   char *saved_input_line_pointer;
   segT exp;
@@ -2099,7 +2073,6 @@ cris_get_expression (cPP, exprP)
   return 1;
 }
 
-
 /* Get a sequence of flag characters from *spp.  The pointer *cPP is
    advanced to the character following the expression.	The flag
    characters are consecutive, no commas or spaces.
@@ -2165,7 +2138,7 @@ get_flags (cPP, flagsp)
 
 	default:
 	  /* We consider this successful if we stop at a comma or
-	     whitespace.  Anything else, and we consider it a failure.	*/
+	     whitespace.  Anything else, and we consider it a failure.  */
 	  if (**cPP != ','
 	      && **cPP != 0
 	      && ! isspace (**cPP))
@@ -2179,7 +2152,6 @@ get_flags (cPP, flagsp)
     }
 }
 
-
 /* Generate code and fixes for a BDAP prefix.
 
    base_regno	Int containing the base register number.
@@ -2188,8 +2160,8 @@ get_flags (cPP, flagsp)
 
 static void
 gen_bdap (base_regno, exprP)
-     int	  base_regno;
-     expressionS  *exprP;
+     int base_regno;
+     expressionS *exprP;
 {
   unsigned int opcode;
   char *opcodep;
@@ -2202,7 +2174,7 @@ gen_bdap (base_regno, exprP)
   if (exprP->X_op == O_constant)
     {
       /* We have an absolute expression that we know the size of right
-	 now. */
+	 now.  */
       long int value;
       int size;
 
@@ -2211,7 +2183,7 @@ gen_bdap (base_regno, exprP)
 	/* Outside range for a "word", make it a dword.  */
 	size = 2;
       else
-	/* Assume "word" size.	*/
+	/* Assume "word" size.  */
 	size = 1;
 
       /* If this is a signed-byte value, we can fit it into the prefix
@@ -2234,12 +2206,11 @@ gen_bdap (base_regno, exprP)
   else
     /* The expression is not defined yet but may become absolute.  We make
        it a relocation to be relaxed.  */
-      frag_var (rs_machine_dependent, 4, 0,
-		ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF),
-		exprP->X_add_symbol, exprP->X_add_number, opcodep);
+    frag_var (rs_machine_dependent, 4, 0,
+	      ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF),
+	      exprP->X_add_symbol, exprP->X_add_number, opcodep);
 }
 
-
 /* Encode a branch displacement in the range -256..254 into the form used
    by CRIS conditional branch instructions.
 
@@ -2259,7 +2230,6 @@ branch_disp (offset)
   return disp;
 }
 
-
 /* Generate code and fixes for a 32-bit conditional branch instruction
    created by "extending" an existing 8-bit branch instruction.
 
@@ -2301,7 +2271,7 @@ gen_cond_branch_32 (opcodep, writep, fragP, add_symP, sub_symP, add_num)
      it's not the optimal extended construct, but we should get this
      rarely enough that it shouldn't matter.  */
 
-  writep[8] = branch_disp (-2-6);
+  writep[8] = branch_disp (-2 - 6);
   writep[9] = opcodep[1];
 
   /* Then, we change the branch to an unconditional branch over the
@@ -2330,7 +2300,7 @@ gen_cond_branch_32 (opcodep, writep, fragP, add_symP, sub_symP, add_num)
     md_number_to_chars (writep + 4, add_num, 4);
   else
     {
-      /* Not absolute, we have to make it a frag for later evaluation.	*/
+      /* Not absolute, we have to make it a frag for later evaluation.  */
       know (sub_symP == 0);
 
       fix_new (fragP, writep + 4 - fragP->fr_literal, 4, add_symP,
@@ -2338,12 +2308,11 @@ gen_cond_branch_32 (opcodep, writep, fragP, add_symP, sub_symP, add_num)
     }
 }
 
-
 /* This *could* be:
 
-   Turn a string in input_line_pointer into a floating point constant of
-   type type, and store the appropriate bytes in *litp.  The number of
-   LITTLENUMS emitted is stored in *sizep.
+   Turn a string in input_line_pointer into a floating point constant
+   of type TYPE, and store the appropriate bytes in *LITP.  The number
+   of LITTLENUMS emitted is stored in *SIZEP.
 
    type	  A character from FLTCHARS that describes what kind of
 	  floating-point number is wanted.
@@ -2363,14 +2332,13 @@ char *
 md_atof (type, litp, sizep)
      char type ATTRIBUTE_UNUSED;
      char *litp ATTRIBUTE_UNUSED;
-     int  *sizep ATTRIBUTE_UNUSED;
+     int *sizep ATTRIBUTE_UNUSED;
 {
   /* FIXME:  Is this function mentioned in the internals.texi manual?  If
      not, add it.  */
   return  _("Bad call to md_atof () - floating point formats are not supported");
 }
 
-
 /* Turn a number as a fixS * into a series of bytes that represents the
    number on the target machine.  The purpose of this procedure is the
    same as that of md_number_to_chars but this procedure is supposed to
@@ -2382,7 +2350,7 @@ md_atof (type, litp, sizep)
 
    n	      The number of bytes in "val" that should be stored.
 
-   fixP	      The fix to be applied to the bit field starting at bufp.	*/
+   fixP	      The fix to be applied to the bit field starting at bufp.  */
 
 static void
 cris_number_to_imm (bufp, val, n, fixP)
@@ -2480,7 +2448,7 @@ cris_number_to_imm (bufp, val, n, fixP)
     case BFD_RELOC_NONE:
       /* May actually happen automatically.  For example at broken
 	 words, if the word turns out not to be broken.
-	 FIXME: When?  Which testcase?	*/
+	 FIXME: When?  Which testcase?  */
       if (! fixP->fx_addsy)
 	md_number_to_chars (bufp, val, n);
       break;
@@ -2503,10 +2471,10 @@ cris_number_to_imm (bufp, val, n, fixP)
     }
 }
 
-
 /* Processes machine-dependent command line options.  Called once for
    each option on the command line that the machine-independent part of
    GAS does not understand.  */
+
 int
 md_parse_option (arg, argp)
      int arg;
@@ -2517,7 +2485,8 @@ md_parse_option (arg, argp)
     case 'H':
     case 'h':
       md_show_usage (stdout);
-      exit (0);	 /* Don't continue */
+      /* Don't continue.  */
+      exit (0);
 
     case 'N':
       warn_for_branch_expansion = 1;
@@ -2525,7 +2494,7 @@ md_parse_option (arg, argp)
 
     default:
       return 0;
-  }
+    }
 }
 
 /* Round up a section size to the appropriate boundary.  */
@@ -2558,7 +2527,6 @@ md_section_align (segment, size)
   return size;
 }
 
-
 /* Generate a machine-dependent relocation.  */
 arelent *
 tc_gen_reloc (section, fixP)
@@ -2590,10 +2558,10 @@ tc_gen_reloc (section, fixP)
   relP->address = fixP->fx_frag->fr_address + fixP->fx_where;
 
   if (fixP->fx_pcrel)
-    /* FIXME: Is this correct?	*/
+    /* FIXME: Is this correct?  */
     relP->addend = fixP->fx_addnumber;
   else
-    /* At least *this one* is correct. */
+    /* At least *this one* is correct.  */
     relP->addend = fixP->fx_offset;
 
   /* This is the standard place for KLUDGEs to work around bugs in
@@ -2621,9 +2589,9 @@ tc_gen_reloc (section, fixP)
   if (OUTPUT_FLAVOR == bfd_target_aout_flavour
       && fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy)
       && ! bfd_is_und_section (S_GET_SEGMENT (fixP->fx_addsy)))
-  {
-    relP->addend -= S_GET_VALUE (fixP->fx_addsy);
-  }
+    {
+      relP->addend -= S_GET_VALUE (fixP->fx_addsy);
+    }
 
   relP->howto = bfd_reloc_type_lookup (stdoutput, code);
   if (! relP->howto)
@@ -2640,8 +2608,8 @@ tc_gen_reloc (section, fixP)
   return relP;
 }
 
-
 /* Machine-dependent usage-output.  */
+
 void
 md_show_usage (stream)
      FILE *stream;
@@ -2664,9 +2632,8 @@ md_show_usage (stream)
   fprintf (stream, _("Description	: Assembler for the CRIS processor.\n"));
 }
 
-
 /* Apply a fixS (fixup of an instruction or data that we didn't have
-   enough info to complete immediately) to the data in a frag.	*/
+   enough info to complete immediately) to the data in a frag.  */
 
 int
 md_apply_fix (fixP, valP)
@@ -2686,28 +2653,27 @@ md_apply_fix (fixP, valP)
       fixP->fx_done = 1;
     }
   else
-  {
-    /* I took this from tc-arc.c, since we used to not support
-       fx_subsy != NULL.  I'm not totally sure it's TRT.  */
-    if (fixP->fx_subsy != (symbolS *) NULL)
-      {
-	if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
-	  val -= S_GET_VALUE (fixP->fx_subsy);
-	else
-	  {
-	    /* We can't actually support subtracting a symbol.	*/
-	    as_bad_where (fixP->fx_file, fixP->fx_line,
-			  _("expression too complex"));
-	  }
-      }
-
-    cris_number_to_imm (buf, val, fixP->fx_size, fixP);
-  }
+    {
+      /* I took this from tc-arc.c, since we used to not support
+	 fx_subsy != NULL.  I'm not totally sure it's TRT.  */
+      if (fixP->fx_subsy != (symbolS *) NULL)
+	{
+	  if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
+	    val -= S_GET_VALUE (fixP->fx_subsy);
+	  else
+	    {
+	      /* We can't actually support subtracting a symbol.  */
+	      as_bad_where (fixP->fx_file, fixP->fx_line,
+			    _("expression too complex"));
+	    }
+	}
+
+      cris_number_to_imm (buf, val, fixP->fx_size, fixP);
+    }
 
   return 1;
 }
 
-
 /* All relocations are relative to the location just after the fixup;
    the address of the fixup plus its size.  */
 
@@ -2727,8 +2693,7 @@ md_pcrel_from (fixP)
   return fixP->fx_size + addr;
 }
 
-
-/* We have no need to give defaults for symbol-values.	*/
+/* We have no need to give defaults for symbol-values.  */
 symbolS *
 md_undefined_symbol (name)
      char *name ATTRIBUTE_UNUSED;
@@ -2736,7 +2701,6 @@ md_undefined_symbol (name)
   return 0;
 }
 
-
 /* Definition of TC_FORCE_RELOCATION.
    FIXME: Unsure of this.  Can we omit it?  Just copied from tc-i386.c
    when doing multi-object format with ELF, since it's the only other
@@ -2761,7 +2725,7 @@ tc_cris_check_adjusted_broken_word (new_offset, brokwP)
      struct broken_word *brokwP;
 {
   if (new_offset > 32767 || new_offset < -32768)
-    /* We really want a genuine error, not a warning, so make it one. */
+    /* We really want a genuine error, not a warning, so make it one.  */
     as_bad_where (brokwP->frag->fr_file, brokwP->frag->fr_line,
 		  _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
 		  (long) new_offset);
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index eebd49f..4324e28 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1,6 +1,6 @@
 /* i386.c -- Assemble code for the Intel 80386
    Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
-   Free Software Foundation.
+   Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
 
@@ -19,12 +19,10 @@
    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
    02111-1307, USA.  */
 
-/*
-  Intel 80386 machine specific gas.
-  Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
-  Bugs & suggestions are completely welcome.  This is free software.
-  Please help us make it better.
-  */
+/* Intel 80386 machine specific gas.
+   Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
+   Bugs & suggestions are completely welcome.  This is free software.
+   Please help us make it better.  */
 
 #include <ctype.h>
 
@@ -60,7 +58,7 @@ static int smallest_imm_type PARAMS ((offsetT));
 static offsetT offset_in_range PARAMS ((offsetT, int));
 static int add_prefix PARAMS ((unsigned int));
 static void set_16bit_code_flag PARAMS ((int));
-static void set_16bit_gcc_code_flag PARAMS((int));
+static void set_16bit_gcc_code_flag PARAMS ((int));
 static void set_intel_syntax PARAMS ((int));
 static void set_cpu_arch PARAMS ((int));
 
@@ -70,7 +68,7 @@ static bfd_reloc_code_real_type reloc
 #endif
 
 /* 'md_assemble ()' gathers together information and puts it into a
-   i386_insn. */
+   i386_insn.  */
 
 union i386_op
   {
@@ -81,19 +79,19 @@ union i386_op
 
 struct _i386_insn
   {
-    /* TM holds the template for the insn were currently assembling. */
+    /* TM holds the template for the insn were currently assembling.  */
     template tm;
 
     /* SUFFIX holds the instruction mnemonic suffix if given.
        (e.g. 'l' for 'movl')  */
     char suffix;
 
-    /* OPERANDS gives the number of given operands. */
+    /* OPERANDS gives the number of given operands.  */
     unsigned int operands;
 
     /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
        of given register, displacement, memory operands and immediate
-       operands. */
+       operands.  */
     unsigned int reg_operands, disp_operands, mem_operands, imm_operands;
 
     /* TYPES [i] is the type (see above #defines) which tells us how to
@@ -118,7 +116,7 @@ struct _i386_insn
     unsigned int log2_scale_factor;
 
     /* SEG gives the seg_entries of this insn.  They are zero unless
-       explicit segment overrides are given. */
+       explicit segment overrides are given.  */
     const seg_entry *seg[2];	/* segments for memory operands (if given) */
 
     /* PREFIX holds all the given prefix opcodes (usually null).
@@ -160,7 +158,7 @@ const char comment_chars[] = "#";
    .line and .file directives will appear in the pre-processed output */
 /* Note that input_file.c hand checks for '#' at the beginning of the
    first line of the input file.  This is because the compiler outputs
-   #NO_APP at the beginning of its output. */
+   #NO_APP at the beginning of its output.  */
 /* Also note that comments started like this one will always work if
    '/' isn't otherwise defined.  */
 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX) && !defined(TE_FreeBSD))
@@ -200,7 +198,7 @@ static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:[@]";
 /* md_assemble() always leaves the strings it's passed unaltered.  To
    effect this we maintain a stack of saved characters that we've smashed
    with '\0's (indicating end of strings for various sub-fields of the
-   assembler instruction). */
+   assembler instruction).  */
 static char save_stack[32];
 static char *save_stack_p;	/* stack pointer */
 #define END_STRING_AND_SAVE(s) \
@@ -208,34 +206,42 @@ static char *save_stack_p;	/* stack pointer */
 #define RESTORE_END_STRING(s) \
 	do { *(s) = *--save_stack_p; } while (0)
 
-/* The instruction we're assembling. */
+/* The instruction we're assembling.  */
 static i386_insn i;
 
 /* Possible templates for current insn.  */
 static const templates *current_templates;
 
-/* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
+/* Per instruction expressionS buffers: 2 displacements & 2 immediate max.  */
 static expressionS disp_expressions[2], im_expressions[2];
 
-static int this_operand;	  /* Current operand we are working on.  */
+/* Current operand we are working on.  */
+static int this_operand;
 
-static int flag_16bit_code;	  /* 1 if we're writing 16-bit code,
-				     0 if 32-bit.  */
+/* 1 if we're writing 16-bit code,
+   0 if 32-bit.  */
+static int flag_16bit_code;
 
-static int intel_syntax = 0;	  /* 1 for intel syntax, 0 if att syntax.  */
+/* 1 for intel syntax,
+   0 if att syntax.  */
+static int intel_syntax = 0;
 
-static int allow_naked_reg = 0;   /* 1 if register prefix % not required  */
+/* 1 if register prefix % not required.  */
+static int allow_naked_reg = 0;
 
-static char stackop_size = '\0';  /* Used in 16 bit gcc mode to add an l
-				     suffix to call, ret, enter, leave, push,
-				     and pop instructions so that gcc has the
-				     same stack frame as in 32 bit mode.  */
+/* Used in 16 bit gcc mode to add an l suffix to call, ret, enter,
+   leave, push, and pop instructions so that gcc has the same stack
+   frame as in 32 bit mode.  */
+static char stackop_size = '\0';
 
-static int quiet_warnings = 0;	  /* Non-zero to quieten some warnings. */
+/* Non-zero to quieten some warnings.  */
+static int quiet_warnings = 0;
 
-static const char *cpu_arch_name = NULL; /* cpu name  */
+/* CPU name.  */
+static const char *cpu_arch_name = NULL;
 
-static unsigned int cpu_arch_flags = 0;  /* cpu feature flags  */
+/* CPU feature flags.  */
+static unsigned int cpu_arch_flags = 0;
 
 /* Interface to relax_segment.
    There are 2 relax states for 386 jump insns: one for conditional &
@@ -243,10 +249,10 @@ static unsigned int cpu_arch_flags = 0;  /* cpu feature flags  */
    jumps add different sizes to frags when we're figuring out what
    sort of jump to choose to reach a given label.  */
 
-/* types */
-#define COND_JUMP 1		/* conditional jump */
-#define UNCOND_JUMP 2		/* unconditional jump */
-/* sizes */
+/* Types.  */
+#define COND_JUMP 1		/* Conditional jump.  */
+#define UNCOND_JUMP 2		/* Unconditional jump.  */
+/* Sizes.  */
 #define CODE16	1
 #define SMALL	0
 #define SMALL16 (SMALL|CODE16)
@@ -322,14 +328,13 @@ static const arch_entry cpu_arch[] = {
   {NULL, 0 }
 };
 
-
 void
 i386_align_code (fragP, count)
      fragS *fragP;
      int count;
 {
   /* Various efficient no-op patterns for aligning code labels.  */
-  /* Note: Don't try to assemble the instructions in the comments. */
+  /* Note: Don't try to assemble the instructions in the comments.  */
   /*       0L and 0w are not legal */
   static const char f32_1[] =
     {0x90};					/* nop			*/
@@ -399,14 +404,15 @@ i386_align_code (fragP, count)
     {
       if (flag_16bit_code)
 	{
-	  memcpy(fragP->fr_literal + fragP->fr_fix,
-		 f16_patt[count - 1], count);
-	  if (count > 8) /* adjust jump offset */
+	  memcpy (fragP->fr_literal + fragP->fr_fix,
+		  f16_patt[count - 1], count);
+	  if (count > 8)
+	    /* Adjust jump offset.  */
 	    fragP->fr_literal[fragP->fr_fix + 1] = count - 2;
 	}
       else
-	memcpy(fragP->fr_literal + fragP->fr_fix,
-	       f32_patt[count - 1], count);
+	memcpy (fragP->fr_literal + fragP->fr_fix,
+		f32_patt[count - 1], count);
       fragP->fr_var = count;
     }
 }
@@ -427,7 +433,7 @@ static INLINE unsigned int
 mode_from_disp_size (t)
      unsigned int t;
 {
-  return (t & Disp8) ? 1 : (t & (Disp16|Disp32)) ? 2 : 0;
+  return (t & Disp8) ? 1 : (t & (Disp16 | Disp32)) ? 2 : 0;
 }
 
 static INLINE int
@@ -435,35 +441,35 @@ fits_in_signed_byte (num)
      offsetT num;
 {
   return (num >= -128) && (num <= 127);
-}				/* fits_in_signed_byte() */
+}
 
 static INLINE int
 fits_in_unsigned_byte (num)
      offsetT num;
 {
   return (num & 0xff) == num;
-}				/* fits_in_unsigned_byte() */
+}
 
 static INLINE int
 fits_in_unsigned_word (num)
      offsetT num;
 {
   return (num & 0xffff) == num;
-}				/* fits_in_unsigned_word() */
+}
 
 static INLINE int
 fits_in_signed_word (num)
      offsetT num;
 {
   return (-32768 <= num) && (num <= 32767);
-}				/* fits_in_signed_word() */
+}
 
 static int
 smallest_imm_type (num)
      offsetT num;
 {
   if (cpu_arch_flags != 0
-      && cpu_arch_flags != (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486))
+      && cpu_arch_flags != (Cpu086 | Cpu186 | Cpu286 | Cpu386 | Cpu486))
     {
       /* This code is disabled on the 486 because all the Imm1 forms
 	 in the opcode table are slower on the i486.  They're the
@@ -480,7 +486,7 @@ smallest_imm_type (num)
 	  : (fits_in_signed_word (num) || fits_in_unsigned_word (num))
 	  ? (Imm16 | Imm32)
 	  : (Imm32));
-}				/* smallest_imm_type() */
+}
 
 static offsetT
 offset_in_range (val, size)
@@ -494,14 +500,14 @@ offset_in_range (val, size)
     case 1: mask = ((addressT) 1 <<  8) - 1; break;
     case 2: mask = ((addressT) 1 << 16) - 1; break;
     case 4: mask = ((addressT) 2 << 31) - 1; break;
-    default: abort();
+    default: abort ();
     }
 
   /* If BFD64, sign extend val.  */
-  if ((val & ~ (((addressT) 2 << 31) - 1)) == 0)
+  if ((val & ~(((addressT) 2 << 31) - 1)) == 0)
     val = (val ^ ((addressT) 1 << 31)) - ((addressT) 1 << 31);
 
-  if ((val & ~ mask) != 0 && (val & ~ mask) != ~ mask)
+  if ((val & ~mask) != 0 && (val & ~mask) != ~mask)
     {
       char buf1[40], buf2[40];
 
@@ -597,9 +603,9 @@ set_intel_syntax (syntax_flag)
       char *string = input_line_pointer;
       int e = get_symbol_end ();
 
-      if (strcmp(string, "prefix") == 0)
+      if (strcmp (string, "prefix") == 0)
 	ask_naked_reg = 1;
-      else if (strcmp(string, "noprefix") == 0)
+      else if (strcmp (string, "noprefix") == 0)
 	ask_naked_reg = -1;
       else
 	as_bad (_("bad argument to syntax directive."));
@@ -615,7 +621,8 @@ set_intel_syntax (syntax_flag)
       allow_naked_reg = (intel_syntax
 			 && (bfd_get_symbol_leading_char (stdoutput) != '\0'));
 #else
-      allow_naked_reg = 0; /* conservative default */
+      /* Conservative default.  */
+      allow_naked_reg = 0;
 #endif
     }
   else
@@ -624,9 +631,9 @@ set_intel_syntax (syntax_flag)
 
 static void
 set_cpu_arch (dummy)
-    int dummy ATTRIBUTE_UNUSED;
+     int dummy ATTRIBUTE_UNUSED;
 {
-  SKIP_WHITESPACE();
+  SKIP_WHITESPACE ();
 
   if (! is_end_of_line[(unsigned char) *input_line_pointer])
     {
@@ -679,28 +686,29 @@ const pseudo_typeS md_pseudo_table[] =
   {0, 0, 0}
 };
 
-/* for interface with expression () */
+/* For interface with expression ().  */
 extern char *input_line_pointer;
 
-/* hash table for instruction mnemonic lookup */
+/* Hash table for instruction mnemonic lookup.  */
 static struct hash_control *op_hash;
-/* hash table for register lookup */
+
+/* Hash table for register lookup.  */
 static struct hash_control *reg_hash;
 
-
 void
 md_begin ()
 {
   const char *hash_err;
 
-  /* initialize op_hash hash table */
+  /* Initialize op_hash hash table.  */
   op_hash = hash_new ();
 
   {
     register const template *optab;
     register templates *core_optab;
 
-    optab = i386_optab;		/* setup for loop */
+    /* Setup for loop.  */
+    optab = i386_optab;
     core_optab = (templates *) xmalloc (sizeof (templates));
     core_optab->start = optab;
 
@@ -711,7 +719,7 @@ md_begin ()
 	    || strcmp (optab->name, (optab - 1)->name) != 0)
 	  {
 	    /* different name --> ship out current template list;
-	       add to hash table; & begin anew */
+	       add to hash table; & begin anew.  */
 	    core_optab->end = optab;
 	    hash_err = hash_insert (op_hash,
 				    (optab - 1)->name,
@@ -731,7 +739,7 @@ md_begin ()
       }
   }
 
-  /* initialize reg_hash hash table */
+  /* Initialize reg_hash hash table.  */
   reg_hash = hash_new ();
   {
     register const reg_entry *regtab;
@@ -746,7 +754,7 @@ md_begin ()
       }
   }
 
-  /* fill in lexical tables:  mnemonic_chars, operand_chars.  */
+  /* Fill in lexical tables:  mnemonic_chars, operand_chars.  */
   {
     register int c;
     register char *p;
@@ -811,7 +819,6 @@ i386_print_statistics (file)
   hash_print_statistics (file, "i386 register", reg_hash);
 }
 
-
 #ifdef DEBUG386
 
 /* debugging routines for md_assemble */
@@ -856,8 +863,7 @@ pte (t)
 {
   int i;
   fprintf (stdout, " %d operands ", t->operands);
-  fprintf (stdout, "opcode %x ",
-	   t->base_opcode);
+  fprintf (stdout, "opcode %x ", t->base_opcode);
   if (t->extension_opcode != None)
     fprintf (stdout, "ext %x ", t->extension_opcode);
   if (t->opcode_modifier & D)
@@ -987,7 +993,8 @@ reloc (size, pcrel, other)
      int pcrel;
      bfd_reloc_code_real_type other;
 {
-  if (other != NO_RELOC) return other;
+  if (other != NO_RELOC)
+    return other;
 
   if (pcrel)
     {
@@ -1013,15 +1020,14 @@ reloc (size, pcrel, other)
   return BFD_RELOC_NONE;
 }
 
-/*
- * Here we decide which fixups can be adjusted to make them relative to
- * the beginning of the section instead of the symbol.  Basically we need
- * to make sure that the dynamic relocations are done correctly, so in
- * some cases we force the original symbol to be used.
- */
+/* Here we decide which fixups can be adjusted to make them relative to
+   the beginning of the section instead of the symbol.  Basically we need
+   to make sure that the dynamic relocations are done correctly, so in
+   some cases we force the original symbol to be used.  */
+
 int
 tc_i386_fix_adjustable (fixP)
-     fixS * fixP;
+     fixS *fixP;
 {
 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
   /* Prevent all adjustments to global symbols, or else dynamic
@@ -1050,14 +1056,13 @@ tc_i386_fix_adjustable (fixP)
 #define BFD_RELOC_386_GOTOFF	0
 #endif
 
-static int
-intel_float_operand PARAMS ((char *mnemonic));
+static int intel_float_operand PARAMS ((char *mnemonic));
 
 static int
 intel_float_operand (mnemonic)
      char *mnemonic;
 {
-  if (mnemonic[0] == 'f' && mnemonic[1] =='i')
+  if (mnemonic[0] == 'f' && mnemonic[1] == 'i')
     return 2;
 
   if (mnemonic[0] == 'f')
@@ -1074,7 +1079,7 @@ void
 md_assemble (line)
      char *line;
 {
-  /* Points to template once we've found it. */
+  /* Points to template once we've found it.  */
   const template *t;
 
   /* Count the size of the instruction generated.  */
@@ -1084,7 +1089,7 @@ md_assemble (line)
 
   char mnemonic[MAX_MNEM_SIZE];
 
-  /* Initialize globals. */
+  /* Initialize globals.  */
   memset (&i, '\0', sizeof (i));
   for (j = 0; j < MAX_OPERANDS; j++)
     i.disp_reloc[j] = NO_RELOC;
@@ -1094,13 +1099,13 @@ md_assemble (line)
 
   /* First parse an instruction mnemonic & call i386_operand for the operands.
      We assume that the scrubber has arranged it so that line[0] is the valid
-     start of a (possibly prefixed) mnemonic. */
+     start of a (possibly prefixed) mnemonic.  */
   {
     char *l = line;
     char *token_start = l;
     char *mnem_p;
 
-    /* Non-zero if we found a prefix only acceptable with string insns. */
+    /* Non-zero if we found a prefix only acceptable with string insns.  */
     const char *expecting_string_instruction = NULL;
 
     while (1)
@@ -1157,8 +1162,7 @@ md_assemble (line)
 	      case 0:
 		return;
 	      case 2:
-		expecting_string_instruction =
-		  current_templates->start->name;
+		expecting_string_instruction = current_templates->start->name;
 		break;
 	      }
 	    /* Skip past PREFIX_SEPARATOR and reset token_start.  */
@@ -1202,12 +1206,12 @@ md_assemble (line)
     /* Check if instruction is supported on specified architecture.  */
     if (cpu_arch_flags != 0)
       {
-	if (current_templates->start->cpu_flags & ~ cpu_arch_flags)
+	if (current_templates->start->cpu_flags & ~cpu_arch_flags)
 	  {
 	    as_warn (_("`%s' is not supported on `%s'"),
 		     current_templates->start->name, cpu_arch_name);
 	  }
-	else if ((Cpu386 & ~ cpu_arch_flags) && !flag_16bit_code)
+	else if ((Cpu386 & ~cpu_arch_flags) && !flag_16bit_code)
 	  {
 	    as_warn (_("use .code16 to ensure correct addressing mode"));
 	  }
@@ -1222,15 +1226,15 @@ md_assemble (line)
 	return;
       }
 
-    /* There may be operands to parse. */
+    /* There may be operands to parse.  */
     if (*l != END_OF_INSN)
       {
 	/* parse operands */
 
-	/* 1 if operand is pending after ','. */
+	/* 1 if operand is pending after ','.  */
 	unsigned int expecting_operand = 0;
 
-	/* Non-zero if operand parens not balanced. */
+	/* Non-zero if operand parens not balanced.  */
 	unsigned int paren_not_balanced;
 
 	do
@@ -1288,7 +1292,7 @@ md_assemble (line)
 		l++;
 	      }
 	    if (l != token_start)
-	      {			/* yes, we've read in another operand */
+	      {			/* Yes, we've read in another operand.  */
 		unsigned int operand_ok;
 		this_operand = i.operands++;
 		if (i.operands > MAX_OPERANDS)
@@ -1297,11 +1301,13 @@ md_assemble (line)
 			    MAX_OPERANDS);
 		    return;
 		  }
-		/* now parse operand adding info to 'i' as we go along */
+		/* Now parse operand adding info to 'i' as we go along.  */
 		END_STRING_AND_SAVE (l);
 
 		if (intel_syntax)
-		  operand_ok = i386_intel_operand (token_start, intel_float_operand (mnemonic));
+		  operand_ok =
+		    i386_intel_operand (token_start,
+					intel_float_operand (mnemonic));
 		else
 		  operand_ok = i386_operand (token_start);
 
@@ -1343,7 +1349,7 @@ md_assemble (line)
 
      Next, we find a template that matches the given insn,
      making sure the overlap of the given operands types is consistent
-     with the template operand types. */
+     with the template operand types.  */
 
 #define MATCH(overlap, given, template) \
   ((overlap & ~JumpAbsolute) \
@@ -1419,7 +1425,7 @@ md_assemble (line)
 	       We can't do this properly yet, ie. excluding InOutPortReg,
 	       but the following works for instructions with immediates.
 	       In any case, we can't set i.suffix yet.  */
-	    for (op = i.operands; --op >= 0; )
+	    for (op = i.operands; --op >= 0;)
 	      if (i.types[op] & Reg)
 		{
 		  if (i.types[op] & Reg8)
@@ -1432,7 +1438,7 @@ md_assemble (line)
 	else if (flag_16bit_code ^ (i.prefix[DATA_PREFIX] != 0))
 	  guess_suffix = WORD_MNEM_SUFFIX;
 
-	for (op = i.operands; --op >= 0; )
+	for (op = i.operands; --op >= 0;)
 	  if ((i.types[op] & Imm)
 	      && i.op[op].imms->X_op == O_constant)
 	    {
@@ -1466,7 +1472,7 @@ md_assemble (line)
 	/* Try to use the smallest displacement type too.  */
 	int op;
 
-	for (op = i.operands; --op >= 0; )
+	for (op = i.operands; --op >= 0;)
 	  if ((i.types[op] & Disp)
 	      && i.op[op].imms->X_op == O_constant)
 	    {
@@ -1478,7 +1484,7 @@ md_assemble (line)
 		     convert to a signed 16 bit number before trying
 		     to see whether it will fit in an even smaller
 		     size.  */
-		  
+
 		  disp = (((disp & 0xffff) ^ 0x8000) - 0x8000);
 		}
 	      if (fits_in_signed_byte (disp))
@@ -1506,7 +1512,7 @@ md_assemble (line)
 	 t < current_templates->end;
 	 t++)
       {
-	/* Must have right number of operands. */
+	/* Must have right number of operands.  */
 	if (i.operands != t->operands)
 	  continue;
 
@@ -1519,7 +1525,8 @@ md_assemble (line)
 	  continue;
 
 	else if (!t->operands)
-	  break;		/* 0 operands always matches */
+	  /* 0 operands always matches.  */
+	  break;
 
 	overlap0 = i.types[0] & t->operand_types[0];
 	switch (t->operands)
@@ -1538,12 +1545,11 @@ md_assemble (line)
 					       overlap1, i.types[1],
 					       t->operand_types[1]))
 	      {
-
-		/* check if other direction is valid ... */
+		/* Check if other direction is valid ...  */
 		if ((t->opcode_modifier & (D|FloatD)) == 0)
 		  continue;
 
-		/* try reversing direction of operands */
+		/* Try reversing direction of operands.  */
 		overlap0 = i.types[0] & t->operand_types[1];
 		overlap1 = i.types[1] & t->operand_types[0];
 		if (!MATCH (overlap0, i.types[0], t->operand_types[1])
@@ -1553,7 +1559,7 @@ md_assemble (line)
 						   overlap1, i.types[1],
 						   t->operand_types[0]))
 		  {
-		    /* does not match either direction */
+		    /* Does not match either direction.  */
 		    continue;
 		  }
 		/* found_reverse_match holds which of D or FloatDR
@@ -1561,7 +1567,7 @@ md_assemble (line)
 		found_reverse_match = t->opcode_modifier & (D|FloatDR);
 		break;
 	      }
-	    /* found a forward 2 operand match here */
+	    /* Found a forward 2 operand match here.  */
 	    if (t->operands == 3)
 	      {
 		/* Here we make use of the fact that there are no
@@ -1577,13 +1583,15 @@ md_assemble (line)
 
 		  continue;
 	      }
-	    /* found either forward/reverse 2 or 3 operand match here:
+	    /* Found either forward/reverse 2 or 3 operand match here:
 	       slip through to break */
 	  }
-	break;			/* we've found a match; break out of loop */
-      }				/* for (t = ... */
+	/* We've found a match; break out of loop.  */
+	break;
+      }				/* for (t = ...  */
     if (t == current_templates->end)
-      {				/* we found no match */
+      {
+	/* We found no match.  */
 	as_bad (_("suffix or operands invalid for `%s'"),
 		current_templates->start->name);
 	return;
@@ -1674,14 +1682,14 @@ md_assemble (line)
     else if (i.reg_operands)
       {
 	/* If there's no instruction mnemonic suffix we try to invent one
-	   based on register operands. */
+	   based on register operands.  */
 	if (!i.suffix)
 	  {
 	    /* We take i.suffix from the last register operand specified,
 	       Destination register type is more significant than source
 	       register type.  */
 	    int op;
-	    for (op = i.operands; --op >= 0; )
+	    for (op = i.operands; --op >= 0;)
 	      if ((i.types[op] & Reg)
 		  && !(i.tm.operand_types[op] & InOutPortReg))
 		{
@@ -1694,15 +1702,15 @@ md_assemble (line)
 	else if (i.suffix == BYTE_MNEM_SUFFIX)
 	  {
 	    int op;
-	    for (op = i.operands; --op >= 0; )
+	    for (op = i.operands; --op >= 0;)
 	      {
 		/* If this is an eight bit register, it's OK.  If it's
 		   the 16 or 32 bit version of an eight bit register,
-		   we will just use the low portion, and that's OK too. */
+		   we will just use the low portion, and that's OK too.  */
 		if (i.types[op] & Reg8)
 		  continue;
 
-		/* movzx and movsx should not generate this warning. */
+		/* movzx and movsx should not generate this warning.  */
 		if (intel_syntax
 		    && (i.tm.base_opcode == 0xfb7
 			|| i.tm.base_opcode == 0xfb6
@@ -1746,11 +1754,12 @@ md_assemble (line)
 	else if (i.suffix == LONG_MNEM_SUFFIX)
 	  {
 	    int op;
-	    for (op = i.operands; --op >= 0; )
+
+	    for (op = i.operands; --op >= 0;)
 	      /* Reject eight bit registers, except where the template
 		 requires them. (eg. movzb)  */
 	      if ((i.types[op] & Reg8) != 0
-		  && (i.tm.operand_types[op] & (Reg16|Reg32|Acc)) != 0)
+		  && (i.tm.operand_types[op] & (Reg16 | Reg32 | Acc)) != 0)
 		{
 		  as_bad (_("`%%%s' not allowed with `%s%c'"),
 			  i.op[op].regs->reg_name,
@@ -1774,7 +1783,7 @@ md_assemble (line)
 	else if (i.suffix == WORD_MNEM_SUFFIX)
 	  {
 	    int op;
-	    for (op = i.operands; --op >= 0; )
+	    for (op = i.operands; --op >= 0;)
 	      /* Reject eight bit registers, except where the template
 		 requires them. (eg. movzb)  */
 	      if ((i.types[op] & Reg8) != 0
@@ -1800,7 +1809,7 @@ md_assemble (line)
 #endif
 	  }
 	else
-	  abort();
+	  abort ();
       }
     else if ((i.tm.opcode_modifier & DefaultSize) && !i.suffix)
       {
@@ -1928,7 +1937,7 @@ md_assemble (line)
 
 	expressionS *exp;
 
-	assert(i.imm_operands == 0 && i.operands <= 2 && 2 < MAX_OPERANDS);
+	assert (i.imm_operands == 0 && i.operands <= 2 && 2 < MAX_OPERANDS);
 
 	exp = &im_expressions[i.imm_operands++];
 	i.op[i.operands].imms = exp;
@@ -1938,7 +1947,7 @@ md_assemble (line)
 	i.tm.extension_opcode = None;
       }
 
-    /* For insns with operands there are more diddles to do to the opcode. */
+    /* For insns with operands there are more diddles to do to the opcode.  */
     if (i.operands)
       {
 	/* Default segment register this instruction will use
@@ -1952,18 +1961,18 @@ md_assemble (line)
 	if (i.tm.opcode_modifier & regKludge)
 	  {
 	    unsigned int first_reg_op = (i.types[0] & Reg) ? 0 : 1;
-	    /* Pretend we saw the extra register operand. */
-	    assert (i.op[first_reg_op+1].regs == 0);
-	    i.op[first_reg_op+1].regs = i.op[first_reg_op].regs;
-	    i.types[first_reg_op+1] = i.types[first_reg_op];
+	    /* Pretend we saw the extra register operand.  */
+	    assert (i.op[first_reg_op + 1].regs == 0);
+	    i.op[first_reg_op + 1].regs = i.op[first_reg_op].regs;
+	    i.types[first_reg_op + 1] = i.types[first_reg_op];
 	    i.reg_operands = 2;
 	  }
 
 	if (i.tm.opcode_modifier & ShortForm)
 	  {
-	    /* The register or float register operand is in operand 0 or 1. */
+	    /* The register or float register operand is in operand 0 or 1.  */
 	    unsigned int op = (i.types[0] & (Reg | FloatReg)) ? 0 : 1;
-	    /* Register goes in low 3 bits of opcode. */
+	    /* Register goes in low 3 bits of opcode.  */
 	    i.tm.base_opcode |= i.op[op].regs->reg_num;
 	    if (!quiet_warnings && (i.tm.opcode_modifier & Ugh) != 0)
 	      {
@@ -1971,14 +1980,14 @@ md_assemble (line)
 		   The first case can be generated by gcc (<= 2.8.1).  */
 		if (i.operands == 2)
 		  {
-		    /* reversed arguments on faddp, fsubp, etc. */
+		    /* Reversed arguments on faddp, fsubp, etc.  */
 		    as_warn (_("translating to `%s %%%s,%%%s'"), i.tm.name,
 			     i.op[1].regs->reg_name,
 			     i.op[0].regs->reg_name);
 		  }
 		else
 		  {
-		    /* extraneous `l' suffix on fp insn */
+		    /* Extraneous `l' suffix on fp insn.  */
 		    as_warn (_("translating to `%s %%%s'"), i.tm.name,
 			     i.op[0].regs->reg_name);
 		  }
@@ -1989,10 +1998,10 @@ md_assemble (line)
 	    /* The opcode is completed (modulo i.tm.extension_opcode which
 	       must be put into the modrm byte).
 	       Now, we make the modrm & index base bytes based on all the
-	       info we've collected. */
+	       info we've collected.  */
 
 	    /* i.reg_operands MUST be the number of real register operands;
-	       implicit registers do not count. */
+	       implicit registers do not count.  */
 	    if (i.reg_operands == 2)
 	      {
 		unsigned int source, dest;
@@ -2023,7 +2032,7 @@ md_assemble (line)
 		  }
 	      }
 	    else
-	      {			/* if it's not 2 reg operands... */
+	      {			/* If it's not 2 reg operands...  */
 		if (i.mem_operands)
 		  {
 		    unsigned int fake_zero_displacement = 0;
@@ -2040,7 +2049,7 @@ md_assemble (line)
 			  fake_zero_displacement = 1;
 			if (! i.index_reg)
 			  {
-			    /* Operand is just <disp> */
+			    /* Operand is just <disp>  */
 			    if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0))
 			      {
 				i.rm.regmem = NO_BASE_REGISTER_16;
@@ -2054,47 +2063,47 @@ md_assemble (line)
 				i.types[op] |= Disp32;
 			      }
 			  }
-			else /* ! i.base_reg && i.index_reg */
+			else /* ! i.base_reg && i.index_reg  */
 			  {
 			    i.sib.index = i.index_reg->reg_num;
 			    i.sib.base = NO_BASE_REGISTER;
 			    i.sib.scale = i.log2_scale_factor;
 			    i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
 			    i.types[op] &= ~Disp;
-			    i.types[op] |= Disp32;	/* Must be 32 bit */
+			    i.types[op] |= Disp32;	/* Must be 32 bit.  */
 			  }
 		      }
 		    else if (i.base_reg->reg_type & Reg16)
 		      {
 			switch (i.base_reg->reg_num)
 			  {
-			  case 3: /* (%bx) */
+			  case 3: /* (%bx)  */
 			    if (! i.index_reg)
 			      i.rm.regmem = 7;
-			    else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
+			    else /* (%bx,%si) -> 0, or (%bx,%di) -> 1  */
 			      i.rm.regmem = i.index_reg->reg_num - 6;
 			    break;
-			  case 5: /* (%bp) */
+			  case 5: /* (%bp)  */
 			    default_seg = &ss;
 			    if (! i.index_reg)
 			      {
 				i.rm.regmem = 6;
 				if ((i.types[op] & Disp) == 0)
 				  {
-				    /* fake (%bp) into 0(%bp) */
+				    /* fake (%bp) into 0(%bp)  */
 				    i.types[op] |= Disp8;
 				    fake_zero_displacement = 1;
 				  }
 			      }
-			    else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
+			    else /* (%bp,%si) -> 2, or (%bp,%di) -> 3  */
 			      i.rm.regmem = i.index_reg->reg_num - 6 + 2;
 			    break;
-			  default: /* (%si) -> 4 or (%di) -> 5 */
+			  default: /* (%si) -> 4 or (%di) -> 5  */
 			    i.rm.regmem = i.base_reg->reg_num - 6 + 4;
 			  }
 			i.rm.mode = mode_from_disp_size (i.types[op]);
 		      }
-		    else /* i.base_reg and 32 bit mode */
+		    else /* i.base_reg and 32 bit mode  */
 		      {
 			i.rm.regmem = i.base_reg->reg_num;
 			i.sib.base = i.base_reg->reg_num;
@@ -2139,7 +2148,7 @@ md_assemble (line)
 		    if (fake_zero_displacement)
 		      {
 			/* Fakes a zero displacement assuming that i.types[op]
-			   holds the correct displacement size. */
+			   holds the correct displacement size.  */
 			expressionS *exp;
 
 			assert (i.op[op].disps == 0);
@@ -2156,7 +2165,7 @@ md_assemble (line)
 		   operand (if any) based on i.tm.extension_opcode.
 		   Again, we must be careful to make sure that
 		   segment/control/debug/test/MMX registers are coded
-		   into the i.rm.reg field. */
+		   into the i.rm.reg field.  */
 		if (i.reg_operands)
 		  {
 		    unsigned int op =
@@ -2172,7 +2181,7 @@ md_assemble (line)
 			  ? 1
 			  : 2));
 		    /* If there is an extension opcode to put here, the
-		       register number must be put into the regmem field. */
+		       register number must be put into the regmem field.  */
 		    if (i.tm.extension_opcode != None)
 		      i.rm.regmem = i.op[op].regs->reg_num;
 		    else
@@ -2185,14 +2194,15 @@ md_assemble (line)
 		      i.rm.mode = 3;
 		  }
 
-		/* Fill in i.rm.reg field with extension opcode (if any). */
+		/* Fill in i.rm.reg field with extension opcode (if any).  */
 		if (i.tm.extension_opcode != None)
 		  i.rm.reg = i.tm.extension_opcode;
 	      }
 	  }
 	else if (i.tm.opcode_modifier & (Seg2ShortForm | Seg3ShortForm))
 	  {
-	    if (i.tm.base_opcode == POP_SEG_SHORT && i.op[0].regs->reg_num == 1)
+	    if (i.tm.base_opcode == POP_SEG_SHORT
+		&& i.op[0].regs->reg_num == 1)
 	      {
 		as_bad (_("you can't `pop %%cs'"));
 		return;
@@ -2229,7 +2239,7 @@ md_assemble (line)
       }
   }
 
-  /* Handle conversion of 'int $3' --> special int3 insn. */
+  /* Handle conversion of 'int $3' --> special int3 insn.  */
   if (i.tm.base_opcode == INT_OPCODE && i.op[0].imms->X_add_number == 3)
     {
       i.tm.base_opcode = INT3_OPCODE;
@@ -2246,11 +2256,11 @@ md_assemble (line)
       i.op[0].disps->X_op = O_symbol;
     }
 
-  /* We are ready to output the insn. */
+  /* We are ready to output the insn.  */
   {
     register char *p;
 
-    /* Output jumps. */
+    /* Output jumps.  */
     if (i.tm.opcode_modifier & Jump)
       {
 	int size;
@@ -2346,7 +2356,7 @@ md_assemble (line)
 	  }
 	else
 	  {
-	    /* opcode can be at most two bytes */
+	    /* Opcode can be at most two bytes.  */
 	    insn_size += 2 + size;
 	    p = frag_more (2 + size);
 	    *p++ = (i.tm.base_opcode >> 8) & 0xff;
@@ -2381,7 +2391,8 @@ md_assemble (line)
 	if (i.prefixes != 0 && !intel_syntax)
 	  as_warn (_("skipping prefixes on this instruction"));
 
-	insn_size += prefix + 1 + 2 + size;  /* 1 opcode; 2 segment; offset */
+	/* 1 opcode; 2 segment; offset  */
+	insn_size += prefix + 1 + 2 + size;
 	p = frag_more (prefix + 1 + 2 + size);
 	if (prefix)
 	  *p++ = DATA_PREFIX_OPCODE;
@@ -2409,10 +2420,10 @@ md_assemble (line)
       }
     else
       {
-	/* Output normal instructions here. */
+	/* Output normal instructions here.  */
 	unsigned char *q;
 
-	/* The prefix bytes. */
+	/* The prefix bytes.  */
 	for (q = i.prefix;
 	     q < i.prefix + sizeof (i.prefix) / sizeof (i.prefix[0]);
 	     q++)
@@ -2425,7 +2436,7 @@ md_assemble (line)
 	      }
 	  }
 
-	/* Now the opcode; be careful about word order here! */
+	/* Now the opcode; be careful about word order here!  */
 	if (fits_in_unsigned_byte (i.tm.base_opcode))
 	  {
 	    insn_size += 1;
@@ -2435,12 +2446,12 @@ md_assemble (line)
 	  {
 	    insn_size += 2;
 	    p = frag_more (2);
-	    /* put out high byte first: can't use md_number_to_chars! */
+	    /* Put out high byte first: can't use md_number_to_chars!  */
 	    *p++ = (i.tm.base_opcode >> 8) & 0xff;
 	    *p = i.tm.base_opcode & 0xff;
 	  }
 	else
-	  {			/* opcode is either 3 or 4 bytes */
+	  {			/* Opcode is either 3 or 4 bytes.  */
 	    if (i.tm.base_opcode & 0xff000000)
 	      {
 		insn_size += 4;
@@ -2526,9 +2537,9 @@ md_assemble (line)
 		      }
 		  }
 	      }
-	  }			/* end displacement output */
+	  }			/* End displacement output.  */
 
-	/* output immediate */
+	/* Output immediate.  */
 	if (i.imm_operands)
 	  {
 	    register unsigned int n;
@@ -2556,10 +2567,10 @@ md_assemble (line)
 			md_number_to_chars (p, val, size);
 		      }
 		    else
-		      {		/* not absolute_section */
+		      {		/* Not absolute_section.  */
 			/* Need a 32-bit fixup (don't support 8bit
 			   non-absolute imms).  Try to support other
-			   sizes ... */
+			   sizes ...  */
 #ifdef BFD_ASSEMBLER
 			enum bfd_reloc_code_real reloc_type;
 #else
@@ -2594,7 +2605,7 @@ md_assemble (line)
 		      }
 		  }
 	      }
-	  }			/* end immediate output */
+	  }			/* end immediate output  */
       }
 
 #ifdef DEBUG386
@@ -2602,7 +2613,7 @@ md_assemble (line)
       {
 	pi (line, &i);
       }
-#endif /* DEBUG386 */
+#endif /* DEBUG386  */
   }
 }
 
@@ -2614,7 +2625,7 @@ i386_immediate (imm_start)
 {
   char *save_input_line_pointer;
   segT exp_seg = 0;
-  expressionS * exp;
+  expressionS *exp;
 
   if (i.imm_operands == MAX_IMMEDIATE_OPERANDS)
     {
@@ -2633,12 +2644,10 @@ i386_immediate (imm_start)
 
 #ifndef LEX_AT
   {
-    /*
-     * We can have operands of the form
-     *   <symbol>@GOTOFF+<nnn>
-     * Take the easy way out here and copy everything
-     * into a temporary buffer...
-     */
+    /* We can have operands of the form
+         <symbol>@GOTOFF+<nnn>
+       Take the easy way out here and copy everything
+       into a temporary buffer...  */
     register char *cp;
 
     cp = strchr (input_line_pointer, '@');
@@ -2648,7 +2657,7 @@ i386_immediate (imm_start)
 	int len = 0;
 	int first;
 
-	/* GOT relocations are not supported in 16 bit mode */
+	/* GOT relocations are not supported in 16 bit mode.  */
 	if (flag_16bit_code)
 	  as_bad (_("GOT relocations not supported in 16 bit mode"));
 
@@ -2676,7 +2685,7 @@ i386_immediate (imm_start)
 	/* Replace the relocation token with ' ', so that errors like
 	   foo@GOTOFF1 will be detected.  */
 	first = cp - input_line_pointer;
-	tmpbuf = (char *) alloca (strlen(input_line_pointer));
+	tmpbuf = (char *) alloca (strlen (input_line_pointer));
 	memcpy (tmpbuf, input_line_pointer, first);
 	tmpbuf[first] = ' ';
 	strcpy (tmpbuf + first + 1, cp + 1 + len);
@@ -2695,7 +2704,7 @@ i386_immediate (imm_start)
 
   if (exp->X_op == O_absent || exp->X_op == O_big)
     {
-      /* missing or bad expr becomes absolute 0 */
+      /* Missing or bad expr becomes absolute 0.  */
       as_bad (_("missing or invalid immediate expression `%s' taken as 0"),
 	      imm_start);
       exp->X_op = O_constant;
@@ -2706,14 +2715,15 @@ i386_immediate (imm_start)
 
   if (exp->X_op == O_constant)
     {
-      i.types[this_operand] |= Imm32;	/* Size it properly later.  */
+      /* Size it properly later.  */
+      i.types[this_operand] |= Imm32;
     }
 #if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
-  else if (
+  else if (1
 #ifdef BFD_ASSEMBLER
-	   OUTPUT_FLAVOR == bfd_target_aout_flavour &&
+	   && OUTPUT_FLAVOR == bfd_target_aout_flavour
 #endif
-	   exp_seg != text_section
+	   && exp_seg != text_section
 	   && exp_seg != data_section
 	   && exp_seg != bss_section
 	   && exp_seg != undefined_section
@@ -2846,20 +2856,17 @@ i386_displacement (disp_start, disp_end)
 	 rorl $16,%edx
 	 #NO_APP
 
-	 So here we provide the missing zero.
-      */
+	 So here we provide the missing zero.  */
 
       *displacement_string_end = '0';
     }
 #endif
 #ifndef LEX_AT
   {
-    /*
-     * We can have operands of the form
-     *   <symbol>@GOTOFF+<nnn>
-     * Take the easy way out here and copy everything
-     * into a temporary buffer...
-     */
+    /* We can have operands of the form
+         <symbol>@GOTOFF+<nnn>
+       Take the easy way out here and copy everything
+       into a temporary buffer...  */
     register char *cp;
 
     cp = strchr (input_line_pointer, '@');
@@ -2869,7 +2876,7 @@ i386_displacement (disp_start, disp_end)
 	int len = 0;
 	int first;
 
-	/* GOT relocations are not supported in 16 bit mode */
+	/* GOT relocations are not supported in 16 bit mode.  */
 	if (flag_16bit_code)
 	  as_bad (_("GOT relocations not supported in 16 bit mode"));
 
@@ -2897,7 +2904,7 @@ i386_displacement (disp_start, disp_end)
 	/* Replace the relocation token with ' ', so that errors like
 	   foo@GOTOFF1 will be detected.  */
 	first = cp - input_line_pointer;
-	tmpbuf = (char *) alloca (strlen(input_line_pointer));
+	tmpbuf = (char *) alloca (strlen (input_line_pointer));
 	memcpy (tmpbuf, input_line_pointer, first);
 	tmpbuf[first] = ' ';
 	strcpy (tmpbuf + first + 1, cp + 1 + len);
@@ -2911,7 +2918,7 @@ i386_displacement (disp_start, disp_end)
 #ifdef BFD_ASSEMBLER
   /* We do this to make sure that the section symbol is in
      the symbol table.  We will ultimately change the relocation
-     to be relative to the beginning of the section */
+     to be relative to the beginning of the section.  */
   if (i.disp_reloc[this_operand] == BFD_RELOC_386_GOTOFF)
     {
       if (S_IS_LOCAL(exp->X_add_symbol)
@@ -2936,7 +2943,7 @@ i386_displacement (disp_start, disp_end)
 
   if (exp->X_op == O_absent || exp->X_op == O_big)
     {
-      /* missing or bad expr becomes absolute 0 */
+      /* Missing or bad expr becomes absolute 0.  */
       as_bad (_("missing or invalid displacement expression `%s' taken as 0"),
 	      disp_start);
       exp->X_op = O_constant;
@@ -2982,7 +2989,7 @@ i386_operand_modifier (op_string, got_a_float)
     }
   else if (!strncasecmp (*op_string, "WORD PTR", 8))
     {
-      if (got_a_float == 2)	/* "fi..." */
+      if (got_a_float == 2)	/* "fi..."  */
 	i.suffix = SHORT_MNEM_SUFFIX;
       else
 	i.suffix = WORD_MNEM_SUFFIX;
@@ -2992,7 +2999,7 @@ i386_operand_modifier (op_string, got_a_float)
 
   else if (!strncasecmp (*op_string, "DWORD PTR", 9))
     {
-      if (got_a_float == 1)	/* "f..." */
+      if (got_a_float == 1)	/* "f..."  */
 	i.suffix = SHORT_MNEM_SUFFIX;
       else
 	i.suffix = LONG_MNEM_SUFFIX;
@@ -3055,7 +3062,7 @@ build_displacement_string (initial_disp, op_string)
       return temp_string;
     }
 
-  /* Build the whole displacement string */
+  /* Build the whole displacement string.  */
   if (initial_disp)
     {
       strncpy (temp_string, op_string, end_of_operand_string - op_string);
@@ -3076,7 +3083,7 @@ build_displacement_string (initial_disp, op_string)
       if (is_space_char (*temp_disp))
 	temp_disp++;
 
-      /* Don't consider registers */
+      /* Don't consider registers.  */
       if ( !((*temp_disp == REGISTER_PREFIX || allow_naked_reg)
 	     && parse_register (temp_disp, &end_op)) )
 	{
@@ -3116,7 +3123,7 @@ i386_parse_seg (op_string)
   if (is_space_char (*op_string))
     ++op_string;
 
-  /* Should be one of es, cs, ss, ds fs or gs */
+  /* Should be one of es, cs, ss, ds fs or gs.  */
   switch (*op_string++)
     {
     case 'e':
@@ -3164,8 +3171,8 @@ i386_parse_seg (op_string)
 static int i386_index_check PARAMS((const char *));
 
 /* Make sure the memory operand we've been dealt is valid.
-   Returns 1 on success, 0 on a failure.
-*/
+   Return 1 on success, 0 on a failure.  */
+
 static int
 i386_index_check (operand_string)
      const char *operand_string;
@@ -3176,7 +3183,7 @@ i386_index_check (operand_string)
  tryprefix:
 #endif
   if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0)
-      /* 16 bit mode checks */
+      /* 16 bit mode checks.  */
       ? ((i.base_reg
 	  && ((i.base_reg->reg_type & (Reg16|BaseIndex))
 	      != (Reg16|BaseIndex)))
@@ -3187,7 +3194,7 @@ i386_index_check (operand_string)
 		       && i.base_reg->reg_num < 6
 		       && i.index_reg->reg_num >= 6
 		       && i.log2_scale_factor == 0))))
-      /* 32 bit mode checks */
+      /* 32 bit mode checks.  */
       : ((i.base_reg
 	  && (i.base_reg->reg_type & Reg32) == 0)
 	 || (i.index_reg
@@ -3203,8 +3210,7 @@ i386_index_check (operand_string)
 	     Disp16 or Disp32 is set.
 	     FIXME.  There doesn't seem to be any real need for separate
 	     Disp16 and Disp32 flags.  The same goes for Imm16 and Imm32.
-	     Removing them would probably clean up the code quite a lot.
-	  */
+	     Removing them would probably clean up the code quite a lot.  */
 	  if (i.types[this_operand] & (Disp16|Disp32))
 	     i.types[this_operand] ^= (Disp16|Disp32);
 	  fudged = 1;
@@ -3255,7 +3261,7 @@ i386_intel_memory_operand (operand_string)
 	}
     }
 
-  /* Look for displacement preceding open bracket */
+  /* Look for displacement preceding open bracket.  */
   if (*op_string != '[')
     {
       char *temp_string;
@@ -3384,7 +3390,7 @@ i386_intel_operand (operand_string, got_a_float)
      char *operand_string;
      int got_a_float;
 {
-  const reg_entry * r;
+  const reg_entry *r;
   char *end_op;
   char *op_string = operand_string;
 
@@ -3470,7 +3476,7 @@ i386_intel_operand (operand_string, got_a_float)
 }
 
 /* Parse OPERAND_STRING into the i386_insn structure I.  Returns non-zero
-   on error. */
+   on error.  */
 
 static int
 i386_operand (operand_string)
@@ -3484,7 +3490,7 @@ i386_operand (operand_string)
     ++op_string;
 
   /* We check for an absolute prefix (differentiating,
-     for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
+     for example, 'jmp pc_relative_label' from 'jmp *absolute_label'.  */
   if (*op_string == ABSOLUTE_PREFIX)
     {
       ++op_string;
@@ -3493,7 +3499,7 @@ i386_operand (operand_string)
       i.types[this_operand] |= JumpAbsolute;
     }
 
-  /* Check if operand is a register. */
+  /* Check if operand is a register.  */
   if ((*op_string == REGISTER_PREFIX || allow_naked_reg)
       && (r = parse_register (op_string, &end_op)) != NULL)
     {
@@ -3539,7 +3545,7 @@ i386_operand (operand_string)
 	      as_bad (_("bad memory operand `%s'"), op_string);
 	      return 0;
 	    }
-	  /* Handle case of %es:*foo. */
+	  /* Handle case of %es:*foo.  */
 	  if (*op_string == ABSOLUTE_PREFIX)
 	    {
 	      ++op_string;
@@ -3564,7 +3570,7 @@ i386_operand (operand_string)
       return 0;
     }
   else if (*op_string == IMMEDIATE_PREFIX)
-    {				/* ... or an immediate */
+    {				/* ... or an immediate  */
       ++op_string;
       if (i.types[this_operand] & JumpAbsolute)
 	{
@@ -3578,10 +3584,10 @@ i386_operand (operand_string)
 	   || is_identifier_char (*op_string)
 	   || *op_string == '(' )
     {
-      /* This is a memory reference of some sort. */
+      /* This is a memory reference of some sort.  */
       char *base_string;
 
-      /* Start and end of displacement string expression (if found). */
+      /* Start and end of displacement string expression (if found).  */
       char *displacement_string_start;
       char *displacement_string_end;
 
@@ -3605,7 +3611,7 @@ i386_operand (operand_string)
       if (is_space_char (*base_string))
 	--base_string;
 
-      /* If we only have a displacement, set-up for it to be parsed later. */
+      /* If we only have a displacement, set-up for it to be parsed later.  */
       displacement_string_start = op_string;
       displacement_string_end = base_string + 1;
 
@@ -3614,7 +3620,7 @@ i386_operand (operand_string)
 	  char *temp_string;
 	  unsigned int parens_balanced = 1;
 	  /* We've already checked that the number of left & right ()'s are
-	     equal, so this loop will not be infinite. */
+	     equal, so this loop will not be infinite.  */
 	  do
 	    {
 	      base_string--;
@@ -3679,7 +3685,7 @@ i386_operand (operand_string)
 		      return 0;
 		    }
 
-		  /* Check for scale factor. */
+		  /* Check for scale factor.  */
 		  if (isdigit ((unsigned char) *base_string))
 		    {
 		      if (!i386_scale (base_string))
@@ -3743,14 +3749,14 @@ i386_operand (operand_string)
       i.mem_operands++;
     }
   else
-    {				/* it's not a memory operand; argh! */
+    {				/* It's not a memory operand; argh!  */
       as_bad (_("invalid char %s beginning operand %d `%s'"),
 	      output_invalid (*op_string),
 	      this_operand + 1,
 	      op_string);
       return 0;
     }
-  return 1;			/* normal return */
+  return 1;			/* Normal return.  */
 }
 
 /* md_estimate_size_before_relax()
@@ -3805,8 +3811,10 @@ md_estimate_size_before_relax (fragP, segment)
 
       switch (opcode[0])
 	{
-	case JUMP_PC_RELATIVE:	/* make jmp (0xeb) a dword displacement jump */
-	  opcode[0] = 0xe9;	/* dword disp jmp */
+	case JUMP_PC_RELATIVE:
+	  /* Make jmp (0xeb) a dword displacement jump.  */
+	  /* dword disp jmp  */
+	  opcode[0] = 0xe9;
 	  fragP->fr_fix += size;
 	  fix_new (fragP, old_fr_fix, size,
 		   fragP->fr_symbol,
@@ -3819,7 +3827,8 @@ md_estimate_size_before_relax (fragP, segment)
 	     to the dword-displacement jump 0x0f,0x8N.  */
 	  opcode[1] = opcode[0] + 0x10;
 	  opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
-	  fragP->fr_fix += 1 + size;	/* we've added an opcode byte */
+	  /* We've added an opcode byte.  */
+	  fragP->fr_fix += 1 + size;
 	  fix_new (fragP, old_fr_fix + 1, size,
 		   fragP->fr_symbol,
 		   fragP->fr_offset, 1,
@@ -3829,20 +3838,19 @@ md_estimate_size_before_relax (fragP, segment)
       frag_wane (fragP);
       return fragP->fr_fix - old_fr_fix;
     }
-  return 1; /* Guess a short jump.  */
+  /* Guess a short jump.  */
+  return 1;
 }
 
-/*
- *			md_convert_frag();
- *
- * Called after relax() is finished.
- * In:	Address of frag.
- *	fr_type == rs_machine_dependent.
- *	fr_subtype is what the address relaxed to.
- *
- * Out:	Any fixSs and constants are set up.
- *	Caller will turn frag into a ".space 0".
- */
+/* Called after relax() is finished.
+
+   In:	Address of frag.
+	fr_type == rs_machine_dependent.
+	fr_subtype is what the address relaxed to.
+
+   Out:	Any fixSs and constants are set up.
+	Caller will turn frag into a ".space 0".  */
+
 #ifndef BFD_ASSEMBLER
 void
 md_convert_frag (headers, sec, fragP)
@@ -3866,16 +3874,17 @@ md_convert_frag (abfd, sec, fragP)
 
   opcode = (unsigned char *) fragP->fr_opcode;
 
-  /* Address we want to reach in file space. */
+  /* Address we want to reach in file space.  */
   target_address = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
-#ifdef BFD_ASSEMBLER /* not needed otherwise? */
+#ifdef BFD_ASSEMBLER
+  /* Not needed otherwise?  */
   target_address += symbol_get_frag (fragP->fr_symbol)->fr_address;
 #endif
 
-  /* Address opcode resides at in file space. */
+  /* Address opcode resides at in file space.  */
   opcode_address = fragP->fr_address + fragP->fr_fix;
 
-  /* Displacement from opcode start to fill into instruction. */
+  /* Displacement from opcode start to fill into instruction.  */
   displacement_from_opcode_start = target_address - opcode_address;
 
   switch (fragP->fr_subtype)
@@ -3884,33 +3893,33 @@ md_convert_frag (abfd, sec, fragP)
     case ENCODE_RELAX_STATE (COND_JUMP, SMALL16):
     case ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL):
     case ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL16):
-      /* don't have to change opcode */
-      extension = 1;		/* 1 opcode + 1 displacement */
+      /* Don't have to change opcode.  */
+      extension = 1;		/* 1 opcode + 1 displacement  */
       where_to_put_displacement = &opcode[1];
       break;
 
     case ENCODE_RELAX_STATE (COND_JUMP, BIG):
-      extension = 5;		/* 2 opcode + 4 displacement */
+      extension = 5;		/* 2 opcode + 4 displacement  */
       opcode[1] = opcode[0] + 0x10;
       opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
       where_to_put_displacement = &opcode[2];
       break;
 
     case ENCODE_RELAX_STATE (UNCOND_JUMP, BIG):
-      extension = 4;		/* 1 opcode + 4 displacement */
+      extension = 4;		/* 1 opcode + 4 displacement  */
       opcode[0] = 0xe9;
       where_to_put_displacement = &opcode[1];
       break;
 
     case ENCODE_RELAX_STATE (COND_JUMP, BIG16):
-      extension = 3;		/* 2 opcode + 2 displacement */
+      extension = 3;		/* 2 opcode + 2 displacement  */
       opcode[1] = opcode[0] + 0x10;
       opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
       where_to_put_displacement = &opcode[2];
       break;
 
     case ENCODE_RELAX_STATE (UNCOND_JUMP, BIG16):
-      extension = 2;		/* 1 opcode + 2 displacement */
+      extension = 2;		/* 1 opcode + 2 displacement  */
       opcode[0] = 0xe9;
       where_to_put_displacement = &opcode[1];
       break;
@@ -3919,17 +3928,21 @@ md_convert_frag (abfd, sec, fragP)
       BAD_CASE (fragP->fr_subtype);
       break;
     }
-  /* now put displacement after opcode */
+  /* Now put displacement after opcode.  */
   md_number_to_chars ((char *) where_to_put_displacement,
 		      (valueT) (displacement_from_opcode_start - extension),
 		      SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
   fragP->fr_fix += extension;
 }
 
+/* Size of byte displacement jmp.  */
+int md_short_jump_size = 2;
+
+/* Size of dword displacement jmp.  */
+int md_long_jump_size = 5;
 
-int md_short_jump_size = 2;	/* size of byte displacement jmp */
-int md_long_jump_size = 5;	/* size of dword displacement jmp */
-const int md_reloc_size = 8;	/* Size of relocation record */
+/* Size of relocation record.  */
+const int md_reloc_size = 8;
 
 void
 md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
@@ -3941,7 +3954,8 @@ md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
   offsetT offset;
 
   offset = to_addr - (from_addr + 2);
-  md_number_to_chars (ptr, (valueT) 0xeb, 1);	/* opcode for byte-disp jump */
+  /* Opcode for byte-disp jump.  */
+  md_number_to_chars (ptr, (valueT) 0xeb, 1);
   md_number_to_chars (ptr + 1, (valueT) offset, 1);
 }
 
@@ -3968,9 +3982,14 @@ md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
 
 int
 md_apply_fix3 (fixP, valp, seg)
-     fixS *fixP;		/* The fix we're to put in.  */
-     valueT *valp;		/* Pointer to the value of the bits.  */
-     segT seg ATTRIBUTE_UNUSED;	/* Segment fix is from.  */
+     /* The fix we're to put in.  */
+     fixS *fixP;
+
+     /* Pointer to the value of the bits.  */
+     valueT *valp;
+
+     /* Segment fix is from.  */
+     segT seg ATTRIBUTE_UNUSED;
 {
   register char *p = fixP->fx_where + fixP->fx_frag->fr_literal;
   valueT value = *valp;
@@ -4042,19 +4061,20 @@ md_apply_fix3 (fixP, valp, seg)
     }
 
   /* Fix a few things - the dynamic linker expects certain values here,
-     and we must not dissappoint it. */
+     and we must not dissappoint it.  */
 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
   if (OUTPUT_FLAVOR == bfd_target_elf_flavour
       && fixP->fx_addsy)
-    switch (fixP->fx_r_type) {
-    case BFD_RELOC_386_PLT32:
-      /* Make the jump instruction point to the address of the operand.  At
-	 runtime we merely add the offset to the actual PLT entry. */
-      value = -4;
-      break;
-    case BFD_RELOC_386_GOTPC:
-/*
- *   This is tough to explain.  We end up with this one if we have
+    switch (fixP->fx_r_type)
+      {
+      case BFD_RELOC_386_PLT32:
+	/* Make the jump instruction point to the address of the operand.  At
+	   runtime we merely add the offset to the actual PLT entry.  */
+	value = -4;
+	break;
+      case BFD_RELOC_386_GOTPC:
+
+/*   This is tough to explain.  We end up with this one if we have
  * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".  The goal
  * here is to obtain the absolute address of the GOT, and it is strongly
  * preferable from a performance point of view to avoid using a runtime
@@ -4089,38 +4109,40 @@ md_apply_fix3 (fixP, valp, seg)
  * explicitly mentioned, and I wonder whether it would simplify matters
  * to do it this way.  Who knows.  In earlier versions of the PIC patches,
  * the pcrel_adjust field was used to store the correction, but since the
- * expression is not pcrel, I felt it would be confusing to do it this way.
- */
-      value -= 1;
-      break;
-    case BFD_RELOC_386_GOT32:
-      value = 0; /* Fully resolved at runtime.  No addend.  */
-      break;
-    case BFD_RELOC_386_GOTOFF:
-      break;
-
-    case BFD_RELOC_VTABLE_INHERIT:
-    case BFD_RELOC_VTABLE_ENTRY:
-      fixP->fx_done = 0;
-      return 1;
-
-    default:
-      break;
-    }
-#endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
+ * expression is not pcrel, I felt it would be confusing to do it this
+ * way.  */
+
+	value -= 1;
+	break;
+      case BFD_RELOC_386_GOT32:
+	value = 0; /* Fully resolved at runtime.  No addend.  */
+	break;
+      case BFD_RELOC_386_GOTOFF:
+	break;
+
+      case BFD_RELOC_VTABLE_INHERIT:
+      case BFD_RELOC_VTABLE_ENTRY:
+	fixP->fx_done = 0;
+	return 1;
+
+      default:
+	break;
+      }
+#endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)  */
   *valp = value;
-#endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
+#endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach)  */
   md_number_to_chars (p, value, fixP->fx_size);
 
   return 1;
 }
 
-
 #define MAX_LITTLENUMS 6
 
-/* Turn the string pointed to by litP into a floating point constant of type
-   type, and emit the appropriate bytes.  The number of LITTLENUMS emitted
-   is stored in *sizeP .  An error message is returned, or NULL on OK.  */
+/* Turn the string pointed to by litP into a floating point constant
+   of type TYPE, and emit the appropriate bytes.  The number of
+   LITTLENUMS emitted is stored in *SIZEP.  An error message is
+   returned, or NULL on OK.  */
+
 char *
 md_atof (type, litP, sizeP)
      int type;
@@ -4181,7 +4203,6 @@ output_invalid (c)
   return output_invalid_buf;
 }
 
-
 /* REG_STRING starts *before* REGISTER_PREFIX.  */
 
 static const reg_entry *
@@ -4214,7 +4235,7 @@ parse_register (reg_string, end_op)
   r = (const reg_entry *) hash_find (reg_hash, reg_name_given);
 
   /* Handle floating point regs, allowing spaces in the (i) part.  */
-  if (r == i386_regtab /* %st is first entry of table */)
+  if (r == i386_regtab /* %st is first entry of table  */)
     {
       if (is_space_char (*s))
 	++s;
@@ -4235,7 +4256,7 @@ parse_register (reg_string, end_op)
 		  return r;
 		}
 	    }
-	  /* We have "%st(" then garbage */
+	  /* We have "%st(" then garbage.  */
 	  return (const reg_entry *) NULL;
 	}
     }
@@ -4315,14 +4336,14 @@ md_show_usage (stream)
 
 /* Pick the target format to use.  */
 
-const char  *
+const char *
 i386_target_format ()
 {
   switch (OUTPUT_FLAVOR)
     {
 #ifdef OBJ_MAYBE_AOUT
     case bfd_target_aout_flavour:
-     return AOUT_TARGET_FORMAT;
+      return AOUT_TARGET_FORMAT;
 #endif
 #ifdef OBJ_MAYBE_COFF
     case bfd_target_coff_flavour:
@@ -4338,8 +4359,8 @@ i386_target_format ()
     }
 }
 
-#endif /* OBJ_MAYBE_ more than one */
-#endif /* BFD_ASSEMBLER */
+#endif /* OBJ_MAYBE_ more than one  */
+#endif /* BFD_ASSEMBLER  */
 
 symbolS *
 md_undefined_symbol (name)
@@ -4363,6 +4384,7 @@ md_undefined_symbol (name)
 }
 
 /* Round up a section size to the appropriate boundary.  */
+
 valueT
 md_section_align (segment, size)
      segT segment ATTRIBUTE_UNUSED;
@@ -4414,7 +4436,6 @@ s_bss (ignore)
 
 #endif
 
-
 #ifdef BFD_ASSEMBLER
 
 void
@@ -4512,7 +4533,7 @@ tc_gen_reloc (section, fixp)
   return rel;
 }
 
-#else /* ! BFD_ASSEMBLER */
+#else /* ! BFD_ASSEMBLER  */
 
 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
 void
@@ -4521,12 +4542,10 @@ tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
      fixS *fixP;
      relax_addressT segment_address_in_file;
 {
-  /*
-   * In: length of relocation (or of address) in chars: 1, 2 or 4.
-   * Out: GNU LD relocation length code: 0, 1, or 2.
-   */
+  /* In:  length of relocation (or of address) in chars: 1, 2 or 4.
+     Out: GNU LD relocation length code: 0, 1, or 2.  */
 
-  static const unsigned char nbytes_r_length[] = {42, 0, 1, 42, 2};
+  static const unsigned char nbytes_r_length[] = { 42, 0, 1, 42, 2 };
   long r_symbolnum;
 
   know (fixP->fx_addsy != NULL);
@@ -4548,7 +4567,7 @@ tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
 	      | (((fixP->fx_pcrel << 0) & 0x01) & 0x0f));
 }
 
-#endif /* OBJ_AOUT or OBJ_BOUT */
+#endif /* OBJ_AOUT or OBJ_BOUT.  */
 
 #if defined (I386COFF)
 
@@ -4578,8 +4597,6 @@ tc_coff_sizemachdep (frag)
     return 0;
 }
 
-#endif /* I386COFF */
+#endif /* I386COFF  */
 
-#endif /* ! BFD_ASSEMBLER */
-
-/* end of tc-i386.c */
+#endif /* ! BFD_ASSEMBLER  */
diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c
index 80d938b..1984f54 100644
--- a/gas/config/tc-sparc.c
+++ b/gas/config/tc-sparc.c
@@ -1420,10 +1420,12 @@ sparc_ip (str, pinsn)
 			    goto error;
 			  }
 			kmask |= mask;
-			while (*s == ' ') { ++s; continue; }
+			while (*s == ' ')
+			  ++s;
 			if (*s == '|' || *s == '+')
 			  ++s;
-			while (*s == ' ') { ++s; continue; }
+			while (*s == ' ')
+			  ++s;
 		      }
 		  }
 		else