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| author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-12-18 19:15:57 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-12-18 19:15:57 +0000 |
| commit | 3f06bfce701d5060c7a11c827742b86dc385b4b4 (patch) | |
| tree | 59e5ca3fd7a7d12cd1c6f315836ac81ba65da35a /gas/config | |
| parent | f45c82da381e0ce5ce51b7fb24d0d28611d266b8 (diff) | |
| download | gdb-3f06bfce701d5060c7a11c827742b86dc385b4b4.zip gdb-3f06bfce701d5060c7a11c827742b86dc385b4b4.tar.gz gdb-3f06bfce701d5060c7a11c827742b86dc385b4b4.tar.bz2 | |
gas/
* config/tc-aarch64.c (md_assemble): Defer the feature checking until
do_encode () succeeds.
gas/testsuite/
* gas/aarch64/rm-simd-ext.d: New file.
* gas/aarch64/rm-simd-ext.l: Likewise.
* gas/aarch64/rm-simd-ext.s: Likewise.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-aarch64.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index fb0ae33..7a69d00 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -5531,14 +5531,6 @@ md_assemble (char *str) dump_opcode_operands (opcode); #endif /* DEBUG_AARCH64 */ - /* Check that this instruction is supported for this CPU. */ - if (!opcode->avariant - || !AARCH64_CPU_HAS_FEATURE (cpu_variant, *opcode->avariant)) - { - as_bad (_("selected processor does not support `%s'"), str); - return; - } - mapping_state (MAP_INSN); inst_base = &inst.base; @@ -5563,6 +5555,14 @@ md_assemble (char *str) && programmer_friendly_fixup (&inst) && do_encode (inst_base->opcode, &inst.base, &inst_base->value)) { + /* Check that this instruction is supported for this CPU. */ + if (!opcode->avariant + || !AARCH64_CPU_HAS_FEATURE (cpu_variant, *opcode->avariant)) + { + as_bad (_("selected processor does not support `%s'"), str); + return; + } + if (inst.reloc.type == BFD_RELOC_UNUSED || !inst.reloc.need_libopcodes_p) output_inst (NULL); |