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author | H.J. Lu <hjl.tools@gmail.com> | 2007-11-01 16:27:08 +0000 |
---|---|---|
committer | H.J. Lu <hjl.tools@gmail.com> | 2007-11-01 16:27:08 +0000 |
commit | ca61edf2ffd9bb92243a2c8d8ad89044a93e5727 (patch) | |
tree | 45695a69036ae610643cb4da10442971f9d84014 /gas/config | |
parent | e6c6c8f39cff8723dae7c737eba79f1365a2ed1b (diff) | |
download | gdb-ca61edf2ffd9bb92243a2c8d8ad89044a93e5727.zip gdb-ca61edf2ffd9bb92243a2c8d8ad89044a93e5727.tar.gz gdb-ca61edf2ffd9bb92243a2c8d8ad89044a93e5727.tar.bz2 |
gas/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Check addrprefixop0 to
see if the address size override prefix changes the size of the
first operand.
(check_byte_reg): Don't warn if byteokintel is set.
(check_long_reg): Set i.suffix to QWORD_MNEM_SUFFIX if toqword
is set.
(check_qword_reg): Set i.suffix to LONG_MNEM_SUFFIX if todword
is set.
gas/testsuite/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.d: New.
* gas/i386/i386.s: Likewise.
* gas/i386/i386.exp: Run i386.
* gas/i386/x86_64.s: Add tests for movsx, movsbl, movsbq,
movsbw, movswl, movswq, movzx, movzb, movzbl, movzbq,
movzbw, movzwl and movzwq.
* gas/i386/x86_64.d: Updated.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword,
ToQword and AddrPrefixOp0.
* i386-opc.h (ByteOkIntel): New.
(ToDword): Likewise.
(ToQword): Likewise.
(AddrPrefixOp0): Likewise.
(IsPrefix): Updated.
(i386_opcode_modifier): Add byteokintel, todword, toqword
and addrprefixop0.
* i386-opc.tbl (cvtss2si): Add ToQword.
(cvttss2si): Likewise.
(cvtsd2si): Add ToDword.
(cvttsd2si): Likewise.
(monitor): Add AddrPrefixOp0.
(invlpga): Likewise.
(vmload): Likewise.
(vmrun): Likewise.
(vmsave): Likewise.
(pextrb): Add ByteOkIntel.
(pinsrb): Likewise.
* i386-tbl.h: Regenerated.
Diffstat (limited to 'gas/config')
-rw-r--r-- | gas/config/tc-i386.c | 39 |
1 files changed, 10 insertions, 29 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index ec6ff47..59ad7bf 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -3492,17 +3492,10 @@ process_suffix (void) /* Now select between word & dword operations via the operand size prefix, except for instructions that will ignore this prefix anyway. */ - if (i.tm.base_opcode == 0x0f01 - && (i.tm.extension_opcode == 0xc8 - || i.tm.extension_opcode == 0xd8 - || i.tm.extension_opcode == 0xda - || i.tm.extension_opcode == 0xdb - || i.tm.extension_opcode == 0xdf)) - { - /* monitor in SSE3 is a very special case. The default size - of AX is the size of mode. The address size override - prefix will change the size of AX. It is also true for - invlpga, vmload, vmrun and vmsave in SVME. */ + if (i.tm.opcode_modifier.addrprefixop0) + { + /* The address size override prefix changes the size of the + first operand. */ if ((flag_code == CODE_32BIT && i.op->regs[0].reg_type.bitfield.reg16) || (flag_code != CODE_32BIT @@ -3569,16 +3562,8 @@ check_byte_reg (void) if (i.types[op].bitfield.reg8) continue; - /* movzx, movsx, pextrb and pinsrb should not generate this - warning. */ - if (intel_syntax - && (i.tm.base_opcode == 0xfb7 - || i.tm.base_opcode == 0xfb6 - || i.tm.base_opcode == 0x63 - || i.tm.base_opcode == 0xfbe - || i.tm.base_opcode == 0xfbf - || i.tm.base_opcode == 0x660f3a14 - || i.tm.base_opcode == 0x660f3a20)) + /* Don't generate this warning if not needed. */ + if (intel_syntax && i.tm.opcode_modifier.byteokintel) continue; /* crc32 doesn't generate this warning. */ @@ -3690,12 +3675,10 @@ check_long_reg (void) || i.tm.operand_types[op].bitfield.acc)) { if (intel_syntax - && (i.tm.base_opcode == 0xf30f2d - || i.tm.base_opcode == 0xf30f2c) + && i.tm.opcode_modifier.toqword && !i.types[0].bitfield.regxmm) { - /* cvtss2si/cvttss2si convert DWORD memory to Reg64. We - want REX byte. */ + /* Convert to QWORD. We want REX byte. */ i.suffix = QWORD_MNEM_SUFFIX; } else @@ -3738,12 +3721,10 @@ check_qword_reg (void) /* Prohibit these changes in the 64bit mode, since the lowering is more complicated. */ if (intel_syntax - && (i.tm.base_opcode == 0xf20f2d - || i.tm.base_opcode == 0xf20f2c) + && i.tm.opcode_modifier.todword && !i.types[0].bitfield.regxmm) { - /* cvtsd2si/cvttsd2si convert QWORD memory to Reg32. We - don't want REX byte. */ + /* Convert to DWORD. We don't want REX byte. */ i.suffix = LONG_MNEM_SUFFIX; } else |