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authorMichael Zolotukhin <michael.v.zolotukhin@gmail.com>2013-11-15 05:22:32 -0800
committerH.J. Lu <hjl.tools@gmail.com>2013-11-15 05:22:32 -0800
commitad8ecc8114ce17e4f8f118606225f1002d7faec2 (patch)
treebf25edf2d6ca90489e2e93c57b2e9cdaf1dde5d1 /gas/config
parent9abb1bd666706492efae89859871a31f6bdd9f9a (diff)
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Reorder invalid default mask check
gas/ 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> * config/tc-i386.c (check_VecOperands): Reorder checks. gas/testsuite/ 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> * gas/i386/inval-avx512f.s: Add invalid test for gather instruction with default mask. * gas/i386/inval-avx512f.l: Update correspondingly.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-i386.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 973ebe4..4ce772c 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4345,6 +4345,14 @@ check_VecOperands (const insn_template *t)
return 1;
}
+ /* Check if default mask is allowed. */
+ if (t->opcode_modifier.nodefmask
+ && (!i.mask || i.mask->mask->reg_num == 0))
+ {
+ i.error = no_default_mask;
+ return 1;
+ }
+
/* For VSIB byte, we need a vector register for index, and all vector
registers must be distinct. */
if (t->opcode_modifier.vecsib)
@@ -4462,14 +4470,6 @@ check_VecOperands (const insn_template *t)
return 1;
}
- /* Check if default mask is allowed. */
- if (t->opcode_modifier.nodefmask
- && (!i.mask || i.mask->mask->reg_num == 0))
- {
- i.error = no_default_mask;
- return 1;
- }
-
/* Check RC/SAE. */
if (i.rounding)
{