diff options
| author | H.J. Lu <hjl.tools@gmail.com> | 2011-01-16 17:06:12 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2011-01-16 17:06:12 +0000 |
| commit | 862be3fb9a6de2af14ff2213d599a0aff519ac19 (patch) | |
| tree | 7f852c91060cc24fbce9d7b4d8c4f7aa91a2d1f0 /gas/config | |
| parent | f9a63d49c74b7cc540a0e94d69411676f4332a42 (diff) | |
| download | gdb-862be3fb9a6de2af14ff2213d599a0aff519ac19.zip gdb-862be3fb9a6de2af14ff2213d599a0aff519ac19.tar.gz gdb-862be3fb9a6de2af14ff2213d599a0aff519ac19.tar.bz2 | |
Disallow 64bit relocations in x32 mode.
gas/
2011-01-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (disallow_64bit_disp): Renamed to ...
(disallow_64bit_reloc): This.
(md_assemble): Don't check movabs for x32 mode here.
(i386_target_format): Updated.
(tc_gen_reloc): Check if 64bit relocations are allowed.
gas/testsuite/
2011-01-16 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/ilp32/immed64.s: New.
* gas/i386/ilp32/reloc64.s: Likewise.
* gas/i386/ilp32/x86-64-pcrel.s: Likewise.
* gas/i386/ilp32/inval.s: Add more tests.
* gas/i386/ilp32/immed64.d: Updated.
* gas/i386/ilp32/inval.l: Likewise.
* gas/i386/ilp32/reloc64.d: Likewise.
* gas/i386/ilp32/x86-64-pcrel.d: Likewise.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-i386.c | 44 |
1 files changed, 27 insertions, 17 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 15eed14..74ceaca 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -389,7 +389,7 @@ enum flag_code { static enum flag_code flag_code; static unsigned int object_64bit; -static unsigned int disallow_64bit_disp; +static unsigned int disallow_64bit_reloc; static int use_rela_relocations = 0; #if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \ @@ -3006,21 +3006,10 @@ md_assemble (char *line) /* Don't optimize displacement for movabs since it only takes 64bit displacement. */ if (i.disp_operands - && !i.disp32_encoding) - { - if (flag_code == CODE_64BIT) - { - if (strcmp (mnemonic, "movabs") == 0) - { - if (disallow_64bit_disp) - as_bad (_("'movabs' isn't supported in x32 mode")); - } - else - optimize_disp (); - } - else - optimize_disp (); - } + && !i.disp32_encoding + && (flag_code != CODE_64BIT + || strcmp (mnemonic, "movabs") != 0)) + optimize_disp (); /* Next, we find a template that matches the given insn, making sure the overlap of the given operands types is consistent @@ -8637,7 +8626,7 @@ i386_target_format (void) case X86_64_X32_ABI: use_rela_relocations = 1; object_64bit = 1; - disallow_64bit_disp = 1; + disallow_64bit_reloc = 1; format = ELF_TARGET_FORMAT32; break; } @@ -8939,6 +8928,27 @@ tc_gen_reloc (section, fixp) /* Use the rela in 64bit mode. */ else { + if (disallow_64bit_reloc) + switch (code) + { + case BFD_RELOC_64: + case BFD_RELOC_X86_64_DTPOFF64: + case BFD_RELOC_X86_64_TPOFF64: + case BFD_RELOC_64_PCREL: + case BFD_RELOC_X86_64_GOTOFF64: + case BFD_RELOC_X86_64_GOT64: + case BFD_RELOC_X86_64_GOTPCREL64: + case BFD_RELOC_X86_64_GOTPC64: + case BFD_RELOC_X86_64_GOTPLT64: + case BFD_RELOC_X86_64_PLTOFF64: + as_bad_where (fixp->fx_file, fixp->fx_line, + _("cannot represent relocation type %s in x32 mode"), + bfd_get_reloc_code_name (code)); + break; + default: + break; + } + if (!fixp->fx_pcrel) rel->addend = fixp->fx_offset; else |