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authorNick Clifton <nickc@redhat.com>2002-05-23 12:37:57 +0000
committerNick Clifton <nickc@redhat.com>2002-05-23 12:37:57 +0000
commitc62e1cc30f77e49b15d48d4d32c7f6c1e6827163 (patch)
tree7b9b45107783f709e9478e138286efc5c6682384 /gas/config
parent6ff96af674ed8b5872e90def470405f90f8b4aac (diff)
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For the Thumb BLX reloc round the relocation up rather than down.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-arm.c24
1 files changed, 11 insertions, 13 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index b76ee21..39f1b65 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -2227,7 +2227,7 @@ symbol_locate (symbolP, name, segment, valu, frag)
S_SET_SEGMENT (symbolP, segment);
S_SET_VALUE (symbolP, valu);
- symbol_clear_list_pointers(symbolP);
+ symbol_clear_list_pointers (symbolP);
symbol_set_frag (symbolP, frag);
@@ -6963,7 +6963,7 @@ vfp_sp_reg_list (str, pos)
/* Sanity check -- should have raised a parse error above. */
if (count == 0 || count > 32)
- abort();
+ abort ();
/* Final test -- the registers must be consecutive. */
while (count--)
@@ -7076,7 +7076,7 @@ vfp_dp_reg_list (str)
/* Sanity check -- should have raised a parse error above. */
if (count == 0 || count > 16)
- abort();
+ abort ();
/* Final test -- the registers must be consecutive. */
while (count--)
@@ -7093,7 +7093,7 @@ vfp_dp_reg_list (str)
}
static void
-vfp_sp_ldstm(str, ldstm_type)
+vfp_sp_ldstm (str, ldstm_type)
char *str;
enum vfp_ldstm_type ldstm_type;
{
@@ -7130,7 +7130,7 @@ vfp_sp_ldstm(str, ldstm_type)
}
static void
-vfp_dp_ldstm(str, ldstm_type)
+vfp_dp_ldstm (str, ldstm_type)
char *str;
enum vfp_ldstm_type ldstm_type;
{
@@ -9939,6 +9939,7 @@ md_apply_fix3 (fixP, valP, seg)
value = fixP->fx_offset;
#endif
value += diff;
+
if ((value & ~0x3fffff) && ((value & ~0x3fffff) != ~0x3fffff))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("branch with link out of range"));
@@ -9946,14 +9947,11 @@ md_apply_fix3 (fixP, valP, seg)
newval = (newval & 0xf800) | ((value & 0x7fffff) >> 12);
newval2 = (newval2 & 0xf800) | ((value & 0xfff) >> 1);
if (fixP->fx_r_type == BFD_RELOC_THUMB_PCREL_BLX)
- /* Remove bit zero of the adjusted offset. Bit zero can only be
- set if the upper insn is at a half-word boundary, since the
- destination address, an ARM instruction, must always be on a
- word boundary. The semantics of the BLX (1) instruction, however,
- are that bit zero in the offset must always be zero, and the
- corresponding bit one in the target address will be set from bit
- one of the source address. */
- newval2 &= ~1;
+ /* For a BLX instruction, make sure that the relocation is rounded up
+ to a word boundary. This follows the semantics of the instruction
+ which specifies that bit 1 of the target address will come from bit
+ 1 of the base address. */
+ newval2 = (newval2 + 1) & ~ 1;
md_number_to_chars (buf, newval, THUMB_SIZE);
md_number_to_chars (buf + THUMB_SIZE, newval2, THUMB_SIZE);
}