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author | Richard Sandiford <rdsandiford@googlemail.com> | 2011-06-26 08:32:50 +0000 |
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committer | Richard Sandiford <rdsandiford@googlemail.com> | 2011-06-26 08:32:50 +0000 |
commit | ab9794cf6a743d4d0611b40dde5c8c48ce528bb9 (patch) | |
tree | 584876dca949fd3f659b27852c2ee708f0bab22f /gas/config | |
parent | b91ffaa0ac65733760b03bf979f7d31e3e8f5abb (diff) | |
download | gdb-ab9794cf6a743d4d0611b40dde5c8c48ce528bb9.zip gdb-ab9794cf6a743d4d0611b40dde5c8c48ce528bb9.tar.gz gdb-ab9794cf6a743d4d0611b40dde5c8c48ce528bb9.tar.bz2 |
gas/
* config/tc-mips.c (fix_24k_record_store_info): If the previous
instruction was a store, and the next instructions are unknown,
assume the worst.
gas/testsuite/
* gas/mips/24k-branch-delay-1.d: Do not allow stores to be put
into delay slots.
* gas/mips/24k-triple-stores-1.d: Put the first nop after the
second store, rather than the first.
* gas/mips/24k-triple-stores-2.d: Likewise.
* gas/mips/24k-triple-stores-4.d: Likewise.
* gas/mips/24k-triple-stores-8.d: Likewise.
* gas/mips/24k-triple-stores-3.d: Remove first nop.
* gas/mips/24k-triple-stores-5.d: Likewise.
* gas/mips/24k-triple-stores-6.d: Likewise.
* gas/mips/24k-triple-stores-7.d: Likewise.
* gas/mips/24k-triple-stores-9.d: Add a nop after the second store.
Expect a nop at the end.
* gas/mips/24k-triple-stores-10.d: Put the first nop after the
second store, rather than the first. Expect a nop at the end.
Diffstat (limited to 'gas/config')
-rw-r--r-- | gas/config/tc-mips.c | 22 |
1 files changed, 10 insertions, 12 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index fc17a79..ff71a38 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -2740,7 +2740,7 @@ fix_24k_sort (const void *a, const void *b) static bfd_boolean fix_24k_record_store_info (struct fix_24k_store_info *stinfo, - const struct mips_cl_insn *insn) + const struct mips_cl_insn *insn) { /* The instruction must have a known offset. */ if (!insn->complete_p || !strstr (insn->insn_mo->args, "o(")) @@ -2804,26 +2804,24 @@ nops_for_24k (int ignore, const struct mips_cl_insn *hist, if (ignore >= 2) return 0; - /* If INSN is definitely not a store, there's nothing to worry about. */ - if (insn && (insn->insn_mo->pinfo & INSN_STORE_MEMORY) == 0) - return 0; - - /* Likewise, the previous instruction wasn't a store. */ + /* If the previous instruction wasn't a store, there's nothing to + worry about. */ if ((hist[0].insn_mo->pinfo & INSN_STORE_MEMORY) == 0) return 0; - /* If we don't know what came before, assume the worst. */ - if (hist[1].frag == NULL) + /* If the instructions after the previous one are unknown, we have + to assume the worst. */ + if (!insn) return 1; - /* If the instruction was not a store, there's nothing to worry about. */ - if ((hist[1].insn_mo->pinfo & INSN_STORE_MEMORY) == 0) + /* Check whether we are dealing with three consecutive stores. */ + if ((insn->insn_mo->pinfo & INSN_STORE_MEMORY) == 0 + || (hist[1].insn_mo->pinfo & INSN_STORE_MEMORY) == 0) return 0; /* If we don't know the relationship between the store addresses, assume the worst. */ - if (insn == NULL - || !BASE_REG_EQ (insn->insn_opcode, hist[0].insn_opcode) + if (!BASE_REG_EQ (insn->insn_opcode, hist[0].insn_opcode) || !BASE_REG_EQ (insn->insn_opcode, hist[1].insn_opcode)) return 1; |