diff options
author | H.J. Lu <hjl.tools@gmail.com> | 2015-05-11 11:11:19 -0700 |
---|---|---|
committer | H.J. Lu <hjl.tools@gmail.com> | 2015-05-11 11:12:39 -0700 |
commit | 814860358c2e4194d372018dd1ae78b5c95a44d0 (patch) | |
tree | c937ad8adddc54e3de0f75509aab0a017b5eceb1 /gas/config | |
parent | 7b6d09fbc60b12c196b25a9ebbb77ddc24e06334 (diff) | |
download | gdb-814860358c2e4194d372018dd1ae78b5c95a44d0.zip gdb-814860358c2e4194d372018dd1ae78b5c95a44d0.tar.gz gdb-814860358c2e4194d372018dd1ae78b5c95a44d0.tar.bz2 |
Add Intel MCU support to gas
-march=iamcu must be passed to i386 assembler to generate Intel MCU object
file.
gas/
* config/tc-i386.c (cpu_arch): Add iamcu.
(i386_align_code): Handle PROCESSOR_IAMCU.
(i386_arch): Likewise.
(i386_mach): Likewise.
(i386_target_format): Likewise.
(valid_iamcu_cpu_flags): New function.
(check_cpu_arch_compatible): Only allow Intel MCU instructions
when targeting Intel MCU.
(set_cpu_arch): Call valid_iamcu_cpu_flags to check if CPU flags
are valid for Intel MCU.
(md_parse_option): Likewise.
* tc-i386.h (ELF_TARGET_IAMCU_FORMAT): New.
(processor_type): Add PROCESSOR_IAMCU.
* doc/c-i386.texi: Document iamcu.
gas/testsuite/
* gas/i386/i386.exp: Run iamcu-1, iamcu-2, iamcu-3, iamcu-inval-1,
iamcu-inval-2 and iamcu-inval-3.
* gas/i386/iamcu-1.d: New file.
* gas/i386/iamcu-1.s: Likewise.
* gas/i386/iamcu-2.d: Likewise.
* gas/i386/iamcu-2.s: Likewise.
* gas/i386/iamcu-3.d: Likewise.
* gas/i386/iamcu-3.s: Likewise.
* gas/i386/iamcu-inval-1.l: Likewise.
* gas/i386/iamcu-inval-1.s: Likewise.
* gas/i386/iamcu-inval-2.l: Likewise.
* gas/i386/iamcu-inval-2.s: Likewise.
* gas/i386/iamcu-inval-3.l: Likewise.
* gas/i386/iamcu-inval-3.s: Likewise.
Diffstat (limited to 'gas/config')
-rw-r--r-- | gas/config/tc-i386.c | 58 | ||||
-rw-r--r-- | gas/config/tc-i386.h | 5 |
2 files changed, 60 insertions, 3 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index bbc0969..8a6da64 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -772,6 +772,8 @@ static const arch_entry cpu_arch[] = CPU_L1OM_FLAGS, 0, 0 }, { STRING_COMMA_LEN ("k1om"), PROCESSOR_K1OM, CPU_K1OM_FLAGS, 0, 0 }, + { STRING_COMMA_LEN ("iamcu"), PROCESSOR_IAMCU, + CPU_IAMCU_FLAGS, 0, 0 }, { STRING_COMMA_LEN ("k6"), PROCESSOR_K6, CPU_K6_FLAGS, 0, 0 }, { STRING_COMMA_LEN ("k6_2"), PROCESSOR_K6, @@ -1218,6 +1220,7 @@ i386_align_code (fragS *fragP, int count) case PROCESSOR_I486: case PROCESSOR_PENTIUM: case PROCESSOR_PENTIUMPRO: + case PROCESSOR_IAMCU: case PROCESSOR_GENERIC32: patt = f32_patt; break; @@ -1236,6 +1239,7 @@ i386_align_code (fragS *fragP, int count) case PROCESSOR_I386: case PROCESSOR_I486: case PROCESSOR_PENTIUM: + case PROCESSOR_IAMCU: case PROCESSOR_K6: case PROCESSOR_ATHLON: case PROCESSOR_K8: @@ -1469,6 +1473,20 @@ cpu_flags_and_not (i386_cpu_flags x, i386_cpu_flags y) return x; } +static int +valid_iamcu_cpu_flags (const i386_cpu_flags *flags) +{ + if (cpu_arch_isa == PROCESSOR_IAMCU) + { + static const i386_cpu_flags iamcu_flags = CPU_IAMCU_COMPAT_FLAGS; + i386_cpu_flags compat_flags; + compat_flags = cpu_flags_and_not (*flags, iamcu_flags); + return cpu_flags_all_zero (&compat_flags); + } + else + return 1; +} + #define CPU_FLAGS_ARCH_MATCH 0x1 #define CPU_FLAGS_64BIT_MATCH 0x2 #define CPU_FLAGS_AES_MATCH 0x4 @@ -2278,6 +2296,11 @@ check_cpu_arch_compatible (const char *name ATTRIBUTE_UNUSED, arch = default_arch; } + /* If we are targeting Intel MCU, we must enable it. */ + if (get_elf_backend_data (stdoutput)->elf_machine_code != EM_IAMCU + || new_flag.bitfield.cpuiamcu) + return; + /* If we are targeting Intel L1OM, we must enable it. */ if (get_elf_backend_data (stdoutput)->elf_machine_code != EM_L1OM || new_flag.bitfield.cpul1om) @@ -2341,7 +2364,11 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED) else flags = cpu_flags_and_not (cpu_arch_flags, cpu_arch[j].flags); - if (!cpu_flags_equal (&flags, &cpu_arch_flags)) + + if (!valid_iamcu_cpu_flags (&flags)) + as_fatal (_("`%s' isn't valid for Intel MCU"), + cpu_arch[j].name); + else if (!cpu_flags_equal (&flags, &cpu_arch_flags)) { if (cpu_sub_arch_name) { @@ -2406,6 +2433,13 @@ i386_arch (void) as_fatal (_("Intel K1OM is 64bit ELF only")); return bfd_arch_k1om; } + else if (cpu_arch_isa == PROCESSOR_IAMCU) + { + if (OUTPUT_FLAVOR != bfd_target_elf_flavour + || flag_code == CODE_64BIT) + as_fatal (_("Intel MCU is 32bit ELF only")); + return bfd_arch_iamcu; + } else return bfd_arch_i386; } @@ -2435,7 +2469,16 @@ i386_mach (void) return bfd_mach_x64_32; } else if (!strcmp (default_arch, "i386")) - return bfd_mach_i386_i386; + { + if (cpu_arch_isa == PROCESSOR_IAMCU) + { + if (OUTPUT_FLAVOR != bfd_target_elf_flavour) + as_fatal (_("Intel MCU is 32bit ELF only")); + return bfd_mach_i386_iamcu; + } + else + return bfd_mach_i386_i386; + } else as_fatal (_("unknown architecture")); } @@ -9678,7 +9721,10 @@ md_parse_option (int c, char *arg) else flags = cpu_flags_and_not (cpu_arch_flags, cpu_arch[j].flags); - if (!cpu_flags_equal (&flags, &cpu_arch_flags)) + + if (!valid_iamcu_cpu_flags (&flags)) + as_fatal (_("`%s' isn't valid for Intel MCU"), arch); + else if (!cpu_flags_equal (&flags, &cpu_arch_flags)) { if (cpu_sub_arch_name) { @@ -10088,6 +10134,12 @@ i386_target_format (void) as_fatal (_("Intel K1OM is 64bit only")); return ELF_TARGET_K1OM_FORMAT; } + else if (cpu_arch_isa == PROCESSOR_IAMCU) + { + if (x86_elf_abi != I386_ABI) + as_fatal (_("Intel MCU is 32bit only")); + return ELF_TARGET_IAMCU_FORMAT; + } else return format; } diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h index deea9c2..40483a1 100644 --- a/gas/config/tc-i386.h +++ b/gas/config/tc-i386.h @@ -90,6 +90,10 @@ extern unsigned long i386_mach (void); #define ELF_TARGET_K1OM_FORMAT "elf64-k1om" #endif +#ifndef ELF_TARGET_IAMCU_FORMAT +#define ELF_TARGET_IAMCU_FORMAT "elf32-iamcu" +#endif + #if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \ || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) \ || defined (TE_PE) || defined (TE_PEP) || defined (OBJ_MACH_O)) @@ -233,6 +237,7 @@ enum processor_type PROCESSOR_COREI7, PROCESSOR_L1OM, PROCESSOR_K1OM, + PROCESSOR_IAMCU, PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_K8, |