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| author | Richard Sandiford <richard.sandiford@arm.com> | 2017-02-27 11:27:56 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2017-02-27 11:27:56 +0000 |
| commit | 3843af67a2f91cad9aed14d2d27322c7c951ee85 (patch) | |
| tree | 29639cf2feb3c68dc0e49ba750b40e5149f826ee /gas/config | |
| parent | 913e8ffce5aeae55996e36c4613cb8e4671ea621 (diff) | |
| download | gdb-3843af67a2f91cad9aed14d2d27322c7c951ee85.zip gdb-3843af67a2f91cad9aed14d2d27322c7c951ee85.tar.gz gdb-3843af67a2f91cad9aed14d2d27322c7c951ee85.tar.bz2 | |
[AArch64] Add separate feature flag for weaker release consistent load insns
The weaker release consistency support of ARMv8.3-A is allowed as an optional
extension for ARMv8.2-A, so separate command line option and feature flag is
added: -march=armv8.2-a+rcpc turns LDAPR, LDAPRB, LDAPRH instructions on.
opcodes/
2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64-tbl.h (RCPC, RCPC_INSN): Define.
(aarch64_opcode_table): Use RCPC_INSN.
include/
2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
(AARCH64_ARCH_V8_3): Update.
gas/
2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config/tc-aarch64.c (aarch64_features): Add rcpc.
* doc/c-aarch64.texi (AArch64 Extensions): Document rcpc.
* testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Rename to ...
* testsuite/gas/aarch64/ldst-rcpc.d: This.
* testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Rename to ...
* testsuite/gas/aarch64/ldst-rcpc.s: This.
* testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: New test.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-aarch64.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index e75bebe..c236df1 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -8438,6 +8438,8 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = { {"sve", AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0), AARCH64_FEATURE (AARCH64_FEATURE_FP | AARCH64_FEATURE_SIMD, 0)}, + {"rcpc", AARCH64_FEATURE (AARCH64_FEATURE_RCPC, 0), + AARCH64_ARCH_NONE}, {NULL, AARCH64_ARCH_NONE, AARCH64_ARCH_NONE}, }; |