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| author | Jan Beulich <jbeulich@novell.com> | 2008-02-18 08:44:38 +0000 |
|---|---|---|
| committer | Jan Beulich <jbeulich@novell.com> | 2008-02-18 08:44:38 +0000 |
| commit | 192dc9c6fdb23ca962c3be3053dda8753dc0b065 (patch) | |
| tree | 30308864699cda3c3f285431d9245331f113c96c /gas/config | |
| parent | fca143f2c4680a23dd9f893d5a6ad6ecc06b9edd (diff) | |
| download | gdb-192dc9c6fdb23ca962c3be3053dda8753dc0b065.zip gdb-192dc9c6fdb23ca962c3be3053dda8753dc0b065.tar.gz gdb-192dc9c6fdb23ca962c3be3053dda8753dc0b065.tar.bz2 | |
gas/
2008-02-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (match_template): Disallow 'l' suffix when
currently selected CPU has no 32-bit support.
(parse_real_register): Do not return registers not available on
currently selected CPU.
gas/testsuite/
2008-02-18 Jan Beulich <jbeulich@novell.com>
* gas/i386/att-regs.s, gas/i386/att-regs.d,
gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
* gas/i386/i386.exp: Run new tests.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-i386.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 03360e3..80a1ac8 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -3337,6 +3337,19 @@ match_template (void) || t->extension_opcode != 1 /* cmpxchg8b */)) continue; + /* In general, don't allow 32-bit operands on pre-386. */ + else if (i.suffix == LONG_MNEM_SUFFIX + && !cpu_arch_flags.bitfield.cpui386 + && (intel_syntax + ? (!t->opcode_modifier.ignoresize + && !intel_float_operand (t->name)) + : intel_float_operand (t->name) != 2) + && ((!operand_types[0].bitfield.regmmx + && !operand_types[0].bitfield.regxmm) + || (!operand_types[t->operands > 1].bitfield.regmmx + && !!operand_types[t->operands > 1].bitfield.regxmm))) + continue; + /* Do not verify operands when there are none. */ else { @@ -7114,6 +7127,20 @@ parse_real_register (char *reg_string, char **end_op) if (operand_type_all_zero (&r->reg_type)) return (const reg_entry *) NULL; + if ((r->reg_type.bitfield.reg32 + || r->reg_type.bitfield.sreg3 + || r->reg_type.bitfield.control + || r->reg_type.bitfield.debug + || r->reg_type.bitfield.test) + && !cpu_arch_flags.bitfield.cpui386) + return (const reg_entry *) NULL; + + if (r->reg_type.bitfield.regmmx && !cpu_arch_flags.bitfield.cpummx) + return (const reg_entry *) NULL; + + if (r->reg_type.bitfield.regxmm && !cpu_arch_flags.bitfield.cpusse) + return (const reg_entry *) NULL; + /* Don't allow fake index register unless allow_index_reg isn't 0. */ if (!allow_index_reg && (r->reg_num == RegEiz || r->reg_num == RegRiz)) |