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author | Paul Brook <paul@codesourcery.com> | 2007-06-26 21:36:37 +0000 |
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committer | Paul Brook <paul@codesourcery.com> | 2007-06-26 21:36:37 +0000 |
commit | cd2cf30b7df936bc72fada8adb67506b910d9ce2 (patch) | |
tree | d3356228938543ff2d1b1229da2d37b58958cbb3 /gas/config | |
parent | 86f78eb20ce488361dbc8672a10594a14776c6df (diff) | |
download | gdb-cd2cf30b7df936bc72fada8adb67506b910d9ce2.zip gdb-cd2cf30b7df936bc72fada8adb67506b910d9ce2.tar.gz gdb-cd2cf30b7df936bc72fada8adb67506b910d9ce2.tar.bz2 |
2007-06-26 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (parse_operands): Accept generic coprocessor regs
for OP_RVC.
(reg_names): Add fpinst, pfinst2, mvfr0 and mvfr1.
gas/testsuite/
* gas/arm/vfp1xD.d: Add new fmrx/fmxr tests.
* gas/arm/vfp1xD.s: Ditto.
* gas/arm/vfp1xD_t2.d: Ditto.
* gas/arm/vfp1xD_t2.s: Ditto.
opcodes/
* arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
Diffstat (limited to 'gas/config')
-rw-r--r-- | gas/config/tc-arm.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 54e8483..2a2b587 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -5612,7 +5612,13 @@ parse_operands (char *str, const unsigned char *pattern) case OP_RVD: po_reg_or_fail (REG_TYPE_VFD); break; case OP_oRND: case OP_RND: po_reg_or_fail (REG_TYPE_VFD); break; - case OP_RVC: po_reg_or_fail (REG_TYPE_VFC); break; + case OP_RVC: + po_reg_or_goto (REG_TYPE_VFC, coproc_reg); + break; + /* Also accept generic coprocessor regs for unknown registers. */ + coproc_reg: + po_reg_or_fail (REG_TYPE_CN); + break; case OP_RMF: po_reg_or_fail (REG_TYPE_MVF); break; case OP_RMD: po_reg_or_fail (REG_TYPE_MVD); break; case OP_RMFX: po_reg_or_fail (REG_TYPE_MVFX); break; @@ -14506,6 +14512,10 @@ static const struct reg_entry reg_names[] = /* VFP control registers. */ REGDEF(fpsid,0,VFC), REGDEF(fpscr,1,VFC), REGDEF(fpexc,8,VFC), REGDEF(FPSID,0,VFC), REGDEF(FPSCR,1,VFC), REGDEF(FPEXC,8,VFC), + REGDEF(fpinst,9,VFC), REGDEF(fpinst2,10,VFC), + REGDEF(FPINST,9,VFC), REGDEF(FPINST2,10,VFC), + REGDEF(mvfr0,7,VFC), REGDEF(mvfr1,6,VFC), + REGDEF(MVFR0,7,VFC), REGDEF(MVFR1,6,VFC), /* Maverick DSP coprocessor registers. */ REGSET(mvf,MVF), REGSET(mvd,MVD), REGSET(mvfx,MVFX), REGSET(mvdx,MVDX), |