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| author | Matthew Gretton-Dann <matthew.gretton-dann@arm.com> | 2011-12-07 16:58:35 +0000 |
|---|---|---|
| committer | Matthew Gretton-Dann <matthew.gretton-dann@arm.com> | 2011-12-07 16:58:35 +0000 |
| commit | bd340a044ccea7f1810df7626726ab7ff731693f (patch) | |
| tree | 1ffc7315aea39f10a264ae75239afab032e9cf8b /gas/config | |
| parent | ad6cec4372cbd9c17151f4b6b84759a2fb30f2b2 (diff) | |
| download | gdb-bd340a044ccea7f1810df7626726ab7ff731693f.zip gdb-bd340a044ccea7f1810df7626726ab7ff731693f.tar.gz gdb-bd340a044ccea7f1810df7626726ab7ff731693f.tar.bz2 | |
2011-12-07 Sameera Deshpande <sameera.deshpande@arm.com>
* gas/config/tc-arm.c (do_t_ldstd): Warn for unpredictable cases.
* gas/testsuite/gas/arm/thumb2_ldstd_unpredictable.d: New testcase.
* gas/testsuite/gas/arm/thumb2_ldstd_unpredictable.l: Likewise.
* gas/testsuite/gas/arm/thumb2_ldstd_unpredictable.s: Likewise.
* gas/testsuite/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l: Update
testcase.
* gas/testsuite/gas/testsuite/gas/arm/sp-pc-validations-bad-t.s: Likewise.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-arm.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 064267e..a73f01a 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -563,6 +563,7 @@ const char * const reg_expected_msgs[] = }; /* Some well known registers that we refer to directly elsewhere. */ +#define REG_R12 12 #define REG_SP 13 #define REG_LR 14 #define REG_PC 15 @@ -10654,7 +10655,16 @@ do_t_ldstd (void) inst.operands[1].reg = inst.operands[0].reg + 1; constraint (inst.operands[0].reg == REG_LR, _("r14 not allowed here")); + constraint (inst.operands[0].reg == REG_R12, + _("r12 not allowed here")); } + + if (inst.operands[2].writeback + && (inst.operands[0].reg == inst.operands[2].reg + || inst.operands[1].reg == inst.operands[2].reg)) + as_warn (_("base register written back, and overlaps " + "one of transfer registers")); + inst.instruction |= inst.operands[0].reg << 12; inst.instruction |= inst.operands[1].reg << 8; encode_thumb32_addr_mode (2, /*is_t=*/FALSE, /*is_d=*/TRUE); |