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| author | Richard Earnshaw <richard.earnshaw@arm.com> | 2011-11-23 10:50:53 +0000 |
|---|---|---|
| committer | Richard Earnshaw <richard.earnshaw@arm.com> | 2011-11-23 10:50:53 +0000 |
| commit | 837b3435bc80eade8aa655030173560af3be609c (patch) | |
| tree | b9cd934c885a4916e6de4c9fc7b9caeb41ec224a /gas/config | |
| parent | 67be10ef8faa83b27aee2f668b8aec6402589d52 (diff) | |
| download | gdb-837b3435bc80eade8aa655030173560af3be609c.zip gdb-837b3435bc80eade8aa655030173560af3be609c.tar.gz gdb-837b3435bc80eade8aa655030173560af3be609c.tar.bz2 | |
2011-11-23 Thomas Klein <th.r.klein@web.de>
* config/tc-arm.c (do_t_mov_cmp): Prevent emitting code for MOV
with two low register at arch v4t or v5t when assember using
unified syntax.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-arm.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index e8040c3..bf44228 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -10913,6 +10913,11 @@ do_t_mov_cmp (void) switch (inst.instruction) { case T_MNEM_mov: + /* In v4t or v5t a move of two lowregs produces unpredictable + results. Don't allow this.*/ + constraint (low_regs && !ARM_CPU_HAS_FEATURE (selected_cpu, + arm_ext_v6),"MOV Rd, Rs with two low registers is not " + "permitted on this architecture"); inst.instruction = T_OPCODE_MOV_HR; inst.instruction |= (Rn & 0x8) << 4; inst.instruction |= (Rn & 0x7); |