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authorAdam Nemet <anemet@caviumnetworks.com>2008-11-06 19:49:26 +0000
committerAdam Nemet <anemet@caviumnetworks.com>2008-11-06 19:49:26 +0000
commita242dc0d23ddab8b648547e661591fc18e84c69c (patch)
tree6305de5c690dde88a2b76481b5017ae3cbd44cba /gas/config
parent5fb8dac1536c9f06fdfcf467830c2ac4a515b539 (diff)
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* config/tc-mips.c (COP_INSN): Change logic to always return false
for FP instructions. testsuite/ * gas/mips/mips1-fp.s, testsuite/gas/mips/mips1-fp.d, testsuite/gas/mips/mips1-fp.l: New tests. * gas/mips/mips.exp: Run them.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-mips.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index cc900c3..17ee8d1 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -514,12 +514,11 @@ static int mips_32bitmode = 0;
/* Returns true for a (non floating-point) coprocessor instruction. Reading
or writing the condition code is only possible on the coprocessors and
these insns are not marked with INSN_COP. Thus for these insns use the
- condition-code flags unless this is the floating-point coprocessor. */
+ condition-code flags. */
#define COP_INSN(PINFO) \
(PINFO != INSN_MACRO \
- && (((PINFO) & INSN_COP) \
- || ((PINFO) & (INSN_READ_COND_CODE | INSN_WRITE_COND_CODE) \
- && ((PINFO) & (FP_S | FP_D)) == 0)))
+ && ((PINFO) & (FP_S | FP_D)) == 0 \
+ && ((PINFO) & (INSN_COP | INSN_READ_COND_CODE | INSN_WRITE_COND_CODE)))
/* MIPS PIC level. */