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| author | Jan Beulich <jbeulich@suse.com> | 2022-11-24 09:35:51 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2022-11-24 09:35:51 +0100 |
| commit | 8ee52bcf39e95abbc9cfffbb0afbb55be67e8c3d (patch) | |
| tree | b7a28eb5ac550e20500c27cb59ee1e10bc5f4626 /gas/config | |
| parent | a122baf523b0d03c43abeaa797b82d51aac91061 (diff) | |
| download | gdb-8ee52bcf39e95abbc9cfffbb0afbb55be67e8c3d.zip gdb-8ee52bcf39e95abbc9cfffbb0afbb55be67e8c3d.tar.gz gdb-8ee52bcf39e95abbc9cfffbb0afbb55be67e8c3d.tar.bz2 | |
x86: widen applicability and use of CheckRegSize
First of all make operand_type_register_match() apply to all sized
operands, i.e. in Intel Syntax also to respective memory ones. This
addresses gas wrongly accepting certain SIMD insns where register and
memory operand sizes should match but don't. This apparently has
affected all templates with one memory-only operand and one or more
register ones, both permitting at least two sizes, due to CheckRegSize
not taking effect.
Then also add CheckRegSize to a couple of non-SIMD templates matching
that same pattern of memory-only vs register operands. This replaces
bogus (for Intel Syntax) diagnostics referring to a wrong suffix (when
none was used at all) by "type mismatch" ones, just like already emitted
for insns where the template allows a register operand alongside a
memory one at any particular position.
This also is a prereq to limiting (ideally eliminating in the long run)
suffix "derivation" in Intel Syntax mode.
While making the code adjustment also flip order of checks to do the
cheaper one first in both cases.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-i386.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index f54e7fd..5a88d25 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -2192,7 +2192,7 @@ operand_type_match (i386_operand_type overlap, /* If given types g0 and g1 are registers they must be of the same type unless the expected operand type register overlap is null. - Some Intel syntax memory operand size checking also happens here. */ + Intel syntax sized memory operands are also checked here. */ static INLINE int operand_type_register_match (i386_operand_type g0, @@ -2202,18 +2202,14 @@ operand_type_register_match (i386_operand_type g0, { if (g0.bitfield.class != Reg && g0.bitfield.class != RegSIMD - && (!operand_type_check (g0, anymem) - || g0.bitfield.unspecified - || (t0.bitfield.class != Reg - && t0.bitfield.class != RegSIMD))) + && (g0.bitfield.unspecified + || !operand_type_check (g0, anymem))) return 1; if (g1.bitfield.class != Reg && g1.bitfield.class != RegSIMD - && (!operand_type_check (g1, anymem) - || g1.bitfield.unspecified - || (t1.bitfield.class != Reg - && t1.bitfield.class != RegSIMD))) + && (g1.bitfield.unspecified + || !operand_type_check (g1, anymem))) return 1; if (g0.bitfield.byte == g1.bitfield.byte |