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| author | H.J. Lu <hjl.tools@gmail.com> | 2003-06-23 20:15:34 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2003-06-23 20:15:34 +0000 |
| commit | ca164297eba83e474d4da26c737721df1cf94e93 (patch) | |
| tree | 0f7a451c5b8550f397e9a7626fc260b1de74f48c /gas/config | |
| parent | b2a02dda88806553934ab9bc63c1633ae0f83bdf (diff) | |
| download | gdb-ca164297eba83e474d4da26c737721df1cf94e93.zip gdb-ca164297eba83e474d4da26c737721df1cf94e93.tar.gz gdb-ca164297eba83e474d4da26c737721df1cf94e93.tar.bz2 | |
gas/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
Instructions.
* gas/config/tc-i386.h (CpuPNI): New.
(CpuUnknownFlags): Add CpuPNI.
gas/testsuite/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add prescott.
* gas/i386/prescott.d: New file.
* gas/i386/prescott.s: Likewise.
include/opcode/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Precott New Instructions.
opcodes/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
Intel Precott New Instructions.
(PREGRP27): New. Added for "addsubpd" and "addsubps".
(PREGRP28): New. Added for "haddpd" and "haddps".
(PREGRP29): New. Added for "hsubpd" and "hsubps".
(PREGRP30): New. Added for "movsldup" and "movddup".
(PREGRP31): New. Added for "movshdup" and "movhpd".
(PREGRP32): New. Added for "lddqu".
(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
entry 0xd0. Use PREGRP32 for entry 0xf0.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(grps): Use PNI_Fixup in the "sidtQ" entry.
(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
PREGRP31 and PREGRP32.
(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
Use "fisttpll" in entry 1 in opcode 0xdd.
Use "fisttp" in entry 1 in opcode 0xdf.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-i386.c | 15 | ||||
| -rw-r--r-- | gas/config/tc-i386.h | 3 |
2 files changed, 17 insertions, 1 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index a10d9e6..5ac7e0c 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1413,6 +1413,21 @@ md_assemble (line) if (i.tm.opcode_modifier & ImmExt) { + if ((i.tm.cpu_flags & CpuPNI) && i.operands > 0) + { + /* These Intel Precott New Instructions have the fixed + operands with an opcode suffix which is coded in the same + place as an 8-bit immediate field would be. Here we check + those operands and remove them afterwards. */ + unsigned int x; + + for (x = 0; x < i.operands; x++) + if (i.op[x].regs->reg_num != x) + as_bad (_("can't use register '%%%s' as operand %d in '%s'."), + i.op[x].regs->reg_name, x + 1, i.tm.name); + i.operands = 0; + } + /* These AMD 3DNow! and Intel Katmai New Instructions have an opcode suffix which is coded in the same place as an 8-bit immediate field would be. Here we fake an 8-bit immediate diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h index 295ccb9..5b93dbe 100644 --- a/gas/config/tc-i386.h +++ b/gas/config/tc-i386.h @@ -243,13 +243,14 @@ typedef struct #define CpuSSE 0x1000 /* Streaming SIMD extensions required */ #define CpuSSE2 0x2000 /* Streaming SIMD extensions 2 required */ #define Cpu3dnow 0x4000 /* 3dnow! support required */ +#define CpuPNI 0x8000 /* Prescott New Instuctions required */ /* These flags are set by gas depending on the flag_code. */ #define Cpu64 0x4000000 /* 64bit support required */ #define CpuNo64 0x8000000 /* Not supported in the 64bit mode */ /* The default value for unknown CPUs - enable all features to avoid problems. */ -#define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuSledgehammer|CpuMMX|CpuSSE|CpuSSE2|Cpu3dnow|CpuK6|CpuAthlon) +#define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuSledgehammer|CpuMMX|CpuSSE|CpuSSE2|CpuPNI|Cpu3dnow|CpuK6|CpuAthlon) /* the bits in opcode_modifier are used to generate the final opcode from the base_opcode. These bits also are used to detect alternate forms of |