bfd:

	* elf32-tic6x.c (elf32_tic6x_merge_arch_attributes): Update for
	attribute renaming.
	(elf_backend_obj_attrs_section): Change to ".c6xabi.attributes".

binutils:
	* readelf.c (display_tic6x_attribute): Update for attribute
	renaming.

gas:
	* config/tc-tic6x.c (tic6x_arch_attribute, tic6x_arches,
	md_assemble, tic6x_set_attributes): Update for attribute renaming.
	* doc/c-tic6x.texi: Update for attribute renaming.

gas/testsuite:
	* gas/tic6x/attr-arch-directive-1.d,
	gas/tic6x/attr-arch-directive-2.d,
	gas/tic6x/attr-arch-directive-3.d,
	gas/tic6x/attr-arch-directive-4.d,
	gas/tic6x/attr-arch-directive-4.s,
	gas/tic6x/attr-arch-directive-5.d,
	gas/tic6x/attr-arch-directive-5.s,
	gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d,
	gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d,
	gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d,
	gas/tic6x/attr-arch-opts-none-1.d,
	gas/tic6x/attr-arch-opts-none-2.d,
	gas/tic6x/attr-arch-opts-override-1.d,
	gas/tic6x/attr-arch-opts-override-2.d: Update for attribute
	renaming and renumbering.

include/elf:
	* tic6x-attrs.h (Tag_C6XABI_Tag_CPU_arch): Change to Tag_ISA,
	value 4.
	* tic6x.h (Values for Tag_C6XABI_Tag_CPU_arch): Rename for
	attribute renaming.

ld:
	* emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Use
	.c6xabi.attributes, not __TI_build_attributes.

ld/testsuite:
	* ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d,
	ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d,
	ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d,
	ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d,
	ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d,
	ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d,
	ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d,
	ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d,
	ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d,
	ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d,
	ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d,
	ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d,
	ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d,
	ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d,
	ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d,
	ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d,
	ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d,
	ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d:
	Update for attribute renaming.

1 files changed, 22 insertions, 22 deletions

diff --git a/gas/config/tc-tic6x.c b/gas/config/tc-tic6x.c
index c706158..0a09220 100644
--- a/gas/config/tc-tic6x.c
+++ b/gas/config/tc-tic6x.c
@@ -82,9 +82,9 @@ static unsigned short tic6x_arch_enable = (TIC6X_INSN_C62X
    (architecture, as modified by other options).  */
 static unsigned short tic6x_features;
 
-/* The architecture attribute value, or C6XABI_Tag_CPU_arch_none if
+/* The architecture attribute value, or C6XABI_Tag_ISA_none if
    not yet set.  */
-static int tic6x_arch_attribute = C6XABI_Tag_CPU_arch_none;
+static int tic6x_arch_attribute = C6XABI_Tag_ISA_none;
 
 /* Whether any instructions at all have been seen.  Once any
    instructions have been seen, architecture attributes merge into the
@@ -120,21 +120,21 @@ typedef struct
 } tic6x_arch_table;
 static const tic6x_arch_table tic6x_arches[] =
   {
-    { "c62x", C6XABI_Tag_CPU_arch_C62X, TIC6X_INSN_C62X },
-    { "c64x", C6XABI_Tag_CPU_arch_C64X, TIC6X_INSN_C62X | TIC6X_INSN_C64X },
-    { "c64x+", C6XABI_Tag_CPU_arch_C64XP, (TIC6X_INSN_C62X
-					   | TIC6X_INSN_C64X
-					   | TIC6X_INSN_C64XP) },
-    { "c67x", C6XABI_Tag_CPU_arch_C67X, TIC6X_INSN_C62X | TIC6X_INSN_C67X },
-    { "c67x+", C6XABI_Tag_CPU_arch_C67XP, (TIC6X_INSN_C62X
-					   | TIC6X_INSN_C67X
-					   | TIC6X_INSN_C67XP) },
-    { "c674x", C6XABI_Tag_CPU_arch_C674X, (TIC6X_INSN_C62X
-					   | TIC6X_INSN_C64X
-					   | TIC6X_INSN_C64XP
-					   | TIC6X_INSN_C67X
-					   | TIC6X_INSN_C67XP
-					   | TIC6X_INSN_C674X) }
+    { "c62x", C6XABI_Tag_ISA_C62X, TIC6X_INSN_C62X },
+    { "c64x", C6XABI_Tag_ISA_C64X, TIC6X_INSN_C62X | TIC6X_INSN_C64X },
+    { "c64x+", C6XABI_Tag_ISA_C64XP, (TIC6X_INSN_C62X
+				      | TIC6X_INSN_C64X
+				      | TIC6X_INSN_C64XP) },
+    { "c67x", C6XABI_Tag_ISA_C67X, TIC6X_INSN_C62X | TIC6X_INSN_C67X },
+    { "c67x+", C6XABI_Tag_ISA_C67XP, (TIC6X_INSN_C62X
+				      | TIC6X_INSN_C67X
+				      | TIC6X_INSN_C67XP) },
+    { "c674x", C6XABI_Tag_ISA_C674X, (TIC6X_INSN_C62X
+				      | TIC6X_INSN_C64X
+				      | TIC6X_INSN_C64XP
+				      | TIC6X_INSN_C67X
+				      | TIC6X_INSN_C67XP
+				      | TIC6X_INSN_C674X) }
   };
 
 /* Update the selected architecture based on ARCH, giving an error if
@@ -2685,8 +2685,8 @@ md_assemble (char *str)
   /* If no .arch directives or -march options have been seen, we are
      assessing instruction validity based on the C674X default, so set
      the attribute accordingly.  */
-  if (tic6x_arch_attribute == C6XABI_Tag_CPU_arch_none)
-    tic6x_arch_attribute = C6XABI_Tag_CPU_arch_C674X;
+  if (tic6x_arch_attribute == C6XABI_Tag_ISA_none)
+    tic6x_arch_attribute = C6XABI_Tag_ISA_C674X;
 
   /* Reset global settings for parallel bars and predicates now to
      avoid extra errors if there are problems with this opcode.  */
@@ -3891,10 +3891,10 @@ tic6x_set_attribute_int (int tag, int value)
 static void
 tic6x_set_attributes (void)
 {
-  if (tic6x_arch_attribute == C6XABI_Tag_CPU_arch_none)
-    tic6x_arch_attribute = C6XABI_Tag_CPU_arch_C674X;
+  if (tic6x_arch_attribute == C6XABI_Tag_ISA_none)
+    tic6x_arch_attribute = C6XABI_Tag_ISA_C674X;
 
-  tic6x_set_attribute_int (Tag_C6XABI_Tag_CPU_arch, tic6x_arch_attribute);
+  tic6x_set_attribute_int (Tag_ISA, tic6x_arch_attribute);
 }
 
 /* Do machine-dependent manipulations of the frag chains after all