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| author | Ben Elliston <bje@au.ibm.com> | 2007-08-24 00:56:30 +0000 |
|---|---|---|
| committer | Ben Elliston <bje@au.ibm.com> | 2007-08-24 00:56:30 +0000 |
| commit | c3d65c1ced61cfb87d77e677ee576a3353ce5e34 (patch) | |
| tree | 3e88efb3525dcd12b0011f8829c81ccfa75422ff /gas/config/tc-ppc.c | |
| parent | b6a3feb15fba9b3e2b5c13f4cbc558eea5d34d18 (diff) | |
| download | gdb-c3d65c1ced61cfb87d77e677ee576a3353ce5e34.zip gdb-c3d65c1ced61cfb87d77e677ee576a3353ce5e34.tar.gz gdb-c3d65c1ced61cfb87d77e677ee576a3353ce5e34.tar.bz2 | |
binutils/
* doc/binutils.texi (objdump): Document -Mppcps.
gas/
* config/tc-ppc.c (parse_cpu): Handle "750cl".
(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
(md_show_usage): Document -m750cl.
(md_assemble): Handle two delimiters in succession (eg. `),').
* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
* testsuite/gas/ppc/ppc750ps.s: New file.
* testsuite/gas/ppc/ppc750ps.d: Likewise.
include/opcode/
* ppc.h (PPC_OPCODE_PPCPS): New.
opcodes/
* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
(PPCPS): Likewise.
(powerpc_opcodes): Add all pair singles instructions.
* ppc-dis.c (powerpc_dialect): Handle "ppcps".
(print_ppc_disassembler_options): Document -Mppcps.
Diffstat (limited to 'gas/config/tc-ppc.c')
| -rw-r--r-- | gas/config/tc-ppc.c | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index f8405fc..868258f 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -396,6 +396,24 @@ static const struct pd_reg pre_defined_registers[] = { "fpscr", 0 }, + /* Quantization registers used with pair single instructions. */ + { "gqr.0", 0 }, + { "gqr.1", 1 }, + { "gqr.2", 2 }, + { "gqr.3", 3 }, + { "gqr.4", 4 }, + { "gqr.5", 5 }, + { "gqr.6", 6 }, + { "gqr.7", 7 }, + { "gqr0", 0 }, + { "gqr1", 1 }, + { "gqr2", 2 }, + { "gqr3", 3 }, + { "gqr4", 4 }, + { "gqr5", 5 }, + { "gqr6", 6 }, + { "gqr7", 7 }, + { "lr", 8 }, /* Link Register */ { "pmr", 0 }, @@ -824,6 +842,9 @@ parse_cpu (const char *arg) || strcmp (arg, "603") == 0 || strcmp (arg, "604") == 0) ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32; + /* Do all PPC750s have paired single ops? */ + else if (strcmp (arg, "750cl") == 0) + ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS; /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */ else if (strcmp (arg, "403") == 0 || strcmp (arg, "405") == 0) @@ -1091,7 +1112,8 @@ PowerPC options:\n\ -m403, -m405 generate code for PowerPC 403/405\n\ -m440 generate code for PowerPC 440\n\ -m7400, -m7410, -m7450, -m7455\n\ - generate code For PowerPC 7400/7410/7450/7455\n")); + generate code for PowerPC 7400/7410/7450/7455\n\ +-m750cl generate code for PowerPC 750cl\n")); fprintf (stream, _("\ -mppc64, -m620 generate code for PowerPC 620/625/630\n\ -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ @@ -2639,6 +2661,14 @@ md_assemble (char *str) { endc = ')'; need_paren = 0; + /* If expecting more operands, then we want to see "),". */ + if (*str == endc && opindex_ptr[1] != 0) + { + do + ++str; + while (ISSPACE (*str)); + endc = ','; + } } else if ((operand->flags & PPC_OPERAND_PARENS) != 0) { |