diff options
| author | Ben Elliston <bje@au.ibm.com> | 2008-12-04 10:29:16 +0000 |
|---|---|---|
| committer | Ben Elliston <bje@au.ibm.com> | 2008-12-04 10:29:16 +0000 |
| commit | 2f3bb96af7966880e7378a1633f6ffe1ea7a6587 (patch) | |
| tree | 38694d4d84e9019a354f8cd8ed8a60b43c8a306f /gas/config/tc-ppc.c | |
| parent | 4357ad342fdb2117fbfd6d2904d83b29acd23a78 (diff) | |
| download | gdb-2f3bb96af7966880e7378a1633f6ffe1ea7a6587.zip gdb-2f3bb96af7966880e7378a1633f6ffe1ea7a6587.tar.gz gdb-2f3bb96af7966880e7378a1633f6ffe1ea7a6587.tar.bz2 | |
opcodes/
* ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
for -Mbooke.
(print_ppc_disassembler_options): Update usage.
* ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
(BOOKE64): Remove.
(PPCCHLK64): Likewise.
(powerpc_opcodes): Remove all BOOKE64 instructions.
gas/
* config/tc-ppc.c (parse_cpu): Remove booke64 support. Update
usage strings.
(ppc_setup_opcodes): Likewise, remove booke64 support.
* doc/c-ppc.texi (PowerPC-Opts): Remove -mbooke32 and -mbooke64.
* doc/as.texinfo (Overview): Likewise.
binutils/
* doc/binutils.texi (objdump): Update booke documentation.
* NEWS: Document user-visible changes to command line options.
Diffstat (limited to 'gas/config/tc-ppc.c')
| -rw-r--r-- | gas/config/tc-ppc.c | 20 |
1 files changed, 2 insertions, 18 deletions
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 648ed72..cf67a01 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -919,12 +919,6 @@ parse_cpu (const char *arg) { ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32; } - /* -mbooke64 means enable 64-bit BookE support. */ - else if (strcmp (arg, "booke64") == 0) - { - ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE - | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64); - } else if (strcmp (arg, "power4") == 0) { ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC @@ -1149,8 +1143,7 @@ PowerPC options:\n\ fprintf (stream, _("\ -mppc64, -m620 generate code for PowerPC 620/625/630\n\ -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ --mbooke64 generate code for 64-bit PowerPC BookE\n\ --mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\ +-mbooke generate code for 32-bit PowerPC BookE\n\ -mpower4 generate code for Power4 architecture\n\ -mpower5 generate code for Power5 architecture\n\ -mpower6 generate code for Power6 architecture\n\ @@ -1359,8 +1352,7 @@ ppc_setup_opcodes (void) There are also cases where the table needs to be out of order to disassemble the correct instruction for - processor variants. eg. "lhae" booke64 insn must be - found before "ld" ppc64 insn. */ + processor variants. */ else if (0) { unsigned long t1 = op[0].opcode; @@ -1420,14 +1412,6 @@ ppc_setup_opcodes (void) || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64))) || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0) - /* Certain instructions (eg: extsw) do not exist in the - 32-bit BookE instruction set, but they do exist in the - 64-bit BookE instruction set, and other PPC instruction - sets. Check to see if the opcode has the BOOKE64 flag set. - If it does make sure that the target CPU is not the BookE32. */ - && ((op->flags & PPC_OPCODE_BOOKE64) == 0 - || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64 - || (ppc_cpu & PPC_OPCODE_BOOKE) == 0) && ((ppc_cpu & PPC_OPCODE_POWER4) == 0 || (op->flags & PPC_OPCODE_NOPOWER4) == 0)) { |