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authorCatherine Moore <clm@redhat.com>2010-05-26 12:59:56 +0000
committerCatherine Moore <clm@redhat.com>2010-05-26 12:59:56 +0000
commitf79e2745b210313ede58d9509e718f0e2506e045 (patch)
tree1595cca36751635dd0d84bb1cfa98848de13554e /gas/config/tc-mips.c
parentf9eeb9c926526185210dd56597014ba89ee29b53 (diff)
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* config/tc-mips.c (is_opcode_valid): Remove expansionp. (macro_build): Change invocation of is_opcode_valid. (mips_ip): Likewise. gas/testsuite/ * gas/mips/mips-no-jalx.l: Delete. * gas/mips/mips-no-jalx.s: Delete. * gas/mips/mips-jalx-2.d: New. * gas/mips/mips-jalx-2.s: New. * gas/mips/mips.exp (mips-jalx-2): Run new test. (mips-no-jalx): Remove deleted test. include/ * opcode/mips.h (INSN_MIPS16): Remove. opcodes/ * mips-dis.c (mips_arch): Remove INSN_MIPS16. * mips-opc.c (I16): Remove. (mips_builtin_op): Reclassify jalx.
Diffstat (limited to 'gas/config/tc-mips.c')
-rw-r--r--gas/config/tc-mips.c14
1 files changed, 4 insertions, 10 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index f901ae4..9753a55 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1817,11 +1817,10 @@ reg_lookup (char **s, unsigned int types, unsigned int *regnop)
}
/* Return TRUE if opcode MO is valid on the currently selected ISA and
- architecture. If EXPANSIONP is TRUE then this check is done while
- expanding a macro. Use is_opcode_valid_16 for MIPS16 opcodes. */
+ architecture. Use is_opcode_valid_16 for MIPS16 opcodes. */
static bfd_boolean
-is_opcode_valid (const struct mips_opcode *mo, bfd_boolean expansionp)
+is_opcode_valid (const struct mips_opcode *mo)
{
int isa = mips_opts.isa;
int fp_s, fp_d;
@@ -1841,11 +1840,6 @@ is_opcode_valid (const struct mips_opcode *mo, bfd_boolean expansionp)
if (mips_opts.ase_smartmips)
isa |= INSN_SMARTMIPS;
- /* For user code we don't check for mips_opts.mips16 since we want
- to allow jalx if -mips16 was specified on the command line. */
- if (expansionp ? mips_opts.mips16 : file_ase_mips16)
- isa |= INSN_MIPS16;
-
/* Don't accept instructions based on the ISA if the CPU does not implement
all the coprocessor insns. */
if (NO_ISA_COP (mips_opts.arch)
@@ -3638,7 +3632,7 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...)
macros will never generate MDMX, MIPS-3D, or MT instructions. */
if (strcmp (fmt, mo->args) == 0
&& mo->pinfo != INSN_MACRO
- && is_opcode_valid (mo, TRUE))
+ && is_opcode_valid (mo))
break;
++mo;
@@ -8776,7 +8770,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
gas_assert (strcmp (insn->name, str) == 0);
- ok = is_opcode_valid (insn, FALSE);
+ ok = is_opcode_valid (insn);
if (! ok)
{
if (insn + 1 < &mips_opcodes[NUMOPCODES]