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| author | Andrew Bennett <andrew.bennett@imgtec.com> | 2015-03-12 16:27:46 +0000 |
|---|---|---|
| committer | Andrew Bennett <andrew.bennett@imgtec.com> | 2015-03-12 16:37:09 +0000 |
| commit | 7ef0d2976a57c6cfde60281d67111969d7285d65 (patch) | |
| tree | bca853847be77ea7ce27591b2277b8411e2e53c4 /gas/config/tc-mips.c | |
| parent | 93ef582debb0a179916965a882f4344223569219 (diff) | |
| download | gdb-7ef0d2976a57c6cfde60281d67111969d7285d65.zip gdb-7ef0d2976a57c6cfde60281d67111969d7285d65.tar.gz gdb-7ef0d2976a57c6cfde60281d67111969d7285d65.tar.bz2 | |
Add i6400 entry to the MIPS CPU table.
gas/
* config/tc-mips.c (mips_cpu_info_table): Add i6400 entry.
* doc/c-mips.texi: Document i6400 -march option.
Diffstat (limited to 'gas/config/tc-mips.c')
| -rw-r--r-- | gas/config/tc-mips.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index af18430..e61bb4d 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -18686,6 +18686,9 @@ static const struct mips_cpu_info mips_cpu_info_table[] = MIPS64R2 rather than MIPS64. */ { "xlp", 0, 0, ISA_MIPS64R2, CPU_XLR }, + /* i6400. */ + { "i6400", 0, ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6}, + /* End marker */ { NULL, 0, 0, 0, 0 } }; |