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author | Matthew Fortune <matthew.fortune@mips.com> | 2019-04-09 20:40:00 +0000 |
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committer | Faraz Shahbazker <fshahbazker@wavecomp.com> | 2019-04-13 10:15:56 -0700 |
commit | bdc8beb41b656e8071af275ef0e98c4f2d05e564 (patch) | |
tree | 780b0a4e90ead94a2fb16eba201d54b66e080645 /gas/config/tc-mips.c | |
parent | 3315614d19a7fb409227298ead9b356bdbcca3bc (diff) | |
download | gdb-bdc8beb41b656e8071af275ef0e98c4f2d05e564.zip gdb-bdc8beb41b656e8071af275ef0e98c4f2d05e564.tar.gz gdb-bdc8beb41b656e8071af275ef0e98c4f2d05e564.tar.bz2 |
[MIPS] Add i6500 CPU and fix i6400 default ASEs
gas/
* config/tc-mips.c (mips_cpu_info_table): Add i6500. Update
default ASEs for i6400.
* doc/c-mips.texi (-march): Document i6500.
* testsuite/gas/mips/elf_mach_i6400.d: New test.
* testsuite/gas/mips/elf_mach_i6500.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
Diffstat (limited to 'gas/config/tc-mips.c')
-rw-r--r-- | gas/config/tc-mips.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 45e8f38..7eab392 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -20018,7 +20018,9 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "xlp", 0, 0, ISA_MIPS64R2, CPU_XLR }, /* MIPS 64 Release 6. */ - { "i6400", 0, ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6}, + { "i6400", 0, ASE_VIRT | ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6}, + { "i6500", 0, ASE_VIRT | ASE_MSA | ASE_CRC | ASE_GINV, + ISA_MIPS64R6, CPU_MIPS64R6}, { "p6600", 0, ASE_VIRT | ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6}, /* End marker. */ |