aboutsummaryrefslogtreecommitdiff
path: root/gas/config/tc-mips.c
diff options
context:
space:
mode:
authorFredrik Noring <noring@nocrew.org>2018-11-30 18:32:36 +0000
committerMaciej W. Rozycki <macro@linux-mips.org>2018-11-30 18:32:36 +0000
commit27c634e0ed18f769fb92d03fb75ea491fb6656ec (patch)
treedb6c1e97130b20724ac361837f886500ba15f8e0 /gas/config/tc-mips.c
parent92528b6772a19dd671b52d954c14886b11fc0a8d (diff)
downloadgdb-27c634e0ed18f769fb92d03fb75ea491fb6656ec.zip
gdb-27c634e0ed18f769fb92d03fb75ea491fb6656ec.tar.gz
gdb-27c634e0ed18f769fb92d03fb75ea491fb6656ec.tar.bz2
GAS/MIPS: Add `-mfix-r5900' option for the R5900 short loop erratum
`-march=r5900' already enables the R5900 short loop workaround. However, the R5900 ISA and most other MIPS ISAs are mutually exclusive since R5900-specific instructions are generated as well. The `-mfix-r5900' option can be used in combination with e.g. `-mips2' or `-mips3' to generate generic MIPS binaries that also work with the R5900 target. This change has been tested with `make RUNTESTFLAGS=mips.exp check-gas' for the targets `mipsr5900el-unknown-linux-gnu', `mipsr5900el-elf' and `mips3-unknown-linux-gnu'. gas/ * config/tc-mips.c (mips_fix_r5900, mips_fix_r5900_explicit): New variables. (options): Add OPTION_FIX_R5900 and OPTION_NO_FIX_R5900 enumeration constants. (md_longopts): Add "mfix-r5900" and "mno-fix-r5900" options. (can_swap_branch_p, md_parse_option, mips_after_parse_args): Handle the new options. (md_show_usage): Document the `-mfix-r5900' option. * doc/as.texi: Likewise. * doc/c-mips.texi: Likewise. * testsuite/gas/mips/mips.exp: Run R5900 dump tests. * testsuite/gas/mips/r5900-fix.d: Test `-mfix-r5900' option. * testsuite/gas/mips/r5900-fix.s: Likewise. * testsuite/gas/mips/r5900-no-fix.d: Test `-mno-fix-r5900'. * testsuite/gas/mips/r5900-no-fix.s: Likewise.
Diffstat (limited to 'gas/config/tc-mips.c')
-rw-r--r--gas/config/tc-mips.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 918525b..2942036 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -939,6 +939,10 @@ static int mips_fix_rm7000;
/* ...likewise -mfix-cn63xxp1 */
static bfd_boolean mips_fix_cn63xxp1;
+/* ...likewise -mfix-r5900 */
+static bfd_boolean mips_fix_r5900;
+static bfd_boolean mips_fix_r5900_explicit;
+
/* We don't relax branches by default, since this causes us to expand
`la .l2 - .l1' if there's a branch between .l1 and .l2, because we
fail to compute the offset before expanding the macro to the most
@@ -1488,6 +1492,8 @@ enum options
OPTION_NO_FIX_VR4130,
OPTION_FIX_CN63XXP1,
OPTION_NO_FIX_CN63XXP1,
+ OPTION_FIX_R5900,
+ OPTION_NO_FIX_R5900,
OPTION_TRAP,
OPTION_BREAK,
OPTION_EB,
@@ -1636,6 +1642,8 @@ struct option md_longopts[] =
{"mno-fix-rm7000", no_argument, NULL, OPTION_NO_FIX_RM7000},
{"mfix-cn63xxp1", no_argument, NULL, OPTION_FIX_CN63XXP1},
{"mno-fix-cn63xxp1", no_argument, NULL, OPTION_NO_FIX_CN63XXP1},
+ {"mfix-r5900", no_argument, NULL, OPTION_FIX_R5900},
+ {"mno-fix-r5900", no_argument, NULL, OPTION_NO_FIX_R5900},
/* Miscellaneous options. */
{"trap", no_argument, NULL, OPTION_TRAP},
@@ -6997,7 +7005,7 @@ can_swap_branch_p (struct mips_cl_insn *ip, expressionS *address_expr,
- a branch delay slot of the loop is not NOP (EE 2.9 or later).
We need to do this because of a hardware bug in the R5900 chip. */
- if (mips_opts.arch == CPU_R5900
+ if (mips_fix_r5900
/* Check if instruction has a parameter, ignore "j $31". */
&& (address_expr != NULL)
/* Parameter must be 16 bit. */
@@ -14763,6 +14771,16 @@ md_parse_option (int c, const char *arg)
mips_fix_cn63xxp1 = FALSE;
break;
+ case OPTION_FIX_R5900:
+ mips_fix_r5900 = TRUE;
+ mips_fix_r5900_explicit = TRUE;
+ break;
+
+ case OPTION_NO_FIX_R5900:
+ mips_fix_r5900 = FALSE;
+ mips_fix_r5900_explicit = TRUE;
+ break;
+
case OPTION_RELAX_BRANCH:
mips_relax_branch = 1;
break;
@@ -15036,6 +15054,10 @@ mips_after_parse_args (void)
/* Set up initial mips_opts state. */
mips_opts = file_mips_opts;
+ /* For the R5900 default to `-mfix-r5900' unless the user told otherwise. */
+ if (!mips_fix_r5900_explicit)
+ mips_fix_r5900 = file_mips_opts.arch == CPU_R5900;
+
/* The register size inference code is now placed in
file_mips_check_options. */
@@ -20125,6 +20147,7 @@ MIPS options:\n\
-mfix-vr4130 work around VR4130 mflo/mfhi errata\n\
-mfix-24k insert a nop after ERET and DERET instructions\n\
-mfix-cn63xxp1 work around CN63XXP1 PREF errata\n\
+-mfix-r5900 work around R5900 short loop errata\n\
-mgp32 use 32-bit GPRs, regardless of the chosen ISA\n\
-mfp32 use 32-bit FPRs, regardless of the chosen ISA\n\
-msym32 assume all symbols have 32-bit values\n\